1Electronics Progress and development trends

Analogowe układy CMOS

w technice VLSI

Analogowe układy CMOS

w technice VLSI

W.Kucewicz

Analogowe układy CMOS w technice VLSI

Analogowe układy CMOS

w technice VLSI

w technice VLSI -- part II

part II

Analogowe układy CMOS

w technice VLSI

w technice VLSI -- part II

part II

El t ni

El t ni s Hist

s Hist

El t ni

El t ni s Hist

s Hist

Electronic

Electronics History

s History

Electronic

Electronics History

s History

& Progress

Progress

& Progress

Progress

gggg

W.Kucewicz

Analogowe układy CMOS w technice VLSI

Contents

11 Transistor

Transistor S

Story

tory

11 Transistor

Transistor S

Story

tory

1. Transistor

Transistor S

Story

tory

22 Pro ress in the

Pro ress in the

1. Transistor

Transistor S

Story

tory

22 Pro ress in the

Pro ress in the

2. Progress in the

Progress in the

VLSI P d ti

2. Progress in the

Progress in the

VLSI P d ti

VLSI Production

W.Kucewicz

Analogowe układy CMOS w technice VLSI

Transistor story

W.Kucewicz

Analogowe układy CMOS w technice VLSI

Electron Discovery

Electron Discovery -- 1898

1898

Electron Discovery

Electron Discovery -- 1898

1898

"To the electron

"To the electron -- may it never be of any use to anybody."

may it never be of any use to anybody."

-- JJ. Thomson's favorite toast

JJ. Thomson's favorite toast

W.Kucewicz

Analogowe układy CMOS w technice VLSI

Electron Discovery

Electron Discovery -- 1898

1898

Electron Discovery

Electron Discovery -- 1898

1898

"To the electron

"To the electron -- may it never be of any use to anybody."

may it never be of any use to anybody."

-- JJ. Thomson's favorite toast

JJ. Thomson's favorite toast

1 Elektron

1 Elektron Î

1 6

1 6 ·10

·10

--19

1 Elektron

1 Elektron Î

1 6

1 6 ·10

·10

--19

1 Elektron

1 Elektron Î

1,6

1,6 10

1 Elektron

1 Elektron Î

9 1·10

--31

1 Elektron

1 Elektron Î

1,6

1,6 10

1 Elektron

1 Elektron Î

9 1·10

--31

1 Elektron

1 Elektron Î

9,1 10

9,1 10 kg

1 Elektron

1 Elektron Î

511

511 keV/c

keV/c

1 Elektron

1 Elektron Î

9,1 10

9,1 10 kg

1 Elektron

1 Elektron Î

511

511 keV/c

keV/c

W.Kucewicz

Analogowe układy CMOS w technice VLSI

Mechanical Computer

mpu

The Babbage Engine, developed in 1834, was

perceived as a general-purpose computing

perceived as a general purpose computing

machine, with features strikingly close to

modern computers. Besides executing the

basic operations (addition, subtraction,

multiplication, and division) in arbitrary

sequences, the machine operated in a two-

cycle sequence, called “store” and “mill”

(execute), similar to current computers.

Unfortunately, the complexity and the cost of

the designs made the concept impractical.

For instance, the design of Difference Engine

I (part of which is shown) required

25,000

f £

mechanical parts at a total cost of £17,470

(in 1834!).

Babbage Difference Engine

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Analogowe układy CMOS w technice VLSI

1945

1945 -- First Computer

First Computer –– ENIAC

ENIAC

1945

1945 -- First Computer

First Computer –– ENIAC

ENIAC

mpu

ENIAC

lectronic

umerical

ntegrator

nalyzer and

omputer

Filling up a 30 X 50 foot room, ENIAC was made of 17, 468 vacuum

tubes,70,000 resistors, and 10,000 capacitors

tubes,70,000 resistors, and 10,000 capacitors --

-- not to mention all

not to mention all

those lights and switches

those lights and switches Most importantly

Most importantly the metal giant could

the metal giant could

W.Kucewicz

Analogowe układy CMOS w technice VLSI

those lights and switches.

those lights and switches. Most importantly,

Most importantly, the metal giant could

the metal giant could

add 5,000 numbers in a single second.

Bipolar transistor history

1940

Ohl develops pn junction (Bell Lab)

1940

Ohl develops pn junction (Bell Lab)

1945

Established Shockley’s Lab (Bell Lab)

1947

Bardeen and Brattain invent

1947

Bardeen and Brattain invent

transistor (Bell Lab)

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Analogowe układy CMOS w technice VLSI

Bipolar transistor history

The transistor was invented in 1947 at Bell Labs by the team of John Bardeen, Walter

Brattain, and William Shockley, for which they received the Nobel Prize

Brattain, and William Shockley, for which they received the Nobel Prize (1956)

(1956). .

The first transistor was about half an inch high

The first transistor was about half an inch high.

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Analogowe układy CMOS w technice VLSI

Bipolar Transistor History

The first transistor was a germanium point

The first transistor was a germanium point--contact

contact

The first transistor was a germanium point

The first transistor was a germanium point contact

contact

transistor consisting of two thin electrodes in point

transistor consisting of two thin electrodes in point--

contact with the surface of a piece of germanium and

with a third wire attached to the base.

h d

f l

Brattain attached a single strip of gold foil over the

point of a plastic triangle. With a razor blade, he sliced

through the gold right at the tip of the triangle. Voila:

two gold contacts just a hair-width apart

two gold contacts just a hair width apart.

The whole triangle was then held over a crystal of

germanium on a spring, so that the contacts lightly

touched the surface. When a bit of current came

f h

through one of the gold contacts, another even

stronger current came out the other contact.

Emitter

Collector

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Analogowe układy CMOS w technice VLSI

Base

Bipolar Transistor History

J. Bardeen and W. H. Brattain. The transistor, a semiconductor triode.

Physical Review

, 74:230, July 15 1948

Tran

sient

sient Re

sistor

Tran

sient

sient Re

sistor

Transistor

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Analogowe układy CMOS w technice VLSI

Bipolar transistor

pppp

License price 25 k$

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Analogowe układy CMOS w technice VLSI

Bipolar Junction Transistor

Bipolar Junction Transistor -- 195

19511

Bipolar Junction Transistor

Bipolar Junction Transistor -- 195

19511

Emitter

Base

nn
pp

Collector

Shockley develops junction transistor which can be

maufactured in quantity

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Analogowe układy CMOS w technice VLSI

1958: Invention of the Integrated

Circuit

1958: Invention of the Integrated

Circuit

uuuu

Jack Kilby from Texas Instruments.

N b l P i i 2000

Nobel Price in 2000

1 Transistor and 4

1 Transistor and 4 oother Devices on 1 Chip

ther Devices on 1 Chip

The reason integrated chips are possible

at all is because engineers learned ways to

build layers, making m

build layers, making miillions of transistors

llions of transistors

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Analogowe układy CMOS w technice VLSI

build layers, making m

build layers, making miillions of transistors

llions of transistors

across the chip all at the same time.

1958: Invention of the Integrated

Circuit

1958: Invention of the Integrated

Circuit

uuuu

Kilby’s notebook pages -summer 1958, Texas Instruments

Integrated circuit patent

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Analogowe układy CMOS w technice VLSI

195

19533:

: Darlington Patent

Darlington Patent

195

19533:

: Darlington Patent

Darlington Patent

“Just after the transistor was invented at Bell Labs, Sidney

checked out for the weekend two of the few existing

transistors from the head of Bell Labs. Transistors were

not generally available and the head of the Labs kept the

few that had been made in his desk. Sidney played with

them at home on the weekend and discovered/invented

the Darlington pair. He realized that they could be put

th Dar ngt n pa r. H r a z that th y c u put

in one package (“on one chip”), and that in fact any

number of transistors could be put in one package. The

next week he was encouraged to have the lawyers draw

up the patent application.

He said it should be written

for any number in one package but the lawyers only

for any number in one package, but the lawyers only

wanted to do it for two

wanted to do it for two—

—which is what was applied for.

which is what was applied for.

As it turned out, if it had not been restricted to two

transistors, Bell Labs and Dr. Darlington would receive

transistors, Bell Labs and Dr. Darlington would receive a

royalty on every IC chip made today!

Anyway, that’s

ll ”

the story he tells.”

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: FUNDAMENTAL

THEORY AND APPLICATIONS, VOL. 46, NO. 1, JANUARY 1999

Darlington’s Contributions to Transistor Circuit Design

D id A H d

F ll

IEEE

W.Kucewicz

Analogowe układy CMOS w technice VLSI

David A. Hodges,

Fellow, IEEE

Invention of the Integrated Circuit

1953

Robert Noyce get his PhD at MIT where „few

peaple had even heardabout the transistor

1953

peaple had even heardabout the transistor

1955

He arriving to Shockley’s Lab

1955

1955
1957

1957

He left Shockley’s and forms Fairchild

Semiconductor with Jean Hoerni and Gordon

1957

Semiconductor with Jean Hoerni and Gordon

Moore

i i

ts t h i

f diff si i

iti s

i i

ts t h i

f diff si i

iti s

1958

Hoerni invents technique for diffusion impurities

into Silicon to build planar transistor and then

using SiO

as insulator

1959

Noyce develops first true IC using planar

transistor, diode

transistor, diode--isolated silicon resistor, SiO

isolated silicon resistor, SiO

W.Kucewicz

Analogowe układy CMOS w technice VLSI

1959

insulation and evaporated metal wiring

1959: Invention of the Integrated

Circuit

1959: Invention of the Integrated

Circuit

uuuu

Noyce develops first true IC

N y

p f

N y

p f

using

•• planar transistor,

planar transistor,

N y

p f

N y

p f

using

•• planar transistor,

planar transistor,

•• diode

diode--isolated silicon resistor,

isolated silicon resistor,

•• SiO

SiO

insulation

planar transistor,

•• diode

diode--isolated silicon resistor,

isolated silicon resistor,

•• SiO

SiO

insulation

•• and evaporated metal wiring

and evaporated metal wiring

•• and evaporated metal wiring

and evaporated metal wiring

W.Kucewicz

Analogowe układy CMOS w technice VLSI

First Commercial Planar IC

First Commercial Planar IC 1961

1961

First Commercial Planar IC

First Commercial Planar IC 1961

1961

Fairchild

Fairchild ––

Dual flip

Dual flip--flop

flop Chip

Chip

4 Transistors and 5

Resistors

START OF SMALL SCALE

INTEGRATION

TECHNOLOGY

W.Kucewicz

Analogowe układy CMOS w technice VLSI

First Linear IC

1964

Fairchild

First Linear IC

First Linear IC The

The μμA 702 OPAMP

A 702 OPAMP

1967

Fairchild

First

First IC

IC μμMOSAIC

MOSAIC -- ccreated with Computer

reated with Computer--

Aided Design

Aided Design..

1967

Transistors (organized in

Transistors (organized in columns) could be

columns) could be

easily rewired using a

easily rewired using a two

two--layer interconnect to

layer interconnect to

create different

create different circuits. This circuit

circuits. This circuit contains

contains

W.Kucewicz

Analogowe układy CMOS w technice VLSI

~150 logic

~150 logic gates.

gates.

1K bit RAM

Noyce and Moore leave Fairchild and found Intel.

No business plan just a promise

business plan just a promise to specialize in memory chips

to specialize in memory chips

1968

No business plan, just a promise

business plan, just a promise to specialize in memory chips.

to specialize in memory chips.

They raise $3M in two days

They raise $3M in two days and move to Santa Clara. By

and move to Santa Clara. By

1971 Intel had 500 employees;

1971 Intel had 500 employees; by 1983 it had 21,500

by 1983 it had 21,500

employees and $1100M in sales

employees and $1100M in sales.

1970

Intel

starts selling a 1K bit RAM, the 1103.

1971

Intel

starts selling a first EPROM, the 1702.

W.Kucewicz

Analogowe układy CMOS w technice VLSI

Microprocessor Intel 4004 (1971)

( 9 )

2300 transistors

2300 transistors on one chip

on one chip

Freq.

Freq. --108 kHz

108 kHz

Technology

10μμ

Technology

Technology ––

10μμ

It was 1/8" by 1/16"

It was 1/8" by 1/16" and

and it was

it was

as powerful as

as powerful as ENIAC

ENIAC

pperform

erforming

ing about 60,000

about 60,000

l l ti s i s

calculations in a second.

It was as powerful as ENIAC but was

W.Kucewicz

Analogowe układy CMOS w technice VLSI

eclipsed by its more capable brothers

Ted Hoff’s invention

Microprocessor Intel

Microprocessor Intel 8800

0088

Microprocessor Intel

Microprocessor Intel 8800

0088

1972

Intel

Intel -- The microprocessor 8008

It had 3 500 transistors supporting a byte wide data path

1972

It had 3,500 transistors supporting a byte-wide data path.

Despite its limitations, the 8008 was the first

microprocessor capable of playing the role of computer CPU

1974

Intel

Intel -- The microprocessor 8008

h d

f ’ d

1974

the 8080 had 6,000 transistors fab’ed in a 6um

process. The clock rate was 2Mhz, more than

enough to ignite the personal computer industry.

At l

t P l All

d hi

ht h

At least Paul Allen and his partner thought so when

they wrote a BASIC interpreter for the 8080 in

1975.

W.Kucewicz

Analogowe układy CMOS w technice VLSI

MOS transistor history

MOSFET transistor

MOSFET transistor -- Lilienfeld (Canada) in 1925

Lilienfeld (Canada) in 1925

CMOS

CMOS 1960’ b t l

d ith

f t i

1960’ b t l

d ith

f t i

CMOS

CMOS –– 1960’s, but plagued with manufacturing

1960’s, but plagued with manufacturing problems

problems

PMOS in 1960’s (calculators)

NMOS in 1970’s (4004, 8080)

NMOS in 1970’s (4004, 8080) –– for speed

for speed

CMOS in 1980’s

CMOS in 1980’s –– preferred MOSFET technology

preferred MOSFET technology because of

because of

CMOS in 1980 s

CMOS in 1980 s preferred MOSFET technology

preferred MOSFET technology because of

because of

power benefits

BiCMOS

SOI, Copper

SOI, Copper--Low K

Low K

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Analogowe układy CMOS w technice VLSI

Lilienfeld patent

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Analogowe układy CMOS w technice VLSI

A New Form of Transistor

A New Form of Transistor --

-- 1962

1962

A New Form of Transistor

A New Form of Transistor --

-- 1962

1962

Metal

Metal--Oxide

Oxide

Semiconductor Field

Semiconductor Field--

Eff

Effect Transistor

Radio Corporation of

America (RCA)

Sarnoff Laboratories

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Analogowe układy CMOS w technice VLSI

One of the Most Powerful 16

One of the Most Powerful 16--Bit

Bit

Microprocessors

Microprocessors --

-- 1979

1979

One of the Most Powerful 16

One of the Most Powerful 16--Bit

Bit

Microprocessors

Microprocessors --

-- 1979

1979

pppp

The Motorola 68000

WELL INTO THE

LARGE SCALE

INTEGRATION

ERA

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Analogowe układy CMOS w technice VLSI

A Very Early 32

A Very Early 32--Bit Microprocessor

Bit Microprocessor --

1981

A Very Early 32

A Very Early 32--Bit Microprocessor

Bit Microprocessor --

1981

The HP Focus Chip, Hewlett

The HP Focus Chip, Hewlett--

Packard Co

Packard Co 450 000

450 000

Packard Co.

Packard Co. –– 450,000

450,000

Transistors

THE VERY L RGE C LE

THE VERY LARGE SCALE

INTEGRATED CIRCUIT

ERA BEGINS

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Analogowe układy CMOS w technice VLSI

Microprocesor Intel Pentium

Microprocesor Intel Pentium 44 ((200

20011))

Microprocesor Intel Pentium

Microprocesor Intel Pentium 44 ((200

20011))

((

))

((

))

42 millions transistors on

one chip

Freq.

Freq. –– 1.5 GHz

1.5 GHz

Techn.

Techn. –– 0.18

0.18μμ

Techn.

0.18

0.18μμ

Performing billions of

l l

calculations each second

The density of the

transistors is more than

100k/mm

40 transistor will fit on

W.Kucewicz

Analogowe układy CMOS w technice VLSI

40 transistor will fit on

the cross section of the

hair.

Today

Todayyyyy

Many disciplines have contributed to the current

state of the art

state of the art in VLSI design:

in VLSI design:

state of the art

state of the art in VLSI design:

in VLSI design:

solid

solid--state physics

state physics

materials science

materials science
lithography and fab

lithography and fabrication

rication

device modeling

device modeling
circuit design & layout

circuit design & layout
architecture

architecture

algorithms

algorithms
CAD tools

CAD tools

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Analogowe układy CMOS w technice VLSI

Computer Aided Design

Computer Aided Design –– CAD

CAD

Computer Aided Design

Computer Aided Design –– CAD

CAD

CAD tools are doing following tasks:

•• organize

organize

•• generate

generate

•• organize

organize

•• generate

generate

•• generate

generate

•• verify

verify

•• generate

generate

•• verify

verify

The main g

The main goal

oal of using CAD is

of using CAD is designing circuits with

designing circuits with

The main g

The main goal

oal of using CAD is

of using CAD is designing circuits with

designing circuits with

increasing complexity in

increasing complexity in always shorter times

always shorter times

computer has to take over routine work

computer has to take over routine work
deliberate the designer from unnecessary low

deliberate the designer from unnecessary low qualification work

qualification work

shift of design activities to higher level abstract

shift of design activities to higher level abstract work

work

W.Kucewicz

Analogowe układy CMOS w technice VLSI

shift of design activities to higher level abstract

shift of design activities to higher level abstract work

work

computer has to support new design methods

Computer Aided Design

Computer Aided Design –– CAD

CAD

Computer Aided Design

Computer Aided Design –– CAD

CAD

CAD tools are doing following tasks:

•• organize

organize

•• generate

generate

•• organize

organize

•• generate

generate

•• generate

generate

•• verify

verify

•• generate

generate

•• verify

verify

The main g

The main goal

oal of using CAD is

of using CAD is designing circuits with

designing circuits with

The main g

The main goal

oal of using CAD is

of using CAD is designing circuits with

designing circuits with

increasing complexity in

increasing complexity in always shorter times

always shorter times

computer has to take over routine work

computer has to take over routine work
deliberate the designer from unnecessary low

deliberate the designer from unnecessary low qualification work

qualification work

shift of design activities to higher level abstract

shift of design activities to higher level abstract work

work

W.Kucewicz

Analogowe układy CMOS w technice VLSI

shift of design activities to higher level abstract

shift of design activities to higher level abstract work

work

computer has to support new design methods

Gate Array, Semi

Gate Array, Semi--Custom, and Full

Custom, and Full--

Custom ICs

Gate Array, Semi

Gate Array, Semi--Custom, and Full

Custom, and Full--

Custom ICs

VLSI Technology

Gate Array

Standard Cell

Chip Area Ratios:

3:2:1

Chip Area Ratios:

3:2:1

Standard Cell

Full Custom

W.Kucewicz

Analogowe układy CMOS w technice VLSI

Progress in VLSI

production

Progress in VLSI

production

W.Kucewicz

Analogowe układy CMOS w technice VLSI

Prawo Moore’a

w M

W roku 1965 Gordoon Moore

(założyciel firm Fairchild i Intel)

przewidział, że liczba tranzystorów

w układzie scalonym będzie

zwiększała się eksponencjalnie w

funkcji czasu

funkcji czasu ..

W l t h 80

W l t h 80 t h k

b i

t h k

b i

W latach 80

W latach 80--tych przekroczono barierę

tych przekroczono barierę

1 miliona tranzystorów upakowanych w

jednej strukturze

jednej stru turze

•• 2300 transistors (Intel 4004)

2300 transistors (Intel 4004) –

– 1971

1971

42 Milli

(I t l P4)

42 Milli

(I t l P4) 2001

2001

W.Kucewicz

Analogowe układy CMOS w technice VLSI

•• 42 Million (Intel P4)

42 Million (Intel P4) -- 2001

2001

Postęp w produkcji układów scalonych

ęp w p

u j u

ęp w p

u j u

ęp w p

u j u

ęp w p

u j u

G.Moore - Cramming more

components onto integrated circuits

- Electronics, Volume 38, Number 8,

April 19 1965

April 19, 1965

Ilość tranzystorów w układzie scalonym podwaja się w

W.Kucewicz

Analogowe układy CMOS w technice VLSI

Ilość tranzystorów w układzie scalonym podwaja się w

ciagu roku

Technology Influence

f u

0.18 µm

0.5 µm

0.12µm

Devices

1999

2002

1993

3 layers

7 layers

8 layers

Interconnects

1200 MH

Frequency

W.Kucewicz

Analogowe układy CMOS w technice VLSI

120MHz

500MHz

1200 MHz

Technology progress

gy p g

199

19922

200

20022

0 7µm 2 metal layers

0.12µm, 7 metal layers

199

19922

200

20022

0.7µm, 2 metal layers

Up to 100,000 devices on a chip

CPU frequency 50MHz

0. µm, 7 metal layers

Up to 500,000,000 devices

CPU frequency 1,5GHz

1000 pins

40 pins

10 years of

W.Kucewicz

Analogowe układy CMOS w technice VLSI

evolution

Postęp w produkcji procesorów

ęp w p

u j p

ęp w p

u j p

ęp w p

u j p

ęp w p

u j p

P. Gargini – Sailing with the ITRS into nanotechnology - 2004

W.Kucewicz

Analogowe układy CMOS w technice VLSI

Ilość tranzystorów w układzie podwaja się w ciagu 2 lat

Postęp w produkcji procesorów

ęp w p

u j p

ęp w p

u j p

ęp w p

u j p

ęp w p

u j p

P. Gargini – Sailing with the ITRS into nanotechnology - 2004

W.Kucewicz

Analogowe układy CMOS w technice VLSI

Powierzchnia układu scalonego podwaja się w ciagu 6 lat

Nanotechnologia

P. Gargini – Sailing with the ITRS into nanotechnology - 2004

W.Kucewicz

Analogowe układy CMOS w technice VLSI

Reasonably familiar Nanotube Different technology

DRAM chip capacity evolution

Memory/chip

ddoubles every 1.5 year

oubles every 1.5 year

p)p)

ts/chi

y (kBi

Year

emor

W.Kucewicz

Analogowe układy CMOS w technice VLSI

Cost per Transistor

pppp

cost:

¢¢--per

per--transistor

transistor

Fabrication capital cost per

transistor (Moore’s law)

0.01

0.1

transistor (Moore s law)

0.0001

0.001

0.000001

0.00001

0.0000001

1982

1985

1988

1988 1991

1991

1994

1997

2000

2003

2003 2006

2006

2009

2012

W.Kucewicz

Analogowe układy CMOS w technice VLSI

Wiring Levels and Mask Levels

g L

els

r of

Lev

Max. Wiring Levels

10 10

Numbe

mProcessor Mask Levels

2001 2002 2003 2004 2005 2006 2007 2010 2013 2016

Year

W.Kucewicz

Analogowe układy CMOS w technice VLSI

Year

On--Chip Clock

Chip Clock

φφ

and Power Supply

On--Chip Clock

Chip Clock

φφ

and Power Supply

1 2

28,751

0,9

1,1

Hz)

1,2

)

19 348

0 6

0,7

0,9

uency (

0,8

y (Volts

11 511

19,348

0,4

0,5

0,6

ock Freq

0 4

0,6

er Suppl

Clock Frequency
VDD

11,511

6,739

5,631

5,173

3,99

3,088

2,317

1,684

Chip Cl

0,2

0,4

Pow

VDD

2001 200220032004 20052006 20072010 2013 2016

W.Kucewicz

Analogowe układy CMOS w technice VLSI

Year

μμ

Processor and DRAM Fault Density

Targets

μμ

Processor and DRAM Fault Density

Targets

2493

2748

3000

1963

2493

2148

1752

2236

2000

2500

1464

1426

1356 1356

1500

2000

ts /

1356 1356 1356 1356 1356 1356 1356

1134

1116

1356

1000

Faul

Processor (83% yield)

500

Processor (83% yield)

DRAM (89.5% yield)

2001 2002 2003 2004 2005 2006 2007 2010 2013 2016

Year

W.Kucewicz

Analogowe układy CMOS w technice VLSI

Long

Long--Term Trends

Term Trends

Long

Long--Term Trends

Term Trends

L g

1. IC market growth averaged 17% per year

IC market growth averaged 17% per year

CMOS circuits represent more than 75% of the world’s

semiconductors

3. 16% annual chip feature size reduction 1995

16% annual chip feature size reduction 1995--2001

2001

4. 11% annual chip feature size reduction 2002

11% annual chip feature size reduction 2002 –– future

future

5. DRAM chip size increases 12% / year

DRAM chip size increases 12% / year

6. Pins/balls on packages increase 10% / year

Pins/balls on packages increase 10% / year

7. Pin cost decreases 5% / year

Pin cost decreases 5% / year

8. Average package cost increases 5% / year

Average package cost increases 5% / year

9. Packaging share of system cost doubles over 15 years

Packaging share of system cost doubles over 15 years

Drives migration to SoC,

Multi-Chip Modules

(MCMs)

SIP devices

W.Kucewicz

Analogowe układy CMOS w technice VLSI

Postęp w produkcji płytek krzemowych

ęp w p

u j p y

z m wy

ęp w p

u j p y

z m wy

ęp w p

u j p y

z m wy

ęp w p

u j p y

z m wy

P. Gargini – Sailing with the ITRS into nanotechnology - 2004

W.Kucewicz

Analogowe układy CMOS w technice VLSI

Powierzchnia płytki krzemowej podwaja się w ciagu 8 lat

Mikroelektronika

Mikroelektronika Î

Nanotechnologia

Mikroelektronika

Mikroelektronika Î

Nanotechnologia

M r

tr n a

M r

tr n a

Nan t chn g a

M r

tr n a

M r

tr n a

Nan t chn g a

P. Gargini – Sailing with the ITRS into nanotechnology - 2004

W.Kucewicz

Analogowe układy CMOS w technice VLSI

Powierzchnia płytki krzemowej podwaja się w ciagu 8 lat

Mikroelektronika

Mikroelektronika Î

Nanotechnologia

Mikroelektronika

Mikroelektronika Î

Nanotechnologia

M r

tr n a

M r

tr n a

Nan t chn g a

M r

tr n a

M r

tr n a

Nan t chn g a

P. Gargini – Sailing with the ITRS into nanotechnology - 2004

W.Kucewicz

Analogowe układy CMOS w technice VLSI

Powierzchnia płytki krzemowej podwaja się w ciagu 8 lat

Technology Directions

gy D

Year

1999

2002

2005

2008

2011

2014

Feature size [nm]

180

130

100

Feature size [nm]

180

130

100

Mtrans/cm

14--26

115

284

701

Chip size [mm

]]

170

170--214

214

235

269

308

354

Chip size [mm

Chip size [mm ]]

170

170 214

214

235

269

308

354

Signal pins/chip

768

1024

1280

1408

1472

Wiring levels

66--77

77--88

88--99

99--10

Power supp [V]

1.8

1.5

1.2

0.8

0.6

Power [W]

130

180

170

174

183

Battery power [W]

1.4

2.0

2.4

2.0

2.2

2.4

W.Kucewicz

Analogowe układy CMOS w technice VLSI

Moore’s Law Predictions

Moore’s Law Predictions –– 2025?

2025?

Moore’s Law Predictions

Moore’s Law Predictions –– 2025?

2025?

L w

Assumptions in 1995 based on 1960

Assumptions in 1995 based on 1960--1995

1995

Transistors per chip doubles every 1.5 years

Minimum feature size is cut in half every six years

Chip area goes up 2.3 times every six years

Manufacturing costs remain about constant

This leads us to the following predictions

Wafer size will be

32 inches!

A wafer fabrication will cost a tens of G$

3 b 6 i h

The chips will be

3 by 6 inches

The minimum feature size will be

100 Angstroms

(which is

about 5 photoresist molecules wide)

A Memory chip will hold

64 TERA bits

W.Kucewicz

Analogowe układy CMOS w technice VLSI

will they come true?!

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