Arytmetyka resztowa HDL



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ELM



Verilog

Verilog

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data flow






PPA ELM







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AND OR XOR

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PPA
module GP (gh, ph, gl, pl, g, p); // (g,p) = (gh, ph) o
(gl, pl)
input gh, ph, gl, pl;
output g, p;
assign g = gh | ph & gl;
assign p = ph & pl;
endmodule
module LF_PPA8 (x, y, s, gg, pp); // sumator 8-
bitowy LF-PPA
input [7:0] x, y;
output [7:0] s, gg, pp;
wire [7:0] g, p, h, g1, p1, g2, p2;
// preprocessing GPH
assign g[7:0] = x[7:0] & y[7:0];
assign p[7:0] = x[7:0] | y[7:0];
assign h[7:0] = x[7:0] ^ y[7:0];
assign gg[0] = g[0];
assign pp[0] = p[0];
// L1: GP1:0, GP3:2, GP5:4, GP7:6
GP inst01 (g[1], p[1], g[0], p[0], gg[1], pp[1]);
//1 0
GP inst02 (g[3], p[3], g[2], p[2], g1[3], p1[3]);
//3 2
GP inst03 (g[5], p[5], g[4], p[4], g1[5], p1[5]);
//5 4
GP inst04 (g[7], p[7], g[6], p[6], g1[7], p1[7]);
//7 6
// L2: GP2:0, GP3:0, GP6:4, GP7:4
GP inst11 (g[2], p[2], gg[1], pp[1], gg[2], pp[2]);
//2 0
GP inst12 (g1[3], p1[3], gg[1], pp[1], gg[3], pp[3]);
//3 0
GP inst13 (g[6], p[6], g1[5], p1[5], g2[6], p2[6]);
//6 4
GP inst14 (g1[7], p1[7], g1[5], p1[5], g2[7], p2[7]);
//7 4
// L3: GP4:0, GP5:0, GP6:0, GP7:0
GP inst21 (g[4], p[4], gg[3], pp[3], gg[4], pp[4]);
//4 0
GP inst22 (g1[5], p1[5], gg[3], pp[3], gg[5], pp[5]);
//5 0
GP inst23 (g2[6], p2[6], gg[3], pp[3], gg[6], pp[6]);
//6 0
GP inst24 (g2[7], p2[7], gg[3], pp[3], gg[7], pp[7]);
//7 0
assign s[7:1] = h[7:1] ^ gg[6:0], h[0];
endmodule

PPA
module GP (gh, ph, gl, pl, g, p); // (g,p) = (gh, ph) o
(gl, pl)
input gh, ph, gl, pl;
output g, p;
Arytmetyka resztowa.doc 25 pazdziernika, 2007

assign g = gh | ph & gl;
assign p = ph & pl;
endmodule
module LF_PPA8 (x, y, s, gg, pp); // sumator 8-
bitowy KS-PPA
input [7:0] x, y;
output [7:0] s, gg, pp;
wire [7:0] g, p, h, g1, p1, g2, p2;
// preprocessing GPH
assign g[7:0] = x[7:0] & y[7:0];
assign p[7:0] = x[7:0] | y[7:0];
assign h[7:0] = x[7:0] ^ y[7:0];
assign gg[0] = g[0];
assign pp[0] = p[0];
// L1: GP1:0, GP2:1, & GP7:6
GP inst01 (g[1], p[1], g[0], p[0], gg[1], pp[1]);
//1 0
GP inst02 (g[2], p[2], g[1], p[1], g1[2], p1[2]);
//2 1
GP inst03 (g[3], p[3], g[2], p[2], g1[3], p1[3]);
//3 2
GP inst04 (g[4], p[4], g[3], p[3], g1[4], p1[4]);
//4 3
GP inst05 (g[5], p[5], g[4], p[4], g1[5], p1[5]);
//5 4
GP inst06 (g[6], p[6], g[5], p[5], g1[6], p1[6]);
//6 5
GP inst07 (g[7], p[7], g[6], p[6], g1[7], p1[7]);
//7 6
// L2: GP2:0, GP3:0, GP4:1,& GP7:4
GP inst12 (g1[2], p1[2], gg[0], pp[0], gg[2], pp[2]);
//2 0
GP inst13 (g1[3], p1[3], g1[1], p1[1], gg[3], pp[3]);
//3 0
GP inst14 (g1[4], p1[4], g1[2], p1[2], g2[4], p2[4]);
//4 1
GP inst15 (g1[5], p1[5], g1[3], p1[3], g2[5], p2[5]);
//5 2
GP inst16 (g1[6], p1[6], g1[4], p1[4], g2[6], p2[6]);
//6 3
GP inst17 (g1[7], p1[7], g1[5], p1[5], g2[7], p2[7]);
//7 4
// L3: GP2:0, GP3:0, GP4:1,& GP7:4
GP inst24 (g2[4], p2[4], gg[0], pp[0], gg[4], pp[4]);
//4 0
GP inst25 (g2[5], p2[5], gg[1], pp[1], gg[5], pp[5]);
//5 0
GP inst26 (g2[6], p2[6], gg[2], pp[2], gg[6], pp[6]);
//6 0
GP inst27 (g2[7], p2[7], gg[3], pp[3], gg[7], pp[7]);
//7 0
assign s[7:0] = h[7:1] ^ c[6:0], h[0];
endmodule

PPA U2 NB


module UNI1_PPA8 (d, x, y, s, v); // sumator 8-
bitowy UNI-PPA z wyjściami g,p
input [7:0] x, y;
input d;
output [7:0] s;
output v;
wire [7:0] a, z;
wire [8:0] b;
assign w[7:0] = y[7:0] ^{8{d}}; // sterowanie
wejścia add/sub
assign a[7:0] = x[7:0] ^ w[7:0];// wejściowy CSA -
suma
assign b[8:1] = x[7:0] @ w[7:0]; // wejściowy CSA
- przeniesienie
assign b[0] = d;
LF_PPA8 inst1 (a, b, s, gg, pp); // sumator 8-bitowy LF-
PPA (lub KS)
assign v = (b[8] | gg[7]) ^ gg[6];
endmodule

PPA U2 NB
module UNI2_PPA8 (d, x, y, s, v); // sumator 8-
bitowy UNI-PPA z wyjściami g,p
input [7:0] x, y;
input d;
output [7:0] s;
output v;
wire [7:0] z, h, r;
assign w[7:0] = y[7:0] ^ {8{d}}; // sterowanie
wejścia add/sub
assign h[7:0] = x[7:0] ^ w[7:0];// sterowanie wejścia
add/sub
LF_PPA8 inst1 (x, w, r, gg, pp); // sumator 8-bitowy LF-
PPA (lub KS)
assign s[7:0] = h[7:0] ^ (gg[7:0] | pp[7:0] &{8{d}};
assign v = gg[7]) ^ gg[6];
endmodule







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XOR
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module GP (gh, ph, gl, pl, g, p); // (g,p) = (gh, ph) o
(gl, pl)
input gh, ph, gl, pl;
output g, p;
assign g = gh | ph & gl;
assign p = ph & pl;
endmodule
module ELM_8_ORG (x, y, s); // This is an original 8-bit
ELM
input [7:0] x, y;
output [7:0] s, gg, hh;
wire [7:0] g, h, g1, h1, s1, g2, h2, s2;
assign g[7:0] = x[7:0] & y[7:0]; // preprocessing
HA
assign h[7:0] = x[7:0] ^ y[7:0];
assign s1[7] = h[7] ^ g[6];
assign s1[5] = h[5] ^ g[4];
assign s1[3] = h[3] ^ g[2];
assign s1[1] = h[1] ^ g[0];
GP inst11 (g[1], h[1], g[0], h[0], g1[1], h1[1]);
GP inst13 (g[3], h[3], g[2], h[2], g1[3], h1[3]);
GP inst15 (g[5], h[5], g[4], h[4], g1[5], h1[5]);
GP inst17 (g[7], h[7], g[6], h[6], g1[7], h1[7]);
assign s2[7] = s1[7] ^ (h[6] & g1[5]);
assign s2[6] = h[6] ^ g1[5];
assign s2[3] = s1[3] ^ (h[2] & g1[1]);
assign s2[2] = h[2] ^ g1[1];
GP inst23 (g1[3], h1[3], g1[1], h1[1], g2[3], h2[3]);
GP inst27 (g1[7], h1[7], g1[5], h1[5], g2[7], h2[7]);
assign h2[6] = h[6] & h1[5];
assign h2[2] = h[2] & h1[1];
GP inst37 (g2[7], h2[7], g2[3], h2[3], gg[7], hh[7]);
assign s[7] = s2[7] ^ (h2[6] & g2[3]);
assign s[6] = s2[6] ^ (h1[5] & g2[3]);


assign s[5] = s2[5] ^ (h[4] & g2[3]);
assign s[4] = h[4] ^ g2[3];
assign s[3:0] = s2[3:2], s1[1], h[0];
endmodule




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module GPG (gh, ph, gl, pl, g, p);
input gh, ph, gl, pl;
output g, p;
assign g = gh | ph & gl;
assign p = gh | ph & pl; / double zero: p = ph &
pl;
endmodule
module BJ4 (x, y, s);
input [3:0] x, y;
output [3:0] s;
wire [3:0] g, p, h, g1, p1, g2, p2, c;
assign g[3:0] = x[3:0] & y[3:0]; // preprocessing
GPH
assign p[3:0] = x[3:0] | y[3:0];
assign h[3:0] = x[3:0] ^ y[3:0];
GPG inst8 (g[0], p[0], g[3], p[3], g1[0], p1[0]);
GPG inst9 (g[1], p[1], g[0], p[0], g1[1], p1[1]);
GPG inst10 (g[2], p[2], g[1], p[1], g1[2], p1[2]);
GPG inst11 (g[3], p[3], g[2], p[2], g1[3], p1[3]);
assign c[3:0] = g2[3:0] | p2[3:0] & {p2[1:0],
p2[3:2]};
assign s[3:0] = h[3:0] ^ {c[2:0], c[3]};
endmodule

module GPG (gvert, pvert, glat, plat, gnext, pnext);
input gvert, pvert, glat, plat;
output gnext, pnext;
assign gnext = gvert | pvert & glat;
assign pnext = gvert | pvert & plat; // double zero:
pnext = pvert & plat;
endmodule
module BJ5(x, y, s);
input [4:0] x, y;
output [4:0] s;
wire [4:0] g, p, h, g1, p1, g2, p2, c;
assign g[4:0] = x[4:0] & y[4:0]; // preprocessing
GPH
assign p[4:0] = x[4:0] | y[4:0];
assign h[4:0] = x[4:0] ^ y[4:0];
GPG inst8 (g[0], p[0], g[4], p[4], g1[0], p1[0]);
GPG inst9 (g[1], p[1], g[0], p[0], g1[1], p1[1]);



GPG inst10 (g[2], p[2], g[1], p[1], g1[2], p1[2]);
GPG inst11 (g[3], p[3], g[2], p[2], g1[3], p1[3]);
GPG inst12 (g[4], p[4], g[3], p[3], g1[4], p1[4]);
GPG inst16 (g1[0], p1[0], g1[3], p1[3], g2[0], p2[0]);
GPG inst17 (g1[1], p1[1], g1[4], p1[4], g2[1], p2[1]);
GPG inst18 (g1[2], p1[2], g1[0], p1[0], g2[2], p2[2]);
GPG inst19 (g1[3], p1[3], g1[1], p1[1], g2[3], p2[3]);
GPG inst20 (g1[4], p1[4], g1[2], p1[2], g2[4], p2[4]);
assign c[4:0] = g2[4:0] | (p2[4:0] & {p2[0], p2[4:1]};
assign s[4:0] = h[4:0] ^ {c[3:0], c[4]};
endmodule

module GPG (gh, ph, gl, pl, g, p);
input gh, ph, gl, pl;
output g, p;
assign g = gh | ph & gl;
assign p = gh | ph & pl; / double zero: p = ph &
pl;
endmodule
module BJ6(x, y, s);
input [5:0] x, y;
output [5:0] s;
wire [5:0] g, p, h, g1, p1, g2, p2, c;
assign g[5:0] = x[5:0] & y[5:0]; // preprocessing
GPH
assign p[5:0] = x[5:0] | y[5:0];
assign h[5:0] = x[5:0] ^ y[5:0];
GPG inst8 (g[0], p[0], g[5], p[5], g1[0], p1[0]);
GPG inst9 (g[1], p[1], g[0], p[0], g1[1], p1[1]);
GPG inst10 (g[2], p[2], g[1], p[1], g1[2], p1[2]);
GPG inst11 (g[3], p[3], g[2], p[2], g1[3], p1[3]);
GPG inst12 (g[4], p[4], g[3], p[3], g1[4], p1[4]);
GPG inst13 (g[5], p[5], g[4], p[4], g1[5], p1[5]);
GPG inst16 (g1[0], p1[0], g1[4], p1[4], g2[0], p2[0]);
GPG inst17 (g1[1], p1[1], g1[5], p1[5], g2[1], p2[1]);
GPG inst18 (g1[2], p1[2], g1[0], p1[0], g2[2], p2[2]);
GPG inst19 (g1[3], p1[3], g1[1], p1[1], g2[3], p2[3]);
GPG inst20 (g1[4], p1[4], g1[2], p1[2], g2[4], p2[4]);
GPG inst21 (g1[5], p1[5], g1[3], p1[3], g2[5], p2[5]);
assign c[5:0] = g2[5:0] | (p2[5:0] & {p2[1:0],
p2[5:2]};
assign s[5:0] = h[5:0] ^ {c[4:0], c[5]};
endmodule

module GPG (gh, ph, gl, pl, g, p);
input gh, ph, gl, pl;
output g, p;
assign g = gh | ph & gl;
assign p = gh | ph & pl; / double zero: p = ph &
pl;
endmodule
module BJ7 (x, y, s);
input [6:0] x, y;
output [6:0] s;
wire [6:0] g, p, h, g1, p1, g2, p2, c;

k

assign g[6:0] = x[6:0] & y[6:0]; // preprocessing
GPH
assign p[6:0] = x[6:0] | y[6:0];
assign h[6:0] = x[6:0] ^ y[6:0];
GPG inst8 (g[0], p[0], g[6], p[6], g1[0], p1[0]);
GPG inst9 (g[1], p[1], g[0], p[0], g1[1], p1[1]);
GPG inst10 (g[2], p[2], g[1], p[1], g1[2], p1[2]);
GPG inst11 (g[3], p[3], g[2], p[2], g1[3], p1[3]);
GPG inst12 (g[4], p[4], g[3], p[3], g1[4], p1[4]);
GPG inst13 (g[5], p[5], g[4], p[4], g1[5], p1[5]);
GPG inst14 (g[6], p[6], g[5], p[5], g1[6], p1[6]);
GPG inst16 (g1[0], p1[0], g1[5], p1[5], g2[0], p2[0]);
GPG inst17 (g1[1], p1[1], g1[6], p1[6], g2[1], p2[1]);
GPG inst18 (g1[2], p1[2], g1[0], p1[0], g2[2], p2[2]);
GPG inst19 (g1[3], p1[3], g1[1], p1[1], g2[3], p2[3]);
GPG inst20 (g1[4], p1[4], g1[2], p1[2], g2[4], p2[4]);
GPG inst21 (g1[5], p1[5], g1[3], p1[3], g2[5], p2[5]);
GPG inst22 (g1[6], p1[6], g1[4], p1[4], g2[6], p2[6]);
assign c[6:0] = g2[6:0] | (p2[6:0] & {p2[2:0],
p2[6:3]};
assign s[6:0] = h[6:0] ^ {c[5:0], c[6]};
endmodule

module GPG (gh, ph, gl, pl, g, p);
input gh, ph, gl, pl;
output g, p;
assign g = gh | ph & gl;
assign p = gh | ph & pl; / double zero: p = ph &
pl;
endmodule
module BJ8 (x, y, s);
input [7:0] x, y;
output [7:0] s;
wire [7:0] g, p, h, g1, p1, g2, p2, c;
// preprocessing GPH
assign g[7:0] = x[7:0] & y[7:0];
assign p[7:0] = x[7:0] | y[7:0];
assign h[7:0] = x[7:0] ^ y[7:0];
GPG inst8 (g[0], p[0], g[7], p[7], g1[0], p1[0]);
GPG inst9 (g[1], p[1], g[0], p[0], g1[1], p1[1]);
GPG inst10 (g[2], p[2], g[1], p[1], g1[2], p1[2]);
GPG inst11 (g[3], p[3], g[2], p[2], g1[3], p1[3]);
GPG inst12 (g[4], p[4], g[3], p[3], g1[4], p1[4]);
GPG inst13 (g[5], p[5], g[4], p[4], g1[5], p1[5]);
GPG inst14 (g[6], p[6], g[5], p[5], g1[6], p1[6]);
GPG inst15 (g[7], p[7], g[6], p[6], g1[7], p1[7]);
GPG inst16 (g1[0], p1[0], g1[6], p1[6], g2[0], p2[0]);
GPG inst17 (g1[1], p1[1], g1[7], p1[7], g2[1], p2[1]);
GPG inst18 (g1[2], p1[2], g1[0], p1[0], g2[2], p2[2]);
GPG inst19 (g1[3], p1[3], g1[1], p1[1], g2[3], p2[3]);
GPG inst20 (g1[4], p1[4], g1[2], p1[2], g2[4], p2[4]);
GPG inst21 (g1[5], p1[5], g1[3], p1[3], g2[5], p2[5]);
GPG inst22 (g1[6], p1[6], g1[4], p1[4], g2[6], p2[6]);
GPG inst23 (g1[7], p1[7], g1[5], p1[5], g2[7], p2[7]);
Arytmetyka resztowa.doc, Janusz Biernat

assign c[7:0] = g2[7:0] | (p2[7:0] & {p2[3:0],
p2[7:4]};
assign s[7:0] = h[7:0] ^ {c[6:0], c[7]};
endmodule

k
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CSD

NB



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GP i GP i k

PPA
k



module GP (gh, ph, gl, pl, g, p); // (g,p) = (gh, ph) o
(gl, pl)
input gh, ph, gl, pl;
output g, p;
assign g = gh | ph & gl;
assign p = ph & pl;
endmodule
module TPP17_TC (x, y, r); // TPP modulo 17
(2E4P1)
input [4:0] x, y;
output [4:0] r;
wire [4:0] s, c, g2;
wire xy;
wire [4:1] p, g, g1, p1;
assign s[4:0] = {x[4] ^ y[4], ~(x[3:0] ^ y[3:0])}; //
HA and HA* stage
assign c[4:0] = {x[4] & y[4], x[3:0] | y[3:0]};
assign xy=x[0] & y[0]; // xy = a0 & b0
assign p[4:1] = {s[4:2] ^ c[3:1], s[1] | xy};
assign g[4:1] = {(s[4] & c[3]) | c[4], s[3:1] & c[2:0]};
// First Prefix Level
GP inst0_4 (g[4], p[4], g[3], p[3], g1[4], p1[4]);
GP inst0_3 (g[3], p[3], g[2], p[2], g1[3], p1[3]);
GP inst0_2 (g[2], p[2], g[1], p[1], g1[2], p1[2]);
GP inst0_1 (~p[1], ~g[1], g[4], p[4], g1[1], p1[1]);
// Last Prefix Level

k
assign g2[4] = g1[4] | p1[4] & g1[2]; // not c(-1)
assign g2[0] = ~g2[4] & ~s[0]; // not c(0)
assign g2[1] = g1[1] | p1[1] & g1[3]; // not c(1)
assign g2[2] = g1[2] | p1[2] & ~g1[4]; // c2
// Sum computation
assign r[4] =~c[4] & p2[4] & p1[1] & s[0]; // s[0]
można pominąć
assign r[3] = g2[2] ^ p[3];
assign r[2:1]= ~g2[1:0] ^ p[2:1];
assign r[0] = ~g2[4] ^ p[0]
endmodule

module GP (gh, ph, gl, pl, g, p); // (g,p) = (gh, ph) o
(gl, pl)
input gh, ph, gl, pl;
output g, p;
assign g = gh | ph & gl;
assign p = ph & pl;
endmodule
module GGS (gh, ph, gl, g); // (g, ) = (gh, ph) o (gl,
)
input gh, ph, gl;
output g;
assign g = gh | ph & gl;
endmodule
module TPP33_TC (x, y, r); // TPP modulo 33
(2E5P1)
input [5:0] x, y;
output [5:0] r;
wire [5:0] s, c;
wire c_;
wire [5:1] p, g, g1, p1, g2, p2, g3;
wire [3:2] g1_, p1_;
wire [3:1] t, g_;
// HA and HA* stage
assign s[5:0] = {x[5] ^ y[5], ~(x[4:0] ^ y[4:0])};
assign c[5:0] = {x[5] & y[5], x[4:0] | y[4:0]};
// Preprocessing stage. Propagate, Generate and t signal
generation
assign c_=x[0] & y[0];
assign p[5:1] = {s[5:2] ^ c[4:1], (s[1] ^ c[0]) & s[0]};
assign g[5:1] = {(s[5] & c[4]) | c[5], s[4:1] & c[3:0]};
assign t[3:1] = ~{s[3:2] | c[2:1], s[1] | c_};
assign g_[3:1] = ~g[3:1];
// First Prefix Level
GP inst0_5 (g[5], p[5], g[4], p[4], g1[5], p1[5]);
GP inst0_4 (g[4], p[4], g[3], p[3], g1[4], p1[4]);
GP inst0_3 (g[3], p[3], g[2], p[2], g1[3], p1[3]);
GP inst0_3a (t[3], g_[3], t[2], g_[2], g1_[3], p1_[3]);
GP inst0_2 (g[2], p[2], g[1], p[1], g1[2], p1[2]);
GP inst0_2a (t[2], g_[2], t[1], g_[1], g1_[2], p1_[2]);
GP inst0_1 (t[1], g_[1], g[5], p[5], g1[1], p1[1]);
// Second Prefix Level
GP inst1_5 ( g1[5], p1[5], g1[3], p1[3], g2[5],
p2[5]);
Arytmetyka resztowa.doc, Janusz Biernat

GGS inst1_4 ( g1[4], p1[4], g1[2], g2[4]);
GP inst1_3 (g1_[3], p1_[3], g1[1], p1[1], g2[3],
p2[3]);
GP inst1_2 (g1_[2], p1_[2], g1[5], p1[5], g2[2],
p2[2]);
GP inst1_1 ( g1[1], p1[1], g1[4], p1[4], g2[1],
p2[1]);
// Third and Last Prefix Level // GGS (gh, ph, gl, g) !
assign g = gh | ph & gl
assign g3[3:1] = g2[3:1] | p2[3:1] & {g2[2:1], g2[5]};
assign g3[5] = g2[5] | p2[5] & g2[4];
// Sum computation
assign r[5] =~c[5] & p2[5] & p1[2] & s[0]; // s[0]
można pominąć
assign r[4:2] = p[4:2] ^ {~g3[3:1]};
assign r[1] = s[1] ^ c[0] ^ (s[0] & ~g3[5]);
assign r[0] = s[0] ^ ~g3[5];
endmodule

module GP (gh, ph, gl, pl, g, p); // (g,p) = (gh, ph) o
(gl, pl)
input gh, ph, gl, pl;
output g, p;
assign g = gh | ph & gl;
assign p = ph & pl;
endmodule
module GGS (gh, ph, gl, g); // (g, ) = (gh, ph) o (gl,
)
input gh, ph, gl;
output g;
assign g = gh | ph & gl;
endmodule
module TPP65_TC (x, y, r); // TPP modulo 65
(2E4P1)
input [6:0] x, y;
output [6:0] r;
wire [6:0] s, c;
wire c_;
wire [6:1] p, g, g1, p1, g2, p2, g3;
wire [3:2] g1_, p1_;
wire [3:1] t, g_;
// HA and HA* stage
assign s[6:0] = {x[6] ^ y[6], ~(x[5:0] ^ y[5:0])};
assign c[6:0] = {x[6] & y[6], x[5:0] | y[5:0]};
// Preprocessing stage. Propagate, Generate and t signal
generation
assign c_=x[0] & y[0];
assign p[6:1] = {s[6:2] ^ c[5:1], (s[1] ^ c[0]) & s[0]};
assign g[6:1] = {(s[6] & c[5]) | c[6], s[5:1] & c[4:0]};
assign t[3:1] = ~{s[3:2] | c[2:1], s[1] | c_};
assign g_[3:1] = ~g[3:1];
// First Prefix Level
GP inst0_6 (g[6], p[6], g[5], p[5], g1[6], p1[6]);
GP inst0_5 (g[5], p[5], g[4], p[4], g1[5], p1[5]);
GP inst0_4 (g[4], p[4], g[3], p[3], g1[4], p1[4]);

k
GGS inst0_3 (g[3], p[3], g[2], g1[3]);
GP inst0_3a (t[3], g_[3], t[2], g_[2], g1_[3], p1_[3]);
GP inst0_2 (g[2], p[2], g[1], p[1], g1[2], p1[2]);
GP inst0_2a (t[2], g_[2], t[1], g_[1], g1_[2], p1_[2]);
GP inst0_1 (t[1], g_[1], g[6], p[6], g1[1], p1[1]);
// Second Prefix Level
GP inst1_6 ( g1[6], p1[6], g1[4], p1[4], g2[6],
p2[6]);
GGS inst1_5 ( g1[5], p1[5], g1[3], g2[5]);
GP inst1_4 ( g1[4], p1[4], g1[2], p1[2], g2[4],
p2[4]);
GP inst1_3 (g1_[3], p1_[3], g1[1], p1[1], g2[3],
p2[3]);
GP inst1_2 (g1_[2], p1_[2], g1[6], p1[6], g2[2],
p2[2]);
GP inst1_1 ( g1[1], p1[1], g1[5], p1[5], g2[1],
p2[1]);
// Third and Last Prefix Level // g_node(gh, ph, gl, g) !
assign g = gh | ph & gl
assign g3[4:1] = g2[4:1] | p2[4:1] & {~g2[2], g2[1],
g2[6:5]};
assign g3[6] = g2[6] | p2[6] & g2[4];
// Sum computation
assign r[6] =~c[6] & p2[6] & p2[4] & s[0]; // s[0]
można pominąć
assign r[5:2] = p[5:2] ^ {g3[4], ~g3[3:1]};
assign r[1] = s[1] ^ c[0] ^ (s[0] & ~g3[6]);
assign r[0] = s[0] ^ ~g3[6];
endmodule

// TPP modulo 129 (2E7P1)
module GP (gh, ph, gl, pl, g, p); // (g,p) = (gh, ph) o
(gl, pl)
input gh, ph, gl, pl;
output g, p;
assign g = gh | ph & gl;
assign p = ph & pl;
endmodule
module GGS (gh, ph, gl, g); // (g, ) = (gh, ph) o (gl,
)
input gh, ph, gl;
output g;
assign g = gh | ph & gl;
endmodule
// This is a modulo 129 adder witch follows the TPP
architecture
module TPP129_TC (x, y, r);
input [7:0] x, y;
output [7:0] r;
wire [7:0] s, c;
wire c_;
wire [7:1] p, g, g1, p1, g2, p2, g3;
wire [3:2] g1_, p1_;
wire [ 3: 1] t, g_;
// HA and HA* stage
assign s[7:0] = {x[7] ^ y[7], ~(x[6:0] ^ y[6:0])};
assign c[7:0] = {x[7] & y[7], x[6:0] | y[6:0]};
Arytmetyka resztowa.doc, Janusz Biernat

// Preprocessing stage. Propagate, Generate and t signal
generation
assign c_=x[0] & y[0];
assign p[7:1] = {s[7:2] ^ c[6:1], (s[1] ^ c[0]) & s[0]};
assign g[7:1] = {(s[7] & c[6]) | c[7], s[6:1] & c[5:0]};
assign t[3:1] = ~{s[3:2] | c[2:1], s[1] | c_};
assign g_[ 3: 1] = ~g[ 3: 1];
// First Prefix Level
GP inst0_7 (g[7], p[7], g[6], p[6], g1[7], p1[7]);
GP inst0_6 (g[6], p[6], g[5], p[5], g1[6], p1[6]);
GP inst0_5 (g[5], p[5], g[4], p[4], g1[5], p1[5]);
GP inst0_4 (g[4], p[4], g[3], p[3], g1[4], p1[4]);
GP inst0_3 (g[3], p[3], g[2], p[2], g1[3], p1[3]);
GP inst0_3a (t[3], g_[3], t[2], g_[2], g1_[3], p1_[3]);
GP inst0_2 (g[2], p[2], g[1], p[1], g1[2], p1[2]);
GP inst0_2a (t[2], g_[2], t[1], g_[1], g1_[2], p1_[2]);
GP inst0_1 (t[1], g_[1], g[7], p[7], g1[1], p1[1]);
// Second Prefix Level
GP inst1_7 ( g1[7], p1[7], g1[5], p1[5], g2[7],
p2[7]);
GGS inst1_6 ( g1[6], p1[6], g1[4], g2[6]);
GP inst1_5 ( g1[5], p1[5], g1[3], p1[3], g2[5],
p2[5]);
GP inst1_4 ( g1[4], p1[4], g1[2], p1[2], g2[4],
p2[4]);
GP inst1_3 (g1_[3], p1_[3], g1[1], p1[1], g2[3],
p2[3]);
GP inst1_2 (g1_[2], p1_[2], g1[7], p1[7], g2[2],
p2[2]);
GP inst1_1 ( g1[1], p1[1], g1[6], p1[6], g2[1],
p2[1]);
// Third and Last Prefix Level // g_node(gh, ph, gl, g) !
assign g = gh | ph & gl
assign g3[5:1] = g2[5:1] | p2[5:1] & {~g2[2:1],
g2[7:5]};
assign g3[7] = g2[7] | p2[7] & g2[4];
// Sum computation
assign r[7] =~c[7] & p2[7] & p2[4] & s[0]; // s[0]
można pominąć
assign r[6:2] = p[6:2] ^ {g3[5:4], ~g3[3:1]};
assign r[1] = s[1] ^ c[0] ^ (s[0] & ~g3[7]);
assign r[0] = s[0] ^ ~g3[7];
endmodule

module GP (gh, ph, gl, pl, g, p); // (g,p) = (gh, ph) o
(gl, pl)
input gh, ph, gl, pl;
output g, p;
assign g = gh | ph & gl;
assign p = ph & pl;
endmodule
module GGS (gh, ph, gl, g); // (g, ) = (gh, ph) o (gl,
)
input gh, ph, gl;
output g;

k
assign g = gh | ph & gl;
endmodule
module TPP257_TC (x, y, r); // TPP modulo 257
(2E8P1)
input [8:0] x, y;
output [8:0] r;
wire [8:0] s, c;
wire c_;
wire [8:1] p, g, g1, p1, g2, p2, g3;
wire [3:2] g1_, p1_;
wire [3:1] t, g_;
// HA and HA* stage
assign s[8:0] = {x[8] ^ y[8], ~(x[7:0] ^ y[7:0])};
assign c[8:0] = {x[8] & y[8], x[7:0] | y[7:0]};
// Preprocessing stage. Propagate, Generate and t signal
generation
assign c_=x[0] & y[0];
assign p[8:1] = {s[8:2] ^ c[7:1], (s[1] ^ c[0]) & s[0]};
assign g[8:1] = {(s[8] & c[7]) | c[8], s[7:1] & c[6:0]};
assign t[3:1] = ~{s[3:2] | c[2:1], s[1] | c_};
assign g_[3:1] = ~g[3:1];
// First Prefix Level
GP inst0_8 (g[8], p[8], g[7], p[7], g1[8], p1[8]);
GP inst0_7 (g[7], p[7], g[6], p[6], g1[7], p1[7]);
GP inst0_6 (g[6], p[6], g[5], p[5], g1[6], p1[6]);
GP inst0_5 (g[5], p[5], g[4], p[4], g1[5], p1[5]);
GP inst0_4 (g[4], p[4], g[3], p[3], g1[4], p1[4]);
GP inst0_3 (g[3], p[3], g[2], p[2], g1[3], p1[3]);
GP inst0_3a (t[3], g_[3], t[2], g_[2], g1_[3], p1_[3]);
GP inst0_2 (g[2], p[2], g[1], p[1], g1[2], p1[2]);
GP inst0_2a (t[2], g_[2], t[1], g_[1], g1_[2], p1_[2]);
GP inst0_1 (t[1], g_[1], g[8], p[8], g1[1], p1[1]);
// Second Prefix Level
GP inst1_8 ( g1[8], p1[8], g1[6], p1[6], g2[8],
p2[8]);
GGS inst1_7 ( g1[7], p1[7], g1[5], g2[7]);
GP inst1_6 ( g1[6], p1[6], g1[4], p1[4], g2[6],
p2[6]);
GP inst1_5 ( g1[5], p1[5], g1[3], p1[3], g2[5],
p2[5]);
GP inst1_4 ( g1[4], p1[4], g1[2], p1[2], g2[4],
p2[4]);
GP inst1_3 (g1_[3], p1_[3], g1[1], p1[1], g2[3],
p2[3]);
GP inst1_2 (g1_[2], p1_[2], g1[8], p1[8], g2[2],
p2[2]);
GP inst1_1 ( g1[1], p1[1], g1[7], p1[7], g2[1],
p2[1]);
// Third and Last Prefix Level // g_node(gh, ph, gl, g) !
assign g = gh | ph & gl
assign g3[6:1] = g2[6:1] | p2[6:1] & {~g2[2:1],
~g2[8], g2[7:5]};
assign g3[8] = g2[8] | p2[8] & g2[4];
// Sum computation
Arytmetyka resztowa.doc, Janusz Biernat

assign r[8] =~c[8] & p2[8] & p2[4] & s[0]; // s[0]
można pominąć
assign r[7:2] = p[7:2] ^ {g3[6:4], ~g3[3:1]};
assign r[1] = s[1] ^ c[0] ^ (s[0] & ~g3[8]);
assign r[0] = s[0] ^ ~g3[8];
endmodule

module GP (gh, ph, gl, pl, g, p); // (g,p) = (gh, ph) o
(gl, pl)
input gh, ph, gl, pl;
output g, p;
assign g = gh | ph & gl;
assign p = ph & pl;
endmodule
// module GGS (gh, ph, gl, g); // (g, ) = (gh, ph) o (gl,
)
// input gh, ph, gl;
// output g;
// assign g = gh | ph & gl;
// endmodule
assign g = gh | ph & gl; // GGS (gh, ph, gl, g) ! gh |
ph & gl g
module TPP65537_TC (x, y, r); // TPP modulo 65537
(2E16P1)
input [16:0] x, y;
output [16:0] r;
wire [16:0] s, c;
wire c_;
wire [16:1] p, g, g1, p1, g2, p2, g3;
wire [3:2] g1_, p1_;
wire [3:1] t, g_;
// HA and HA* stage
assign s[16:0] = {x[16] ^ y[16], ~(x[15:0] ^
y[15:0])};
assign c[16:0] = {x[16] & y[16], x[15:0] | y[15:0]};
// Preprocessing stage. Propagate, Generate and t signal
generation
assign c_=x[0] & y[0];
assign p[16:1] = {s[16:2] ^ c[715:1], (s[1] ^ c[0]) &
s[0]};
assign g[16:1] = {(s[16] & c[15]) | c[16], s[15:1] &
c[14:0]};
assign t[3:1] = ~{s[3:2] | c[2:1], s[1] | c_};
assign g_[3:1] = ~g[3:1];
// First Prefix Level
GP inst0_16 (g[16], p[16], g[15], p[15], g1[16],
p1[16]);
GP inst0_15 (g[15], p[15], g[14], p[14], g1[15],
p1[15]);
GP inst0_14 (g[14], p[14], g[13], p[13], g1[14],
p1[14]);
GP inst0_13 (g[13], p[13], g[12], p[12], g1[13],
p1[13]);
GP inst0_12 (g[12], p[12], g[11], p[11], g1[12],
p1[12]);

k

GP inst0_11 (g[11], p[11], g[10], p[10], g1[11],
p1[11]);
GP inst0_10 (g[10], p[10], g[9], p[9], g1[10],
p1[10]);
GP inst0_9 (g[9], p[9], g[8], p[8], g1[9], p1[9]);
GP inst0_8 (g[8], p[8], g[7], p[7], g1[8], p1[8]);
GP inst0_7 (g[7], p[7], g[6], p[6], g1[7], p1[7]);
GP inst0_6 (g[6], p[6], g[5], p[5], g1[6], p1[6]);
GP inst0_5 (g[5], p[5], g[4], p[4], g1[5], p1[5]);
GP inst0_4 (g[4], p[4], g[3], p[3], g1[4], p1[4]);
GP inst0_3 (g[3], p[3], g[2], p[2], g1[3], p1[3]);
GP inst0_3a (t[3], g_[3], t[2], g_[2], g1_[3], p1_[3]);
GP inst0_2 (g[2], p[2], g[1], p[1], g1[2], p1[2]);
GP inst0_2a (t[2], g_[2], t[1], g_[1], g1_[2], p1_[2]);
GP inst0_1 (t[1], g_[1], g[8], p[8], g1[1], p1[1]);
// Second Prefix Level
GP inst1_8 ( g1[8], p1[8], g1[6], p1[6], g2[8],
p2[8]);
GP inst1_8 ( g1[8], p1[8], g1[6], p1[6], g2[8],
p2[8]);
GP inst1_8 ( g1[8], p1[8], g1[6], p1[6], g2[8],
p2[8]);
GP inst1_8 ( g1[8], p1[8], g1[6], p1[6], g2[8],
p2[8]);
GP inst1_8 ( g1[8], p1[8], g1[6], p1[6], g2[8],
p2[8]);
GP inst1_8 ( g1[8], p1[8], g1[6], p1[6], g2[8],
p2[8]);
GP inst1_8 ( g1[8], p1[8], g1[6], p1[6], g2[8],
p2[8]);
GP inst1_8 ( g1[8], p1[8], g1[6], p1[6], g2[8],
p2[8]);
GP inst1_8 ( g1[8], p1[8], g1[6], p1[6], g2[8],
p2[8]);
GGS inst1_7 ( g1[7], p1[7], g1[5], g2[7]);
GP inst1_6 ( g1[6], p1[6], g1[4], p1[4], g2[6],
p2[6]);
GP inst1_5 ( g1[5], p1[5], g1[3], p1[3], g2[5],
p2[5]);
GP inst1_4 ( g1[4], p1[4], g1[2], p1[2], g2[4],
p2[4]);
GP inst1_3 (g1_[3], p1_[3], g1[1], p1[1], g2[3],
p2[3]);
GP inst1_2 (g1_[2], p1_[2], g1[8], p1[8], g2[2],
p2[2]);
GP inst1_1 ( g1[1], p1[1], g1[7], p1[7], g2[1],
p2[1]);
// Third Prefix Level // g_node(gh, ph, gl, g) ! assign g
= gh | ph & gl
GP inst1_8 ( g2[8], p2[8], g2[6], p2[6], g3[8],
p3[8]);
GP inst1_8 ( g2[8], p2[8], g2[6], p2[6], g3[8],
p3[8]);
GP inst1_8 ( g2[8], p2[8], g2[6], p2[6], g3[8],
p3[8]);
GP inst1_8 ( g2[8], p2[8], g2[6], p2[6], g3[8],
p3[8]);
GP inst1_8 ( g2[8], p2[8], g2[6], p2[6], g3[8],
p3[8]);
Arytmetyka resztowa.doc, Janusz Biernat

GP inst1_8 ( g2[8], p2[8], g2[6], p2[6], g3[8],
p3[8]);
GP inst1_8 ( g2[8], p2[8], g2[6], p2[6], g3[8],
p3[8]);
GP inst1_8 ( g2[8], p2[8], g2[6], p2[6], g3[8],
p3[8]);
GP inst1_8 ( g2[8], p2[8], g2[6], p2[6], g3[8],
p3[8]);
GP inst1_8 ( g2[8], p2[8], g2[6], p2[6], g3[8],
p3[8]);
GP inst1_8 ( g2[8], p2[8], g2[6], p2[6], g3[8],
p3[8]);
GP inst1_8 ( g2[8], p2[8], g2[6], p2[6], g3[8],
p3[8]);
GP inst1_8 ( g2[8], p2[8], g2[6], p2[6], g3[8],
p3[8]);
GP inst1_8 ( g2[8], p2[8], g2[6], p2[6], g3[8],
p3[8]);
GP inst1_8 ( g2[8], p2[8], g2[6], p2[6], g3[8],
p3[8]);
GP inst1_8 ( g2[8], p2[8], g2[6], p2[6], g3[8],
p3[8]);
// Fourth and Last Prefix Level // g_node(gh, ph, gl, g) !
assign g = gh | ph & gl
assign g3[14:1] = g2[14:1] | p2[14:1] & {~g2[6:1],
~g2[16], g2[15:9]};
assign g3[16] = g2[16] | p2[16] & g2[8];
// Sum computation (musi być wyznaczone r[16:0] !!)
assign r[16] =~c[16] & p2[16] & p2[8] & s[0]; //
s[0] można pominąć
assign r[15:2] = p[15:2] ^ {g3[14:4], ~g3[3:1]};
assign r[1] = s[1] ^ c[0] ^ (s[0] & ~g3[8]);
assign r[0] = s[0] ^ ~g3[8];
endmodule

k

PPA M LL

MLL



TPP
k
TPP

k MLL k




// MLL modulo 2E4P1 PPA
module GP (g1, p1, g0, p0, g, p); // (g,p)=(g1,
p1)o(g0, p0)
input g0, p0, g1, p1;
output g, p;
assign g = g1 | g0 & p1;
assign p = p0 & p1;
endmodule
module J&J_17 (x, y, r);
input [4:0] x, y;
output [4:0] r;
wire [4:0] s, c;
wire [3:0] p, g, h, g2;
wire d, pN, np0, ng0;
wire [3:1] g1, p1;
wire [0:0] ng1, np1;
// HA and HA* stage
assign s[4:0] = {x[4] | y[4], ~(x[3:1] ^ y[3:1]),
x[0]^y[0]};
assign c[4:0] = {~(x[4] & y[4]), x[3:0] | y[3:0]};
assign d =x[3] & y[3];
// Preprocessing stage. Propagate, Generate
assign pN = {s[4] & c[3]};
assign np0 = {(s[4] & s[0]) | (c[3] | c[2])};
assign ng0 = {(s[4] | s[0]) | (d & c[2])} ;
assign p[3:0] = {(s[3:1] | c[2:0]), ((s[4] | c[3]) &
s[0])};
assign g[3:0] = {(pN |(s[3] & c[2])) ,(s[2:1] & c[1:0]),
(s[4] | c[3]) | s[0]};
assign h[3:0] = {(s[3:1] ^ c[2:0]), ((s[4] | c[3]) ^
s[0])};
// First Prefix Level
// (g1, p1, g0, p0, g, p) -- (g,p)=(g1, p1)o(g0, p0)
GP inst0_3 (g[3], p[3], g[2], p[2], g1[3], p1[3]);
GP inst0_2 (g[2], p[2], g[1], p[1], g1[2], p1[2]);
GP inst0_1 (g[1], p[1], ~g[0], ~p[0], g1[1], p1[1]);
assign ng1[0] = ng0 & np0;
assign np1[0] = g[0] & p[3];
// Last Prefix Level
assign g2[3] = g1[3] | p1[3] & g1[1];
assign g2[2] = g1[2] | p1[2] & ~ng1[0];
assign g2[1] = g1[1] | p1[1] & ~g1[3];
assign g2[0] = ng1[0] | np1[0] & g1[2];
// Sum computation
assign r[4] = c[4] & (((p1[3] & p1[1]) & ~g2[3])) ;
assign r[3:2] = (h[3:2] & {c[4], c[4]}) ^ g2[2:1];
Arytmetyka resztowa.doc, Janusz Biernat

assign r[1:0] = (h[1:0] & {c[4], c[4]}) ^ {~g2[0],
~g2[3]};
endmodule

// MLL modulo 2E5P1 PPA
module GP (g1, p1, g0, p0, g, p); // (g,p)=(g1,
p1)o(g0, p0)
input g0, p0, g1, p1;
output g, p;
assign g = g1 | g0 & p1;
assign p = p0 & p1;
endmodule
module NGP (g1, p1, g0, p0, g, p, ng, np);
input g1, p1, g0, p0;
output g, p, ng, np;
wire temp;
assign p = p0 & p1;
assign np = ~(p | g1);
assign temp = g0 | g1;
assign g = temp & p1;
assign ng = ~temp;
endmodule
module J&J_33 (x, y, r);
input [5:0] x, y;
output [5:0] r;
wire [5:0] s, c;
wire [4:0] p, g, h, g2, p2, g3;
wire d, pN, np0, ng0;
wire [5:1] g1, p1;
wire [2:0] ng1, np1;
// HA and HA* stage
assign s[5:0] = {x[5] | y[5], ~(x[4:1] ^ y[4:1]),
x[0]^y[0]};
assign c[5:0] = {~(x[5] & y[5]), x[4:0] | y[4:0]};
assign d =x[4] & y[4];
// Preprocessing stage. Propagate, Generate
assign pN = {s[5] & c[4]};
assign np0 = {(s[5] & s[0]) | (c[4] | c[3])};
assign ng0 = {(s[5] | s[0]) | (d & c[3])} ;
assign p[4:0] = {(s[4:1] | c[3:0]), ((s[5] | c[4]) &
s[0])};
assign g[4:0] = {(pN |(s[4] & c[3])) ,(s[3:1] & c[2:0]),
(s[5] | c[4]) | s[0]};
assign h[4:0] = {(s[4:1] ^ c[3:0]), ((s[5] | c[4]) ^
s[0])};
// First Prefix Level (g1, p1, g0, p0, g, p) -- (g,p)=(g1,
p1)o(g0, p0)
GP inst0_4 (g[4], p[4], g[3], p[3], g1[4], p1[4]);
GP inst0_3 (g[3], p[3], g[2], p[2], g1[3], p1[3]);
NGP inst0_2 (g[2], p[2], g[1], p[1], g1[2], p1[2],
ng1[2], np1[2]);
NGP inst0_1 (g[1], p[1],(~g[0]),(~p[0]),g1[1], p1[1],
ng1[1], np1[1]);
assign ng1[0] = ng0 & np0;
assign np1[0] = g[0] & p[4];
// Second Prefix Level

k
GP inst1_4 ( g1[4], p1[4], g1[2], p1[2], g2[4],
p2[4]);
GP inst1_3 ( g1[3], p1[3], g1[1], p1[1], g2[3],
p2[3]);
GP inst1_2 (np1[2], ng1[2], ng1[0],np1[0], g2[2],
p2[2]);
GP inst1_1 (np1[1], ng1[1], g1[4], p1[4], g2[1],
p2[1]);
GP inst1_0 (ng1[0], np1[0], g1[3], p1[3], g2[0],
p2[0]);
// Third and Last Prefix Level
assign g3[2:0] = g2[2:0] | p2[2:0] & {g2[1:0], g2[4]};
assign g3[4:3] = g2[4:3] | p2[4:3] & {g2[3], ~g2[2]};
// Sum computation
assign r[5] = c[5] & ((p2[4] & p2[3]) & ~g3[4]);
assign r[4] = (h[4] & c[5]) ^ g3[3];
assign r[3:0] = (h[3:0] & {4{c[5]}}) ^ {~g3[2:0],
~g3[4]};
endmodule

// MLL modulo 2E6P1 PPA
module GP (g1, p1, g0, p0, g, p); // (g,p)=(g1,
p1)o(g0, p0)
input g0, p0, g1, p1;
output g, p;
assign g = g1 | g0 & p1;
assign p = p0 & p1;
endmodule
module NGP (g1, p1, g0, p0, g, p, ng, np);
input g1, p1, g0, p0;
output g, p, ng, np;
wire temp;
assign p = p0 & p1;
assign np = ~(p | g1);
assign temp = g0 | g1;
assign g = temp & p1;
assign ng = ~temp;
endmodule
module J&J_65 (x, y, r);
input [6:0] x, y;
output [6:0] r;
wire [6:0] s, c;
wire [6:1] g1, p1;
wire [2:0] ng1, np1;
wire [5:0] p, g, h, g2, p2, g3;
wire d, pN, np0, ng0;
// HA and HA* stage
assign s[6:0] = {x[6] | y[6], ~(x[5:1] ^ y[5:1]),
x[0]^y[0]};
assign c[6:0] = {~(x[6] & y[6]), x[5:0] | y[5:0]};
assign d =x[5] & y[5];
// Preprocessing stage. Propagate, Generate
assign pN = {s[6] & c[5]};
assign np0 = {(s[6] & s[0]) | (c[5] | c[4])};
assign ng0 = {(s[6] | s[0]) | (d & c[4])} ;
Arytmetyka resztowa.doc, Janusz Biernat

assign p[5:0] = {(s[5:1] | c[4:0]), ((s[6] | c[5]) &
s[0])};
assign g[5:0] = {(pN |(s[5] & c[4])) ,(s[4:1] & c[3:0]),
(s[6] | c[5]) | s[0]};
assign h[5:0] = {(s[5:1] ^ c[4:0]), ((s[6] | c[5]) ^
s[0])};
// First Prefix Level
// (g1, p1, g0, p0, g, p) -- (g,p)=(g1, p1)o(g0, p0)
GP inst0_5 (g[5], p[5], g[4], p[4], g1[5], p1[5]);
GP inst0_4 (g[4], p[4], g[3], p[3], g1[4], p1[4]);
GP inst0_3 (g[3], p[3], g[2], p[2], g1[3], p1[3]);
NGP inst0_2 (g[2], p[2], g[1], p[1], g1[2], p1[2],
ng1[2], np1[2]);
NGP inst0_1 (g[1], p[1],(~g[0]),(~p[0]),g1[1], p1[1],
ng1[1], np1[1]);
assign ng1[0] = ng0 & np0;
assign np1[0] = g[0] & p[5];
// Second Prefix Level
GP inst1_5 ( g1[5], p1[5], g1[3], p1[3], g2[5],
p2[5]);
GP inst1_4 ( g1[4], p1[4], g1[2], p1[2], g2[4],
p2[4]);
GP inst1_3 ( g1[3], p1[3], g1[1], p1[1], g2[3],
p2[3]);
GP inst1_2 (np1[2], ng1[2], ng1[0],np1[0], g2[2],
p2[2]);
GP inst1_1 (np1[1], ng1[1], g1[5], p1[5], g2[1],
p2[1]);
GP inst1_0 (ng1[0], np1[0], g1[4], p1[4], g2[0],
p2[0]);
// Third and Last Prefix Level
assign g3[2:0] = g2[2:0] | p2[2:0] & {g2[0], g2[5:4]};
assign g3[4:3] = g2[4:3] | p2[4:3] & ~g2[2:1];
assign g3[5] = g2[5] | p2[5] & g2[3];
// Sum computation
assign r[6] = c[6] & ((p2[5] & p2[3]) & ~g3[5]) ;
assign r[5:4] = (h[5:4] & {c[6], c[6]}) ^ g3[4:3];
assign r[3:0] = (h[3:0] & {4{c[6]}}) ^ {~g3[2:0],
~g3[5]};
endmodule

// MLL modulo 2E7P1 PPA
module GP (g1, p1, g0, p0, g, p); // (g,p)=(g1,
p1)o(g0, p0)
input g0, p0, g1, p1;
output g, p;
assign g = g1 | g0 & p1;
assign p = p0 & p1;
endmodule
module NGP (g1, p1, g0, p0, g, p, ng, np);
input g1, p1, g0, p0;
output g, p, ng, np;
wire temp;
assign p = p0 & p1;
assign np = ~(p | g1);
assign temp = g0 | g1;

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assign g = temp & p1;
assign ng = ~temp;
endmodule
module J&J_129 (x, y, r);
input [7:0] x, y;
output [7:0] r;
wire [7:0] s, c;
wire [6:1] g1, p1;
wire [2:0] ng1, np1;
wire [6:0] p, g, h, g2, p2, g3;
wire d, pN, np0, ng0;
// HA and HA* stage
assign s[7:0] = {x[7] | y[7], ~(x[6:1] ^ y[6:1]),
x[0]^y[0]};
assign c[7:0] = {~(x[7] & y[7]), x[6:0] | y[6:0]};
assign d =x[6] & y[6];
// Preprocessing stage. Propagate, Generate
assign pN = {s[7] & c[6]};
assign np0 = {(s[7] & s[0]) | (c[6] | c[5])};
assign ng0 = {(s[7] | s[0]) | (d & c[5])} ;
assign p[6:0] = {(s[6:1] | c[5:0]), ((s[7] | c[6]) &
s[0])};
assign g[6:0] = {(pN |(s[6] & c[5])) ,(s[5:1] & c[4:0]),
(s[7] | c[6]) | s[0]};
assign h[6:0] = {(s[6:1] ^ c[5:0]), ((s[7] | c[6]) ^
s[0])};
// First Prefix Level
// (g1, p1, g0, p0, g, p) -- (g,p)=(g1, p1)o(g0, p0)
GP inst0_6 (g[6], p[6], g[5], p[5], g1[6], p1[6]);
GP inst0_5 (g[5], p[5], g[4], p[4], g1[5], p1[5]);
GP inst0_4 (g[4], p[4], g[3], p[3], g1[4], p1[4]);
GP inst0_3 (g[3], p[3], g[2], p[2], g1[3], p1[3]);
NGP inst0_2 (g[2], p[2], g[1], p[1], g1[2], p1[2],
ng1[2], np1[2]);
NGP inst0_1 (g[1], p[1],(~g[0]),(~p[0]),g1[1], p1[1],
ng1[1], np1[1]);
assign ng1[0] = ng0 & np0;
assign np1[0] = g[0] & p[5];
// Second Prefix Level
GP inst1_6 ( g1[6], p1[6], g1[4], p1[4], g2[6],
p2[6]);
GP inst1_5 ( g1[5], p1[5], g1[3], p1[3], g2[5],
p2[5]);
GP inst1_4 ( g1[4], p1[4], g1[2], p1[2], g2[4],
p2[4]);
GP inst1_3 ( g1[3], p1[3], g1[1], p1[1], g2[3],
p2[3]);
GP inst1_2 (np1[2], ng1[2], ng1[0],np1[0], g2[2],
p2[2]);
GP inst1_1 (np1[1], ng1[1], g1[6], p1[6], g2[1],
p2[1]);
GP inst1_0 (ng1[0], np1[0], g1[5], p1[5], g2[0],
p2[0]);
// Third and Last Prefix Level
assign g3[2:0] = g2[2:0] | p2[2:0] & g2[6:4]};
Arytmetyka resztowa.doc, Janusz Biernat

assign g3[5:3] = g2[5:3] | p2[5:3] & ~g2[2:0];
assign g3[6] = g2[6] | p2[6] & g2[3];
// Sum computation
assign r[7] = c[7] & ((p2[6] & p2[3]) & ~g3[6]) ;
assign r[6:4] = (h[6:4] & {3{c[7]]}) ^ g3[5:3];
assign r[3:0] = (h[3:0] & {4{c[7]}}) ^ {~g3[2:0],
~g3[6]};
endmodule

// MLL modulo 2E8P1 PPA
module GP (g1, p1, g0, p0, g, p); // (g,p)=(g1,
p1)o(g0, p0)
input g0, p0, g1, p1;
output g, p;
assign g = g1 | g0 & p1;
assign p = p0 & p1;
endmodule
module NGP (g1, p1, g0, p0, g, p, ng, np);
input g1, p1, g0, p0;
output g, p, ng, np;
wire temp;
assign p = p0 & p1;
assign np = ~(p | g1);
assign temp = g0 | g1;
assign g = temp & p1;
assign ng = ~temp;
endmodule
module J&J_257 (x, y, r);
input [8:0] x, y;
output [8:0] r;
wire [8:0] s, c;
wire [7:0] p, g, h, g2, p2, g3;
wire [7:1] g1, p1;
wire [2:0] ng1, np1;
wire d, pN, np0, ng0;
// HA and HA* stage (CSD na schemacie  (s,c) !
(z,q))
assign s[8:0] = {x[8] | y[8], ~(x[7:1] ^ y[7:1]),
x[0]^y[0]};
assign c[8:0] = {~(x[8] & y[8]), x[7:0] | y[7:0]};
assign d =x[7] & y[7];
// Preprocessing stage. Propagate, Generate (HA na
schemacie)
assign pN = {s[8] & c[7]};
assign np0 = {(s[8] & s[0]) | (c[7] | c[6])};
assign ng0 = {(s[8] | s[0]) | (d & c[6])} ;
assign p[7:0] = {(s[7:1] | c[6:0]), ((s[8] | c[7]) &
s[0])};
assign g[7:0] = {(pN |(s[7] & c[6])) ,(s[6:1] & c[5:0]),
(s[8] | c[7]) | s[0]};
assign h[7:0] = {(s[7:1] ^ c[6:0]), ((s[8] | c[7]) ^
s[0])};
// First Prefix Level
// (g1, p1, g0, p0, g, p) -- (g,p)=(g1, p1)o(g0, p0)
GP inst0_7 (g[7], p[7], g[6], p[6], g1[7], p1[7]);
GP inst0_6 (g[6], p[6], g[5], p[5], g1[6], p1[6]);

k

GP inst0_5 (g[5], p[5], g[4], p[4], g1[5], p1[5]);
GP inst0_4 (g[4], p[4], g[3], p[3], g1[4], p1[4]);
GP inst0_3 (g[3], p[3], g[2], p[2], g1[3], p1[3]);
NGP inst0_2 (g[2], p[2], g[1], p[1], g1[2], p1[2],
ng1[2], np1[2]);
NGP inst0_1 (g[1], p[1],(~g[0]),(~p[0]),g1[1], p1[1],
ng1[1], np1[1]);
assign ng1[0] = ng0 & np0;
assign np1[0] = g[0] & p[7];
// Second Prefix Level
GP inst1_7 ( g1[7], p1[7], g1[5], p1[5], g2[7],
p2[7]);
GP inst1_6 ( g1[6], p1[6], g1[4], p1[4], g2[6],
p2[6]);
GP inst1_5 ( g1[5], p1[5], g1[3], p1[3], g2[5],
p2[5]);
GP inst1_4 ( g1[4], p1[4], g1[2], p1[2], g2[4],
p2[4]);
GP inst1_3 ( g1[3], p1[3], g1[1], p1[1], g2[3],
p2[3]);
GP inst1_2 (np1[2], ng1[2], np1[0], ng1[0],g2[2],
p2[2]);
GP inst1_1 (np1[1], ng1[1], g1[7], p1[7], g2[1],
p2[1]);
GP inst1_0 (np1[0], ng1[0], g1[6], p1[6], g2[0],
p2[0]);
// Third and Last Prefix Level
assign g3[2:0] = g2[2:0] | p2[2:0] & g2[6:4]};
assign g3[6:3] = g2[6:3] | p2[6:3] & {~g2[2:0],
~g2[7]};
assign g3[7] = g2[7] | p2[7] & g2[3];
// Sum computation
assign r[8] = c[8] & ((p2[7] & p2[3]) & ~g3[ 7]) ;
assign r[7:4] = (h[7:4] & {4{c[8]}}) ^ g3[6:3];
assign r[3:0] = (h[3:0] & {4{c[8]}}) ^ {~g3[2:0],
g3[7]};
endmodule
Arytmetyka resztowa.doc, Janusz Biernat


// MLL modulo 2E16P1 PPA
module GP (g1, p1, g0, p0, g, p); // (g,p)=(g1,
p1)o(g0, p0)
input g0, p0, g1, p1;
output g, p;
assign g = g1 | g0 & p1;
assign p = p0 & p1;
endmodule
module NGP (g1, p1, g0, p0, g, p, ng, np);
input g1, p1, g0, p0;
output g, p, ng, np;
wire temp;
assign p = p0 & p1;
assign np = ~(p | g1);
assign temp = g0 | g1;
assign g = temp & p1;
assign ng = ~temp;
endmodule
module J&J_2E16P1 (x, y, r);
input [16:0] x, y;
output [16:0] r;
wire [16:0] s, c;
wire [15:0] p, g, h, g2, p2, g3, p3, g4;
wire d, pN, np0, ng0;
wire [15:1] g1, p1;
wire [6:0] ng1, np1;
wire [6:3] ng2, np2;
// HA and HA* stage
assign s[16:0] = {x[16] | y[16], ~(x[15:1] ^ y[15:1]),
x[0]^y[0]};
assign c[16:0] = {~(x[16] & y[16]), x[15:0] |
y[15:0]};
assign d =x[16] & y[16];
// Preprocessing stage. Propagate, Generate
assign pN = {s[16] & c[15]};
assign np0 = {(s[16] & s[0]) | (c[15] | c[14])};
assign ng0 = {(s[16] | s[0]) | (d & c[14])} ;
assign p[15:0] = {(s[15:1] | c[14:0]), ((s[16] | c[15])
& s[0])};
assign g[15:0] = {(pN |(s[15] & c[14])) ,(s[14:1] &
c[13:0]), (s[16] | c[15]) | s[0]};
assign h[15:0] = {(s[15:1] ^ c[14:0]), ((s[16] | c[15])
^ s[0])};
// First Prefix Level
// (g1, p1, g0, p0, g, p) -- (g,p)=(g1, p1)o(g0, p0)
GP inst0_15 (g[15], p[15],g[14], p[14], g1[15],
p1[15]);
GP inst0_14 (g[14], p[14],g[13], p[13], g1[14],
p1[14]);
GP inst0_13 (g[13], p[13],g[12], p[12], g1[13],
p1[13]);
GP inst0_12 (g[12], p[12],g[11], p[11], g1[12],
p1[12]);
GP inst0_11 (g[11], p[11],g[10], p[10], g1[11],
p1[11]);
GP inst0_10 (g[10], p[10],g[9], p[9], g1[10],
p1[10]);
Arytmetyka resztowa.doc 25 pazdziernika, 2007
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GP inst0_9 (g[9], p[9], g[8], p[8], g1[9], p1[9]);
GP inst0_8 (g[8], p[8], g[7], p[7], g1[8], p1[8]);
GP inst0_7 (g[7], p[7], g[6], p[6], g1[7], p1[7]);
NGP inst0_6 (g[6], p[6], g[5], p[5], g1[6], p1[6],
ng1[6], np1[6]);
NGP inst0_5 (g[5], p[5], g[4], p[4], g1[5], p1[5],
ng1[5], np1[5]);
NGP inst0_4 (g[4], p[4], g[3], p[3], g1[4], p1[4],
ng1[4], np1[4]);
NGP inst0_3 (g[3], p[3], g[2], p[2], g1[3], p1[3],
ng1[3], np1[3]);
NGP inst0_2 (g[2], p[2], g[1], p[1], g1[2], p1[2],
ng1[2], np1[2]);
NGP inst0_1 (g[1],p[1],(~g[0]),(~p[0]), g1[1], p1[1],
ng1[1], np1[1]);
assign ng1[0] = ng0 & np0;
assign np1[0] = g[0] & p[15];
// Second Prefix Level
GP inst1_15 (
g1[15],p1[15],g1[13],p1[13],g2[15],p2[15]);
GP inst1_14 (
g1[14],p1[14],g1[12],p1[12],g2[14],p2[14]);
GP inst1_13 (
g1[13],p1[13],g1[11],p1[11],g2[13],p2[13]);
GP inst1_12 (
g1[12],p1[12],g1[10],p1[10],g2[12],p2[12]);
GP inst1_11 ( g1[11],p1[11],g1[9], p1[9],
g2[11],p2[11]);
GP inst1_10 ( g1[10], p1[10],g1[8], p1[8],
g2[10],p2[10]);
GP inst1_9 ( g1[9], p1[9], g1[7], p1[7], g2[9], p2[9]);
GP inst1_8 ( g1[8], p1[8], g1[6], p1[6], g2[8], p2[8]);
GP inst1_7 ( g1[7], p1[7], g1[5], p1[5], g2[7], p2[7]);
GP inst1_n6
(np1[6],ng1[6],np1[4],ng1[4],np2[6],ng2[6]);
GP inst1_6 ( g1[6], p1[6], g1[4], p1[4], g2[6], p2[6]);
GP inst1_n5
(np1[5],ng1[5],np1[3],ng1[3],np2[5],ng2[5]);
GP inst1_5 ( g1[5], p1[5], g1[3], p1[3], g2[5], p2[5]);
GP inst1_n4
(np1[4],ng1[4],np1[2],ng1[2],np2[4],ng2[4]);
GP inst1_4 ( g1[4], p1[4], g1[2], p1[2], g2[4], p2[4]);
GP inst1_n3
(np1[3],ng1[3],np1[1],ng1[1],np2[3],ng2[3]);
GP inst1_3 ( g1[3], p1[3], g1[1], p1[1], g2[3], p2[3]);
GP inst1_2 (np1[2],ng1[2],np1[0],ng1[0], g2[2],
p2[2]);
GP inst1_1 (np1[1],ng1[1], g1[15],p1[15],g2[1],
p2[1]);
GP inst1_0 (np1[0],ng1[0], g1[14],p1[14],g2[0],
p2[0]);
// Third Prefix Level (g1, p1, g0, p0, g, p) --
(g,p)=(g1, p1)o(g0, p0)
GP inst2_15 ( g2[15],p2[15],g2[11],p2[11],
g3[15],p3[15]);
GP inst2_14 ( g2[14],p2[14],g2[10],p2[10],
g3[14],p3[14]);
GP inst2_13 ( g2[13],p2[13],g2[9], p2[9],
g3[13],p3[13]);
Arytmetyka resztowa.doc, Janusz Biernat


GP inst2_12 ( g2[12],p2[12],g2[8], p2[8],
g3[12],p3[12]);
GP inst2_11 ( g2[11],p2[11],g2[7], p2[7],
g3[11],p3[11]);
GP inst2_10 ( g2[10],p2[10],g2[6], p2[6],
g3[10],p3[10]);
GP inst2_9 ( g2[9], p2[9], g2[5], p2[5], g3[9],
p3[9]);
GP inst2_8 ( g2[8], p2[8], g2[4], p2[4], g3[8],
p3[8]);
GP inst2_7 ( g2[7], p2[7], g2[3], p2[3], g3[7],
p3[7]);
GP inst2_6 (np2[6],ng2[6], g2[2], p2[2], g3[6],
p3[6]);
GP inst2_5 (np2[5],ng2[5], g2[1], p2[1], g3[5],
p3[5]);
GP inst2_4 (np2[4],ng2[4], g2[0], p2[0], g3[4],
p3[4]);
GP inst2_3 (np2[3],ng2[3], g2[15],p2[15], g3[3],
p3[3]);
GP inst2_2 ( g2[2], p2[2], g2[14],p2[14], g3[2],
p3[2]);
GP inst2_1 ( g2[1], p2[1], g2[13],p2[13], g3[1],
p3[1]);
GP inst2_0 ( g2[0], p2[0], g2[12],p2[12], g3[0],
p3[0]);
// Last Prefix Level
assign g4[6:0] = g3[6:0] | p3[6:0] & g3[14:8]};
assign g4[14:7] = g3[14:7] | p3[14:7] & {~g3[6:0],
~g3[15]};
assign g4[15] = g3[15] | p3[15] & g3[7];
// Sum computation
assign r[16] = c[ 16] & ((p3[15] & p3[7]) & ~g4[15]) ;
assign r[15:8] = (h[15:8] & {8{c[16]}}) ^ g4[14:7];
assign r[7:0] = (h[7:0] & {8{c[16]}}) ^ {~g4[6:0],
g4[15]};
endmodule

k




k



// ELMMA4_1 (mod 2E4P1, v.1). It generates sum s[3:0],
hh[3:0], gg[3]
module GP (gvert, pvert, glat, plat, gnext, pnext);
// standard node
input gvert, pvert, glat, plat;
output gnext, pnext;
assign gnext = gvert | pvert & glat;
assign pnext = pvert & plat;
endmodule
Arytmetyka resztowa.doc 25 pazdziernika, 2007
k

module ELM_4_ORG (x, y, hm, s, hh, gg); // This
is a modified 4-bit ELM
input [3:0] x, y;
input hm;
output [3:0] s, hh;
output gg;
wire [3:0] ps, pc, g, h, g1, h1, s1;
wire h01;
assign g[3:0] = x[3:0] & y[3:0]; //
preprocessing - HA
assign h[3:0] = x[3:0] ^ y[3:0];
assign h01 = hm & h[0];
assign s1[3] = h[3] ^ g[2];
assign s1[1] = h[1] ^ g[0];
GP inst11 (g[1], h[1], g[0], h01, g1[1], h1[1]);
GP inst13 (g[3], h[3], g[2], h[2], g1[3], h1[3]);
GP inst23 (g1[3], h1[3], g1[1], h1[1], gg, hh[3]);
assign hh[2:0]={h1[2] & h1[1] , h1[1], h01};
assign s[3:0] = {s1[3] ^ (h[2] & g1[1]), h[2] ^
g1[1], s1[1], h[0]};
endmodule
// This is ELMMA mod 2E4P1. It uses sums and
 propagate of the ELM
module ELMMA(x, y, r); // ELMMA_FXS_4 (ELM
Modulo Adder + Final Sum)
input [4:0] x, y; // 5-bit inputs
and outputs
output [4:0] r;
wire [4:0] ps;
wire [3:0] hh, s;
wire [4:1] pc;
wire ncout, ppc;
// SCSA // Carry Save Decrement (X+Y-1)
assign ps[3:0] = ~(x[3:0] ^ y[3:0]);
assign pc[4:1] = x[3:0] | y[3:0];
assign ps[4] = x[4] ^ y[4];
assign ppc = x[4] & y[4];
ELM_4_ORG inst801 (pc[4:1], ps[4:1], ps[0],
s[3:0], hh[3:0], gg);
assign ncout = ~(ppc | gg); //
korekcja
assign r[0] = ps[0] ^ ncout; //
generowanie reszt
assign r[3:1] = s[2:0] ^ ({hh[1:0], ps[0]} &
{3{ncout}});
assign r[4]= hh[3];
endmodule
Sumator modulo 25+1 ELM M A
// ELMMA5_1 (mod 2E5P1, v.1). It generates sum
s[4:0], hh[4:0], gg[4]
module GP (gvert, pvert, glat, plat, gnext, pnext);
// standard node
input gvert, pvert, glat, plat;
output gnext, pnext;
Arytmetyka resztowa.doc, Janusz Biernat

assign gnext = gvert | pvert & glat;
assign pnext = pvert & plat;
endmodule
module ELM_5_ORG (x, y, hm, s, hh, gg); // This
is a modified 5-bit ELM
input [4:0] x, y;
input hm;
output [4:0] s, hh;
output gg;
wire [4:0] ps, pc, g, h, g1, h1, s1, g2, h2, s2;
wire h01;
assign g[4:0] = x[4:0] & y[4:0]; //
preprocessing - HA
assign h[4;0] = x[4:0] ^ y[4:0];
assign h01 = hm & h[0];
assign s1[3] = h[3] ^ g[2];
assign s1[1] = h[1] ^ g[0];
GP inst11 (g[1], h[1], g[0], h01, g1[1], h1[1]);
GP inst13 (g[3], h[3], g[2], h[2], g1[3], h1[3]);
assign s2[3] = s1[3] ^ (h[2] & g1[1]);
assign s2[2] = h[2] ^ g1[1];
GP inst23 (g1[3], h1[3], g1[1], h1[1], g2[3],
h2[3]);
assign h2[2] = h[2] & h1[1];
GP inst34 (g[4], h[4], g2[3], h2[3], gg, hh[4]);
assign hh[3:0]={h2[3], h2[2], h1[1], h01};
assign s[4:0] = {h[4] ^ g2[3], s2[3:2], s1[1],
h[0]};
endmodule
// This is ELMMA mod 2E5P1. It uses sums and
 propagate of the ELM
module ELMMA(x, y, r); // ELMMA_FXS_5 (ELM
Modulo Adder + Final Sum)
input [5:0] x, y; // 5-bit inputs
and outputs
output [5:0] r;
wire [5:0] ps;
wire [4:0] hh, s;
wire [5:1] pc;
wire ncout, ppc;
// SCSA // Carry Save Decrement (X+Y-1)
assign ps[4:0] = ~(x[4:0] ^ y[4:0]);
assign pc[5:1] = x[4:0] | y[4:0];
assign ps[5] = x[5] ^ y[5];
assign ppc = x[5] & y[5];
// produces partial sums s[4:0] and  propagate
hh[4:0]= prop [5:1], and gg[4]
ELM_5_ORG inst501 (pc[5:1], ps[5:1], ps[0],
s[4:0], hh[4:0], gg);
assign ncout = ~(ppc | gg);
//generowanie reszt

k

assign r[0] = ps[0] ^ ncout;
assign r[4:1] = s[3:0] ^ ({hh[2:0], ps[0]} &
{4{ncout}});
assign r[5]= hh[4];
endmodule

// ELMMA6_1 (mod 2E6P1, v.1). It generates sum
s[5:0], hh[5:0], gg[5]
module GP (gvert, pvert, glat, plat, gnext, pnext);
// standard node
input gvert, pvert, glat, plat;
output gnext, pnext;
assign gnext = gvert | pvert & glat;
assign pnext = pvert & plat;
endmodule
module ELM_6_ORG (x, y, hm, s, hh, gg); // This
is a modified 6-bit ELM
input [5:0] x, y;
input hm;
output [5:0] s, hh;
output gg;
wire [5:0] ps, pc, g, h, g1, h1, s1, g2, h2, s2;
wire h01;
assign g[5:0] = x[5:0] & y[5:0]; //
preprocessing - HA
assign h[5:0] = x[5:0] ^ y[5:0];
assign h01 = hm & h[0];
assign s1[5] = h[5] ^ g[4];
assign s1[3] = h[3] ^ g[2];
assign s1[1] = h[1] ^ g[0];
GP inst11 (g[1], h[1], g[0], h01, g1[1], h1[1]);
GP inst13 (g[3], h[3], g[2], h[2], g1[3], h1[3]);
GP inst15 (g[5], h[5], g[4], h[4], g1[5], h1[5]);
assign s2[3] = s1[3] ^ (h[2] & g1[1]);
assign s2[2] = h[2] ^ g1[1];
GP inst23 (g1[3], h1[3], g1[1], h1[1], g2[3],
h2[3]);
assign h2[2] = h[2] & h1[1];
GP inst35 (g1[5], h1[5], g2[3], h2[3], gg, hh[5]);
assign hh[4:0]={h[4]&h2[3], h2[3], h2[2], h1[1],
h01};
assign s[5] = s1[5] ^ (h[4] & g2[3]);
assign s[4] = h[4] ^ g2[3];
assign s[3:0] = {s2[3:2], s1[1], h[0]};
endmodule
// This is ELMMA mod 2E6P1. It uses sums and
 propagate of the ELM
module ELMMA(x, y, r); // ELMMA_FXS_6 (ELM
Modulo Adder + Final Sum)
input [6:0] x, y; // 9-bit inputs
and outputs
output [6:0] r;
wire [6:0] ps;
wire [5:0] hh, s;
wire [6:1] pc;
Arytmetyka resztowa.doc, Janusz Biernat

wire ncout, ppc;
// SCSA // Carry Save Decrement (X+Y-1)
assign ps[5:0] = ~(x[5:0] ^ y[5:0]);
assign pc[6:1] = x[5:0] | y[5:0];
assign ps[6] = x[6] ^ y[6];
assign ppc = x[6] & y[6];
// produces partial sums s[5:0] and  propagate
hh[5:0]= prop [6:1], and gg[5]
ELM_6_ORG inst601 (pc[6:1], ps[6:1], ps[0],
s[5:0], hh[5:0], gg);
assign ncout = ~(ppc | gg);
//generowanie reszt
assign r[0] = ps[0] ^ ncout;
assign r[5:1] = s[4:0] ^ ({hh[3:0], ps[0]} &
{5{ncout}});
assign r[6]= hh[5];
endmodule

// ELMMA7_1 (mod 2E7P1, v.1). It generates sum s[6:0],
hh[6:0], gg[6]
module GP (gvert, pvert, glat, plat, gnext, pnext);
// standard node
input gvert, pvert, glat, plat;
output gnext, pnext;
assign gnext = gvert | pvert & glat;
assign pnext = pvert & plat;
endmodule
module ELM_7_ORG (x, y, hm, s, hh, gg); // This
is a modified 7-bit ELM
input [6:0] x, y;
input hm;
output [6:0] s, hh;
output gg;
wire [6:0] ps, pc, g, h, g1, h1, s1, g2, h2, s2;
wire h01;
// preprocessing - HA
assign g[6:0] = x[6:0] & y[6:0];
assign h[6:0] = x[6:0] ^ y[6:0];
assign h01 = hm & h[0];
assign s1[5] = h[5] ^ g[4];
assign s1[3] = h[3] ^ g[2];
assign s1[1] = h[1] ^ g[0];
GP inst11 (g[1], h[1], g[0], h01, g1[1], h1[1]);
GP inst13 (g[3], h[3], g[2], h[2], g1[3], h1[3]);
GP inst15 (g[5], h[5], g[4], h[4], g1[5], h1[5]);
assign s2[6] = h[6] ^ g1[5];
assign s2[3] = s1[3] ^ (h[2] & g1[1]);
assign s2[2] = h[2] ^ g1[1];
GP inst23 (g1[3], h1[3], g1[1], h1[1], g2[3],
h2[3]);
GP inst26 ( g[6], h[6], g1[5], h1[5], g2[6],
h2[6]);
assign h2[2] = h[2] & h1[1];
GP inst36 (g2[6], h2[6], g2[3], h2[3], gg, hh[6]);
//zmiana

k

assign hh[5:0]={h1[5]&h2[3], h[4]&h2[3], h2[3],
h2[2], h1[1], h01};
assign s[6] = s2[6] ^ (h1[5] & g2[3]);
assign s[5] = s1[5] ^ (h[4] & g2[3]);
assign s[4] = h[4] ^ g2[3];
assign s[3:0] = {s2[3:2], s1[1], h[0]};
endmodule
// This is ELMMA mod 2E7P1. It uses sums and
 propagate of the ELM
module ELMMA(x, y, r); // ELMMA_FXS_7 (ELM
Modulo Adder + Final Sum)
input [7:0] x, y; // 8-bit inputs
and outputs
output [7:0] r;
wire [7:0] ps;
wire [6:0] hh, s;
wire [7:1] pc;
wire ncout, ppc;
assign ps[6:0] = ~(x[6:0] ^ y[6:0]); // Carry
Save Decrement (X+Y-1)
assign pc[7:1] = x[6:0] | y[6:0]; //
SCSA
assign ps[7] = x[7] ^ y[7];
assign ppc = x[7] & y[7];
ELM_7_ORG inst701 (pc[7:1], ps[7:1], ps[0],
s[6:0], hh[6:0], gg);
assign ncout = ~(ppc | gg);
//generowanie reszt
assign r[0] = ps[0] ^ ncout;
assign r[6:1] = s[5:0] ^ ({hh[4:0], ps[0]} &
{6{ncout}});
assign r[7]= hh[6];
endmodule

// ELMMA8_1 (mod 2E8P1, v.1). It generates sum s[7:0],
hh[7:0], gg[7]
module GP (gvert, pvert, glat, plat, gnext, pnext);
// standard node
input gvert, pvert, glat, plat;
output gnext, pnext;
assign gnext = gvert | pvert & glat;
assign pnext = pvert & plat;
endmodule
module ELM_8_ORG (x, y, hm, s, hh, gg); // This
is an original 8-bit ELM
input [7:0] x, y;
input hm;
output [7:0] s, hh;
output gg;
wire [7:0] ps, pc, g, h, g1, h1, s1, g2, h2, s2;
wire h01;
// preprocessing - HA
assign g[7:0] = x[7:0] & y[7:0];
assign h[7:0] = x[7:0] ^ y[7:0];
assign h01 = hm & h[0];
assign s1[7] = h[7] ^ g[6];
Arytmetyka resztowa.doc, Janusz Biernat

assign s1[5] = h[5] ^ g[4];
assign s1[3] = h[3] ^ g[2];
assign s1[1] = h[1] ^ g[0];
GP inst11 (g[1], h[1], g[0], h01, g1[1], h1[1]);
GP inst13 (g[3], h[3], g[2], h[2], g1[3], h1[3]);
GP inst15 (g[5], h[5], g[4], h[4], g1[5], h1[5]);
GP inst17 (g[7], h[7], g[6], h[6], g1[7], h1[7]);
assign s2[7] = s1[7] ^ (h[6] & g1[5]);
assign s2[6] = h[6] ^ g1[5];
assign s2[3] = s1[3] ^ (h[2] & g1[1]);
assign s2[2] = h[2] ^ g1[1];
GP inst23 (g1[3], h1[3], g1[1], h1[1], g2[3],
h2[3]);
GP inst27 (g1[7], h1[7], g1[5], h1[5], g2[7],
h2[7]);
assign h2[6] = h[6] & h1[5];
assign h2[2] = h[2] & h1[1];
GP inst37 (g2[7], h2[7], g2[3], h2[3], gg, hh[7]);
assign hh[6:4]={h2[6] & h2[3], h1[5]&h2[3],
h[4]&h2[3]};
assign hh[3:0]= {h2[3], h2[2], h1[1], h01};
assign s[7] = s2[7] ^ (h2[6] & g2[3]);
assign s[6] = s2[6] ^ (h1[5] & g2[3]);
assign s[5] = s1[5] ^ (h[4] & g2[3]);
assign s[4] = h[4] ^ g2[3];
assign s[3:0] = {s2[3:2], s1[1], h[0]};
endmodule
// This is ELMMA mod 2E8P1. It uses sums and
 propagate of the ELM
// This is ELMMA_FXS_8 (ELM Modulo Adder + Final
Sum)
module ELMMA(x, y, r);
input [8:0] x, y; // 9-bit inputs
and outputs
output [8:0] r;
wire [8:0] ps;
wire [7:0] hh, s;
wire [8:1] pc;
wire ncout, ppc;
// SCSA // Carry Save Decrement (X+Y-1)
assign ps[7:0] = ~(x[7:0] ^ y[7:0]);
assign pc[8:1] = x[7:0] | y[7:0];
assign ps[8] = x[8] ^ y[8];
assign ppc = x[8] & y[8];
// produces partial sums s[7:0] and  propagate
hh[7:0]= prop [8:1], and gg[7]
ELM_8_ORG inst801 (pc[8:1], ps[8:1], ps[0],
s[7:0], hh[7:0], gg);
assign ncout = ~(ppc | gg);
//generowanie reszt
assign r[0] = ps[0] ^ ncout;



assign r[7:1] = s[6:0] ^ ({hh[5:0], ps[0]} &
{7{ncout}});
assign r[8]= hh[7];
endmodule

// ELMMA16_1 (2E16P1, v.1). It generates sum s[15:0],
hh[15:0], gg[15]
module GP (gvert, pvert, glat, plat, gnext, pnext);
// standard node
input gvert, pvert, glat, plat;
output gnext, pnext;
assign gnext = gvert | pvert & glat;
assign pnext = pvert & plat;
endmodule
module ELM_16_ORG (x, y, hm, s, hh, gg); // This
is a modified 16-bit ELM
input [15:0] x, y;
input hm;
output [15:0] s, hh;
output gg;
wire [15:0] ps, pc, g, h, g1, h1, s1, g2, h2, s2,
g3, h3, s3;
wire h01;
// preprocessing - HA
assign g[15:0] = x[15:0] & y[15:0];
assign h[15:0] = x[15:0] ^ y[15:0];
assign h01 = hm & h[0];
assign s1[15] = h[15] ^ g[14];
assign s1[13] = h[13] ^ g[12];
assign s1[11] = h[11] ^ g[10];
assign s1[9] = h[9] ^ g[8];
assign s1[7] = h[7] ^ g[6];
assign s1[5] = h[5] ^ g[4];
assign s1[3] = h[3] ^ g[2];
assign s1[1] = h[1] ^ g[0];
// s1[14,12,10,8,6,4,2,0]=h[14,12,10,8,6,4,2],hx
GP inst11 (g[1], h[1], g[0], h01, g1[1], h1[1]);
GP inst13 (g[3], h[3], g[2], h[2], g1[3], h1[3]);
GP inst15 (g[5], h[5], g[4], h[4], g1[5], h1[5]);
GP inst17 (g[7], h[7], g[6], h[6], g1[7], h1[7]);
GP inst19 (g[9], h[9], g[8], h[8], g1[9], h1[9]);
GP inst1B (g[11], h[11], g[10], h[10], g1[11],
h1[11]);
GP inst1D (g[13], h[13], g[12], h[12], g1[13],
h1[13]);
GP inst1F (g[15], h[15], g[14], h[14], g1[15],
h1[15]);
// h1[14,12,10,8,6,4,2,0]=h[14,12,10,8,6,4,2,0]
assign s2[15] = s1[15] ^ (h[14] & g1[13]);
assign s2[14] = h[14] ^ g1[13];
assign s2[11] = s1[11] ^ (h[10] & g1[9]);
assign s2[10] = h[10] ^ g1[9];
assign s2[7] = s1[7] ^ (h[6] & g1[5]);
assign s2[6] = h[6] ^ g1[5];
assign s2[3] = s1[3] ^ (h[2] & g1[1]);
assign s2[2] = h[2] ^ g1[1];



//s2[13,12,9,8,5,4,1,0]=s1[13,12,9,8,5,4,1,0]
GP inst23 (g1[3], h1[3], g1[1], h1[1], g2[3],
h2[3]);
GP inst27 (g1[7], h1[7], g1[5], h1[5], g2[7],
h2[7]);
GP inst2B (g1[11], h1[11], g1[9], h1[9], g2[11],
h2[11]);
GP inst2F (g1[15], h1[15], g1[13], h1[13],
g2[15], h2[15]);
assign h2[14] = h[14] & h1[13];
assign h2[10] = h[10] & h1[9];
assign h2[6] = h[6] & h1[5];
assign h2[2] = h[2] & h1[1];
// h2[13,12,9,8,5,4,1,0]=h1[14,12,10,8,6,4,2,0]
GP inst37 (g2[7], h2[7], g2[3], h2[3], g3[7],
h3[7]);
GP inst3F (g2[15], h2[15], g2[11], h2[11],
g3[15], h3[15]);
assign h3[14] = h2[14] & h2[11];
assign h3[13] = h1[13] & h2[11];
assign h3[12] = h[12] & h2[11];
assign h3[6] = h2[6] & h2[3];
assign h3[5] = h1[5] & h2[3];
assign h3[4] = h[4] & h2[3];
// h3[11,10,9,8,3,2,1,0]=h2[11,10,9,8,3,2,1,0]
// w prawym bloku hh[7:0]=h3[7:0], w lewym
hh[j]=h3[j] & h3[7]
assign hh[15:9]={h3[15]&h3[7], h3[14]&h3[7],
h3[13]&h3[7], h3[12]&h3[7]};
assign hh[11:8]={h2[11]&h3[7], h2[10]&h3[7],
h1[9]&h3[7], h[8]&h3[7]};
assign hh[7:0]={h3[7], h3[6], h3[6], h3[4],
h2[3], h2[2], h1[1], h01};
assign gg = g3[15] | (h3[15] & g3[7]);
assign s3[15] = s2[15] ^ (h2[14] & g2[11]);
//od bitu 8 w górę
assign s3[14] = s2[14] ^ (h1[13] & g2[11]);
assign s3[13] = s1[13] ^ (h[12] & g2[11]);
assign s3[12] = h[12] ^ g2[11];
assign s3[11:8] = {s2[11], s2[10], s1[9], h[8]};
assign s3[7] = s2[7] ^ (h2[6] & g2[3]);
assign s3[6] = s2[6] ^ (h1[5] & g2[3]);
assign s3[5] = s1[5] ^ (h[4] & g2[3]);
assign s3[4] = h[4] ^ g2[3];
assign s3[3:0] = {s2[3], s2[2], s1[1], h[0]};
assign s[15] = s3[15] ^ (h3[14] & g3[7]);
assign s[14] = s3[14] ^ (h3[13] & g3[7]);
assign s[13] = s3[13] ^ (h3[12] & g3[7]);
assign s[12] = s3[12] ^ (h2[11] & g3[7]);
assign s[11] = s3[11] ^ (h2[10] & g3[7]);
assign s[10] = s3[10] ^ (h1[9] & g3[7]);
assign s[9] = s3[9] ^ (h[8] & g3[7]);
assign s[8] = s3[8] ^ g3[7];



assign s[7:0] = s3[7:0];
endmodule
// This is ELMMA mod 2E16P1. It uses sums and
 propagate of the ELM
// This is ELMMA_FXS_16 (ELM Modulo Adder +
Final Sum)
module ELMMA(x, y, r);
input [16:0] x, y; // 17-bit
inputs and outputs
output [16:0] r;
wire [16:0] ps;
wire [15:0] hh, s;
wire [16:1] pc;
wire ncout, ppc;
// SCSA // Carry Save Decrement (X+Y-1)
assign ps[15:0] = ~(x[15:0] ^ y[15:0]);
assign pc[16:1] = x[15:0] | y[15:0];
assign ps[16] = x[16] ^ y[16];
assign ppc = x[16] & y[16];
// produces partial sums s[15:0] and
hh[15:0]= prop [16:1], and gg[15]
ELM_16_ORG instG01 (pc[16:1], ps[16:1], ps[0],
s[15:0], hh[15:0], gg);
assign ncout = ~(ppc | gg);
//generowanie reszt
assign r[0] = ps[0] ^ ncout;
assign r[15:1] = s[14:0] ^ ({hh[13:0], ps[0]} &
{15{ncout}});
assign r[16]= hh[15];
endmodule




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