stat on1

tl Statistics    - p|

Total:

5337 Cycle(s) executed.

ID executed by 2653 Instruction(s).

2 Instruction(s) currently in Pipeline.

Hardware cor.figuratior.:

Memory size: 32768 Bytes faddEX-Stages: 1, required Cycles: 2 fmulEX-Stage$: 1, required Cycles: 5 fdivEX-Stages: 1, required Cycles: 19 Forwarding enabled.

Stalls:

RAW stalls: 2337 (49.04% of all Cycles), thereof:

LD stalls: 0 (0.00% of RAW stalls)

Branch/Jump stalls: 235 (3.14% of RAW stalls) Floafing point stalls: 2652 (91.36% of RAW stalls) WAW stalls: 0 (0.00% of all Cycles)

Structural stalls: 0 (0.00% of all Cycles)

Conłrol stalls: 233 (3.96% of all Cycles)

T rap stalls: 3 (0.05% of all Cycles)

Total: 3123 Stall(s) (53.05% of all Cycles)

Cor.ditior.al 3rar.ches) :

T otal: 235 (3.34% of all Instructions), thereof: taken: 233 (99.15% of all cond. Branches) not taken: 2 (0.85% of all cond. Branches)

Load-/3tore-Instructior.s :

T otal: 372 (32.31 % of all Instructions), thereof:

Loads: 636 (72.94% of Load-/Store-lnstructions) Stores: 236 (27.06% of Load7Store-lnstructions)

Floating point stage instructions:

T otal: 367 (32.62% of all Instructions), thereof:

Addiłions: 552 (63.67% of Floating point stage inst.) Mulłiplications: 210 (24.22% of Floating point stage inst.) Divisions: 105 (12.11 % of Floating point stage inst.)

Traps:

Traps: 1 (0.04% of all Instructions)