INTEGRATED CIRCUITS DATA SHEET TDA9845 TV and VTR stereo/dual sound processor with digital identification 1995 Mar 20 Preliminary specification Supersedes data of January 1993 File under Integrated Circuits, IC02 Philips Semiconductors Philips Semiconductors Preliminary specification TV and VTR stereo/dual sound processor TDA9845 with digital identification FEATURES GENERAL DESCRIPTION " Supply voltage 5 to 8 V The TDA9845 is a stereo/dual sound processor for TV and VTR sets. Its identification ensures safe operation by using " Source selector internal digital PLL technique with extremely small " Stereo matrix bandwidth, synchronous detection and digital integration " AF input for mono source (switching time maximum 2.1 s; identification concerning the main functions). " AF outputs for Main " LED operation mode indication (stereo and dual) " High identification reliability. QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT VP supply voltage (pin 18) 4.5 5 8.8 V IP supply current (pin 18) without LED current 12 13 16.5 mA Vi(rms) nominal input signal voltage 54% modulation (Vi 1, Vi 2, Vi 3) (RMS value) B/G - 250 - mV L (only for Vi 1) - 500 - mV Vo(rms) nominal output signal voltage 54% modulation - 500 - mV (RMS value) Vo(rms) clipping level of the output signal THD d"1.5% voltages (RMS value) VP = 5 V 1.4 1.6 - V VP = 8 V 2.4 2.65 - V ILON input current LED ON - - 12 mA Vi pil input voltage sensitivity of pilot unmodulated 5 - 100 mV frequency S/N(W) weighted signal-to-noise ratio CCIR468-3 66 75 - dB THD total harmonic distortion - 0.2 0.3 % Tamb operating ambient temperature range 0 - +70 °C fident identification window width STEREO 2.2 - 2.2 Hz DUAL 2.3 - 2.3 Hz tident ON total identification time ON 0.35 - 2.1 s Vi tuner identification voltage sensitivity - 28 - dBµV "fpil pull-in frequency range of pilot PLL fÉ = 10.008 MHz lower side -296 - -296 Hz upper side 302 - 302 Hz ORDERING INFORMATION PACKAGE TYPE NUMBER NAME DESCRIPTION VERSION TDA9845 DIP20 plastic dual in-line package; 20 leads (300 mil) SOT146-1 TDA9845T SO20 plastic small outline package; 20 leads; body width 7.5 mm SOT163-1 1995 Mar 20 2 V i 3 250 mV RMS C C D1 D2 10 nF 10 nF 2.2 µF 13 10 AM 50 k &! 2.2 µF 2.2 k &! 17 8 -3 dB 0 dB V i 1 V 3 dB 5 k &! 500 mV RMS 12 o 1 6 dB L+R , A 15 k&! AM -6 dB 2 2.2 k &! -6 dB 250 mV RMS MAIN A/MONO 250 mV RMS (AM: 500 mV RMS) V 35 k&! 11 500 mV RMS o 2 6 dB L L/A/MONO 250 mV RMS 10 k &! 10 k &! 35 k&! stereo transmission 15 2.2 µF 15 k&! LEDST 9 R/B 1 k &! V i 2 0 dB V P 250 mV RMS 5 k &! R, B 14 LEDDU mute 250 mV RMS TDA9845 dual transmission DUAL bit 30 k&! DIGITAL PLL DIGITAL AND 274 Hz INTEGRATOR 1 DEMODULATOR C1 47 pF 2 CONTROL C2 LOGIC 6 20 V i pil C3 DIGITAL PLL DIGITAL DIGITAL 117 Hz AND 3.3 nF PLL 2.5 INTEGRATOR DEMODULATOR mH STEREO 5 bit C 25 k &! DCL 100 nF 25 k &! OSCILLATOR 3 C AGC POWER-ON V SUPPLY ref RESET 10 µF 4 C LP 7 18 16 10 nF 19 1/2 V P MED644 - 1 C + ref 10 MHz 100 µF/ 16 V V P XTAL C ref GND Input and output levels are nominal values. They are related to the SCART norm. (AM: m = 0.54, FM: "f =Ä…27 kHz). Fig.1 Block diagram of the bipolar TV/VTR-stereo decoder. 1995 Mar 20 BLOCK DIAGRAMS Philips Semiconductors with digital identification TV and VTR stereo/dual sound processor + + 3 + Preliminary specification TDA9845 + V i 3 250 mV RMS C C D1 D2 10 nF 10 nF 2.2 µF 13 10 AM 50 k &! 2.2 µF 2.2 k &! 17 8 -3 dB 0 dB V V i 1 3 dB 5 k &! 500 mV RMS 12 o 1 6 dB L+R , A 15 k&! AM -6 dB 2 2.2 k &! -6 dB 250 mV RMS MAIN A/MONO 250 mV RMS (AM: 500 mV RMS) V 35 k&! 11 500 mV RMS o 2 6 dB L L/A/MONO 250 mV RMS 10 k &! 10 k &! 35 k&! stereo transmission 15 2.2 µF 15 k&! LEDST 9 R/B 1 k &! V i 2 0 dB V P 250 mV RMS 5 k &! R, B 14 LEDDU TDA9845 mute 250 mV RMS dual transmission DUAL bit 27 k&! DIGITAL PLL DIGITAL AND 274 Hz INTEGRATOR 1 DEMODULATOR C1 180 pF 2 CONTROL C2 LOGIC 6 20 V i pil C3 DIGITAL PLL DIGITAL DIGITAL 4.7 117 Hz AND 18 nF PLL mH INTEGRATOR DEMODULATOR Ä… 2% Ä… 5% STEREO 5 bit 25 k &! C DCL 100 nF 25 k &! OSCILLATOR 3 C AGC POWER-ON V SUPPLY ref RESET 10 µF 4 C LP 7 16 10 nF 19 18 1/2 V P MED645 - 1 + 10 MHz 100 µF / 16 V V P XTAL C ref GND The components of the external LC band-pass filter have the following order-No.: Input and output levels are nominal values. Philips Germany only No: 431202017525 or Fastron Sdn. Bha., Malaysia type They are related to the SCART norm. SMCC 472 J for L = 4.7 MHz (Ä…5%) (AM: m = 0.54, FM: "f =Ä…27 kHz). Philips Components No: 2222 429 71802, C = 1.8 nF (Ä…2%). Fig.2 Block diagram of the bipolar TV/VTR-stereo decoder with fixed coil (alignment-free). 1995 Mar 20 Philips Semiconductors with digital identification TV and VTR stereo/dual sound processor + + 4 + Preliminary specification TDA9845 + Philips Semiconductors Preliminary specification TV and VTR stereo/dual sound processor TDA9845 with digital identification PINNING SYMBOL PIN DESCRIPTION C1 1 control input Port C1 C2 2 control input Port C2 CAGC 3 AGC capacitor of pilot frequency amplifier lfpage CLP 4 identification low-pass capacitor C1 1 20 C3 CDCL 5 DC loop capacitor C2 2 19 XTAL Vi pil 6 pilot frequency input voltage CAGC 3 VP 18 Cref 7 capacitor of reference voltage (1D 2VP) CLP 4 CD2 17 Vi 1 8 AF input signal voltage 1 (from sound carrier 1 or CDCL 5 16 GND AM sound (standard L) TDA9845 Vi pil 6 15 LEDST Vi 2 9 AF input signal voltage 2 (from sound carrier 2) Vi 3 10 AF input signal voltage 3 (Mono sound) Cref 7 14 LEDDU Vo2 11 AF output signal voltage 2 (Main) Vi 1 8 CD1 13 Vo1 12 AF output signal voltage 1 (Main) Vi 2 9 Vo 1 12 CD1 13 50 µs de-emphasis capacitor of AF Channel 1 Vi 3 10 Vo 2 11 LEDDU 14 LED (dual) MED646 LEDST 15 LED (stereo) GND 16 ground (0 V) CD2 17 50 µs de-emphasis capacitor of AF Channel 2 VP 18 supply voltage (+5 to +8 V) XTAL 19 10 MHz crystal input Fig.3 Pin configuration. C3 20 control input Port C3 1995 Mar 20 5 Philips Semiconductors Preliminary specification TV and VTR stereo/dual sound processor TDA9845 with digital identification The identification signal is amplified and fed through an FUNCTIONAL DESCRIPTION AGC low-pass filter with external capacitor CAGC (pin 3) to AF signal handling obtain the AGC voltage for controlling the gain of the pilot signal amplifier. The input AF signals, derived from the two sound carriers, are processed in analog form using operational amplifiers. The identification stages consist of two digital PLL circuits Dematrixing uses the technique of two amplifiers with digital synchronous demodulation and digital processing the AF signals. Finally, a source selector integrators to generate the stereo or dual sound provides the facility to route the mono signal through to the identification bits which can be indicated via LEDs. outputs ( forced mono ). A 10 MHz crystal oscillator provides the reference clock De-emphasis is performed by two RC low-pass filter frequency. The corresponding detection bandwidth is networks with internal resistors and external capacitors. larger than Ä…50 Hz for the pilot carrier signal, so that This provides a frequency response with the tolerances fp-variations from the transmitter can be tracked in the given in Fig.4. event of missing synchronization with the horizontal frequency fH. However the detection bandwidth for the A source selector, controlled via the control input ports identification signal is made small (Ä…1 Hz) to reduce allows selection of the different modes of operation in mis-identification. accordance with the transmitted signal. The device was designed for a nominal input signal (FM: 54% modulation Figure 2 shows an example of the alignment-free fp is equivalent to "f =Ä…27 kHz) of 250 mV RMS (Vi 1, Vi 2) band-pass filter. To achieve the required QL of around 12, and for a nominal input signal (AM: m = 0.54) of 500 mV the Q0 at fp of the coil was chosen to be around 25 RMS (Vi 1), respectively 250 mV RMS (Vi 3). A nominal (effective Q0 including PCB influence). Using coils with gain of 6 dB for Vi 1 and Vi 2 signals (0 dB for Vi 1 signal other Q0, the RC-network (RFP, CFP) has to be adapted (AM sound)) and 6 dB for Vi 3 signal is built-in. By using accordingly. It is assumed that the loss factor tan´ of the rail-to-rail operational amplifiers, the clipping level resonance capacitor is d"0.01 at fp. (THD d"1.5%) is 1.60 V RMS for VP = 5 V and 2.65 V RMS Copper areas under the coil might influence the loaded Q for VP = 8 V at outputs Vo1, Vo2. Care has been taken to and have to be taken into account. Care has also to be minimize switching plops. Also total harmonic distortion taken in environments with strong magnetic fields when and random noise are considerably reduced. using coils without magnetic shielding. Identification Control input ports The pilot signal is fed via an external RC high-pass filter The complete IC is controlled by the three control input and single tuned LC band-pass filter to the input of a gain ports C1, C2 and C3 (TTL-level). With these ports the user controlled amplifier. The external LC band-pass filter in can select between different AF sources according to the combination with the external RC high-pass filter should transmitter status (see Table 1). Finally Schmitt-triggers have a loaded Q-factor of approximately 40 to 50 to are added in the input port interfaces to suppress spikes ensure the highest identification sensitivity. By using a from the control lines C1, C2 and C3. fixed coil (Ä…5%) to save the alignment (see Fig.2), a Q-factor of approximately 12 is proposed. This may cause After a power-on reset, the logic is reset (mute mode for a loss in sensitivity of approximately 2 to 3 dB. A digital the AF channel). After some time (d"1 ms), when the PLL circuit generates a reference carrier, which is power-on reset is automatically deactivated, the switch synchronized with the pilot carrier. This reference carrier position of the Main channel is changed according to the and the gain controlled pilot signal are fed to the control input port levels C1, C2 and C3. AM-synchronous demodulator. The demodulator detects For standard L, the AM sound is fed via the AF input (Vi 1) the identification signal, which is fed through a low-pass to the two AF outputs (Vo1,Vo2). This can also be filter with external capacitor CLP (pin 4) to a Schmitt-trigger achieved by feeding at AF input Vi 3. for pulse shaping and suppression of low level spurious signal components. This is a measure against The logic level combination 111 of the control input ports mis-identification. (C3, C2 and C1) is not allowed (see Table 1). 1995 Mar 20 6 Philips Semiconductors Preliminary specification TV and VTR stereo/dual sound processor TDA9845 with digital identification Power supply ESD protection The different supply voltages and currents required for the All pins are ESD protected. The protection circuits analog and digital circuits are derived from an internal represent the latest state of the art. band-gap reference circuit. The AF reference voltage is 1 1 D 2VP. For a fast setting to D 2VP an internal start-up circuit Internal circuit is added. A good ripple rejection is achieved with the The internal pin loading diagram is given in Fig.7. external capacitor Cref = 100 µF/16 V in conjunction with 1 the high ohmic input of the D 2VP pin (pin 7). No additional DC load on this pin is allowed. Power-on reset When a power-on reset is activated by switching on the supply voltage or because of a supply voltage breakdown, the 117/274 Hz DPLL, the 117/274 Hz integrator and the logic will be reset. The AF channel (Main) is muted (d"1 ms). LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VP supply voltage (pin 18) -0.3 10 V Vi voltage at pins 1, 2 and 20 -0.3 9.0 V Vi voltage at pins 3 to 13, 17 and 19 -0.3 VP V Vi voltage at pins 14 and 15 -0.3 10 V Tstg storage temperature -25 +150 °C Tamb operating ambient temperature 0 +70 °C Vesd electrostatic handling for all pins note 1 -500 +500 V Note 1. Charge device model class A: discharging a 200 pF capacitor through a &! series resistor. THERMAL CHARACTERISTICS SYMBOL PARAMETER VALUE UNIT Rth j-a thermal resistance from junction to ambient in free air DIP20 73 K/W SO20 90 K/W 1995 Mar 20 7 Philips Semiconductors Preliminary specification TV and VTR stereo/dual sound processor TDA9845 with digital identification CHARACTERISTICS VP =5V; Tamb = +25 °C; nominal input signal Vi 1, 2 = 0.25 V RMS value (FM: 54% modulation is equivalent to "f =Ä…27 kHz); nominal input signal Vi 1 = 0.5 V RMS value (AM: m = 0.54); nominal input signal Vi 3 = 0.25 V RMS value (AM: m = 0.54); nominal output signal Vo1, 2 = 0.5 V RMS value; fAF = 1 kHz; Vi pil = 16 mV RMS value; fpil = 54.6875 kHz (identification frequencies: stereo = 117.48 Hz, dual = 274.12 Hz), 50 µs pre-emphasis; noise measurement in accordance with CCIR468-3 , working oscillator frequency fÉ = 10008 MHz; currents into the IC positive; measured in test circuit Fig.5 unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supply VP supply voltage (pin 18) 4.5 5 8.8 V IP supply current (pin 18) without LED current 12 13 16.5 mA Ptot total power dissipation 54 65 145.2 mW 1 1 Vn(DC) DC voltage D 2VP - 0.1 D 2VP 1D 2VP + 0.1 V (pins 8 to 13 and 17) 1 1 Vref(DC) DC reference voltage (pin 7) D 2VP - 0.1 D 2VP 1D 2VP + 0.1 V lL(DC) DC leakage current (pin 7) -- Ä…1 µA AF Inputs; Vi 1 and Vi 2 (pins 8 and 9) Vi(rms) nominal input signal voltage 54% modulation (RMS value) B/G - 0.25 - V L (only Vi 1) - 0.5 - V Vi(rms) clipping voltage level THD d" 1.5% (RMS value) VP = 5 V; B/G 0.625 0.715 - V VP = 8 V; B/G 1.050 1.200 - V VP = 5 V; L (only Vi 1) 1.200 1.600 - V VP = 8 V; L (only Vi 1) 2.100 2.356 - V Gv AF signal voltage gain G = Vo/Vi; note 1 B/G 56 7dB L (only Vi 1) -1 0 +1 dB Ri input resistance 40 50 60 k&! Rdeem internal de-emphasis resistor see Fig.4 4.25 5.0 5.75 k&! (pins 13 and 17) Additional AF input pin (pin 10) Vi(rms) nominal input signal voltage 54% modulation - 0.25 - V (RMS value) Vi(rms) clipping voltage level THD d" 1.5% (RMS value) VP = 5 V 0.625 0.715 - V 1.050 1.200 V VP =8V Gv AF signal voltage gain 56 7dB G=Vo/Vi; note 1 Riinput resistance 40 50 60 k&! 1995 Mar 20 8 Philips Semiconductors Preliminary specification TV and VTR stereo/dual sound processor TDA9845 with digital identification SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT AF outputs (pins 11 and 12) Vo(rms) nominal output signal voltage THD d" 0.3%; - 0.5 - V (RMS value) 54% modulation Vo(rms) clipping voltage level THD d" 1.5% (RMS value) VP = 5 V 1.4 1.6 - V VP = 8 V 2.4 2.65 - V Ro output resistance 150 250 350 &! CL load capacitor on output -- 1.5 nF RL load resistor on output 10 -- k&! (AC-coupled) B frequency response fi = 40 to 20000 Hz; -0.5 - +0.5 dB (bandwidth) note 2 B-3dB frequency response -3 dB; note 2 300 350 400 kHz THD total harmonic distortion note 1 - 0.2 0.3 % S/N(W) weighted signal-to-noise CCIR468-3 66 75 - dB ratio (quasi-peak) Ä…cr crosstalk attenuation for notes 1 and 3 DUAL ôÅ‚ZsôÅ‚ d" 1k&! 70 75 - dB STEREO ôÅ‚ZsôÅ‚ d" 1k&! 40 45 - dB Ä…mute mute attenuation ôÅ‚ZsôÅ‚ d" 1k&!; note 1 76 80 - dB "VDC change of DC level output after switching -- Ä…10 mV voltage between any two modes of operation PSRR power supply ripple rejection fr = 70 Hz; see Fig.6 50 65 - dB IO(DC) DC output current -- Ä…20 µA 10 MHz crystal oscillator (pin 19) fr series resonant frequency of CL = 20 pF 9.995 10.008 10.021 MHz crystal (fundamental mode) fÉ working oscillator frequency over operating 9.988 10.008 10.028 MHz (running in parallel temperature range resonance mode) including ageing and influence of drive circuit Rr equivalent crystal series even at extremely low - 60 200 &! resistance drive level (<1 pW) over operating temperature range with C0 =6pF Rn crystal series resistance of 2 × Rr -- &! unwanted mode C0 crystal parallel capacitance with Rr d" 100 &!- 610pF C1 crystal motional capacitance - 25 50 fF PXTAL level of drive in operation -- 5µW VOSC(p-p) oscillator operating voltage 500 550 600 mV (peak-to-peak value) 1995 Mar 20 9 Philips Semiconductors Preliminary specification TV and VTR stereo/dual sound processor TDA9845 with digital identification SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Pilot processing Vi pil(rms) pilot input voltage level at unmodulated 5 - 100 mV pin 6 (RMS value) Ri pil pilot input resistance 500 1000 - k&! Ci pil pilot input capacitance -- 3pF m modulation depth AM 25 50 75 % "fpil pilot PLL pull-in frequency fÉ = 9.988 MHz range (referenced to lower side -405 --405 Hz fpil = 54.6875 kHz) upper side 192 - 192 Hz fÉ = 10.008 MHz lower side -296 --296 Hz upper side 302 - 302 Hz fÉ = 10.028 MHz lower side -188 --188 Hz upper side 411 - 411 Hz tpil pilot PLL pull-in time 0 - 1.7 ms fLP low-pass frequency -3 dB 450 600 750 Hz response R4 low-pass output resistance 18.75 25 31.25 k&! V4(rms) identification threshold -- 70 mV voltage (RMS value) QL loaded quality factor of HIGH sensitivity; 40 - 50 resonance circuit see Fig.1 loaded quality factor of sensitivity loss 2 to 3 dB; - 12 - resonance circuit with fixed see Fig.2 coil tacqui AGC AGC acquisition time Vi pil(rms) switched from -- 0.1 s 0 to 100 mV RMS value Identification (internal functions) Vi tuner identification voltage note 4 - 28 - dBµV sensitivity C/N pilot carrier-to-noise ratio for note 5 - 33 - dB/Hz start of identification H hysteresis note 4 -- 2dB fdet pull-in frequency range of lower side identification PLL STEREO -0.63 --0.63 Hz (referenced to DUAL -0.69 --0.69 Hz fdet STEREO = 117.48 Hz and upper side fdet DUAL = 274.12 Hz) STEREO 0.63 - 0.63 Hz DUAL 0.69 - 0.69 Hz 1995 Mar 20 10 Philips Semiconductors Preliminary specification TV and VTR stereo/dual sound processor TDA9845 with digital identification SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT tdet pull-in time of identification STEREO 0 - 0.8 s PLL (referenced to DUAL 0 - 0.8 s fdet STEREO = 117.48 Hz and fdet DUAL = 274.12 Hz) fident identification window STEREO; note 6 2.2 - 2.2 Hz frequency width (referenced DUAL; note 6 2.3 - 2.3 Hz to fdet STEREO = 117.48 Hz and fdet DUAL = 274.12 Hz) tintegr integrator time constant 0.94 - 0.94 s tident(on) total identification time on STEREO; note 7 0.35 - 2.0 s DUAL; note 7 0.35 - 2.0 s tident(off) total identification time off STEREO; note 8 0.60 - 1.5 s DUAL; note 8 0.60 - 1.5 s LED (pins 14 and 15) VL(off) output voltage LED off -- 8.8 V VL(on) output voltage LED on -- 0.7 V IL(off) input current LED off -- 1µA IL(on) input current LED on -- 12 mA Control input ports C1, C2 and C3 (pins 1, 2 and 20) VCL LOW level input voltage 0 - 0.8 V VCH HIGH level input voltage 2.4 - 8.8 V ICL LOW level input current -- -1 µA ICH HIGH level input current -- 1µA Notes 1. Vo = 0.5 V RMS value; f = 1 kHz. 2. Without de-emphasis capacitors with respect to nominal gain. 3. In dual mode: A (B)-signal into B (A) channel. In stereo mode: R-signal into left channel; L-signal = 0. 4. Tuner input signal, measured with PCALH reference front end (1D 2EMF, 75 &!, 2T/20T/white bar, 100% video) and PC/SC1 = 13 dB; PC/SC2 = 20 dB. The pilot band-pass has to be aligned. 5. Bandwidth of the pilot BP-filter B-3dB = 1.2 kHz. Vi 2 input driven with identification-modulated pilot carrier and white noise. 6. Identification window is defined as twice the pull-in frequency range (lower plus upper side) of identification PLL (steady detection) plus window increase due to integrator (fluctuating detection). 7. The maximum total system identification time ON is equal to tident(on) plus tacqui AGC. 8. The maximum total system identification time OFF is equal to tident(off). 1995 Mar 20 11 Philips Semiconductors Preliminary specification TV and VTR stereo/dual sound processor TDA9845 with digital identification Table 1 Control input port matrix to select AF inputs and AF outputs INPUT SIGNAL OUTPUT SIGNAL CONTROL INPUT LED ST/DS/M EXT MAIN PORT(1) INPUT/OUTPUT MODE Vi 1 Vi 2 Vi 3 Vo1 Vo2 C3 C2 C1 DUAL STEREO PIN 8 PIN 9 PIN 10 PIN 12 PIN 11 PIN 20 PIN 2 PIN 1 PIN 14 PIN 15 Mute; note 2 - - - - no signal 0 0 0 OFF OFF Sound mute - - - - no signal 1 0 0 note 3 note 3 Mono M M - - M M 0 0 1 OFF OFF M - - M M 0 1 0 OFF OFF AM - - AM AM 0 1 1 OFF OFF Stereo ST S R - L R 0 0 1 OFF ON S R - S S 0 1 0 OFF ON S R - S S 0 1 1 OFF ON Dual DS A B - A B 0 0 1 ON OFF A B - A A 0 1 0 ON OFF A B - B B 0 1 1 ON OFF External; note 4 -- - C C C 1 0 1 note 3 note 3 - - C C C 1 1 0 OFF OFF Notes 1. The combination 111 is not allowed. 2. In mute mode the content of the 117 Hz/274 Hz integrator will be reset. The LEDs are switched OFF. 3. The LED show the identification status. 4. In external mode, in the combination 110 only the LEDs are switched OFF. Table 2 Explanation of Table 1 SIGNAL DESCRIPTION R right L left S (L + R) -------------------- 2 A and B dual sound A/B C external sound source AM AM sound (standard L) M mono sound DS dual sound ST stereo sound 1995 Mar 20 12 Philips Semiconductors Preliminary specification TV and VTR stereo/dual sound processor TDA9845 with digital identification MED647 +2 VoAF R: -15%; C: -5% (dB) +1 0 -1 R: +15%; C: +5% -2 2 3 4 5 10 10 10 10 10 foAF (Hz) Fig.4 Tolerance scheme of AF frequency response; de-emphasis with CD1, CD2 = 10 nF (Ä…5%), Rinternal =5k&! (Ä…15%). 1995 Mar 20 13 Philips Semiconductors Preliminary specification TV and VTR stereo/dual sound processor TDA9845 with digital identification handbook, full pagewidth C1 C3 control input port 1 20 control input 10 MHz ports XTAL C2 2 19 VP CVP CAGC 10 µF 3 18 10 µF CLP 10 nF 5% 50 µs 4 17 CD2 10 nF de-emphasis 100 nF C DCL 1/2 VP 5 16 TDA9845 stereo transmission 6 15 1 k&! 2.5 3.3 VP 47 pF mH nF 7 14 dual transmission 30 k&! 2.2 k&! 5% AF from 5.5 MHz 50 µs V 8 13 i 1 or from AM demodulator (L) CD1 10 nF de-emphasis 2.2 k&! AF from 5.742 MHz V i 2 9 12 Vo 1 main from external sound source V Vo 2 i 3 10 11 3 x 2.2 µF MED648 - 1 Fig.5 Test circuit of the stereo decoder TDA9845. handbook, full pagewidth V o 1 12 V B V P 18 measurements TDA9845 on outputs V 10 k &! o 2 11 7 8 9 10 16 100 µF 5 V modulated with 200 mV (p-p) 100 µF/ 100 µF 16 V 70 Hz MED650 - 1 Fig.6 Test circuit for measurement of ripple rejection. 1995 Mar 20 14 Philips Semiconductors Preliminary specification TV and VTR stereo/dual sound processor TDA9845 with digital identification INTERNAL CIRCUITRY handbook, full pagewidth V P V P 3 µA 3 µA 2 k &! 20 C3 2 k &! 1 C1 19 XTAL
3 pF V P + 13 k &! +5 V 5 k &! 18 3 µA V P 2 k &! 2 C2 5 k &! 17 C D2 60 µA TDA9845 25 k&! 3 V P C AGC + V GND V P 16 P 4 C LP V 15 40 µA V 25 k&! P P LEDST 60 µA 1/2 V P 5 C DCL V P 25 k&! 14 LEDDU 40 µA 5 k&! 5 k&! V i pil 6 7 C 5 k&! 13 ref C D1 22.5 k&! I B 5 k&! 5 k&!
V + P 8 V i 1 V P 50 k &! I B AF inputs 100 &! 12 1/2 V P V o 1 V i 2 9 V P 50 k &! 200 µA I B AF outputs 1/2 V P 100 &! 11 V 10 o 2 V i 3 50 k &! I B 200 µA 1/2 V P MED649 - 1 V P ESD protection diode zener diode protection for pins 3 to 13, 17 and 19 for pins 1, 2, 14, 15, 18 and 20 Fig.7 Internal circuitry. 1995 Mar 20 15 +