Bootcode TP´s

TP1

L275

TP2

GND

TP3

GND

TP4

*RESET

TP5

BKPT

TP6

FREEZE

TP7

IFETCH

TP8

IPIPE

TP11

L_BATT+

TP12

RX TX ANT_SIGNAL

TP13

TX LOCAL OSC TUNING

TP14

RX LOCAL OSC TUNING

TP15

MAIN VCO TUNING

TP16

TX VCO TUNING

TP18

WDOG

TP51

*DM_CS

TP52

SVREG2

TP71

*ROM1CS

TP72

*RAM1CS

TP73

*RAM2CS

TP74

*BIC_CS

TP75

*ROM2CS

TP76

NCO

TP77

SIN1

TP78

S_NO

TP79

SOUT0

EUROPE MIDDLE EAST & AFRICA

CUSTOMER SERVICES

28:08.98

LEVEL 3 COLOUR SIGNAL FLOW

Rev. 1.2

Dual Band_Zap

Ralf Lorenzen, Michael Hansen, Colin Jack, Billy Jenkins Page1

P

ag

e

1

D

u

a

l

B

a

n

d

_

Z

A

P

_

P

1

4

7

4

5

A

A

B

B

C

C

31

46RXI
48

D

E

D

E

23 22

49

F

F

21

19

G

G

H

H

I

I

9
10

J

J

45

26TX_Q

29 TX_I

K

L

K

L

61 63

4

M

M

4

7

8

14

O

N

8

10

15

1

9

16

2
3

4

O

1

2

7

8

14

2

1

8

P

P

Q

Q

43

10

23

R

R

S

S

26

1

T

T

U

U

41

6

U340

PAC

U370

TIC

U704

EPROM

U702

SRAM

U701

CALL PROCESSOR

U500
SMOC

U220

GIF_SYN

U301

IPA

U703

BIC

U705

EEPROM

J900

SIM_CONNECTOR

U900

GCAP

V

O

IC

E

A

N

N

O

T

A

T

IO

N

U

9

8

0

-

+

1

4

5

8

1

4

5

8

1

14

15

28

1

4

5

8

1

14

15

28

RX SIGNAL PATH

TX SIGNAL PATH

MAIN VCO SIGNAL PATH

TUNING VOLTAGES

13 MHz REFERENCE CLOCK

TP x

TESTPOINTS FROM FULL

Amplified RX Signal

Amplified RX Signal

RX IF 215MHz

RX I Signal

RX Q Signal

Analog RX Signal

Amplified Analog RX Signal

Analog TX Mic Signal

Analog TX Mic Signal

Amplified Analog TX Mic Signal

TX Q Signal

TX I Signal

TX IF Frequency DCS/GSM 120/170MHz

TX VCO Signal

TX VCO Feedback Signal

TX Exciter via Shift Level

TX Exciter Signal

Main VCO Tuning Voltage

Main VCO Feedback Line

DCS Main VCO Signal

GSM Main VCO Signal

AFC Tuning Voltage

13_DCLK_B

J600

10 PIN EXT.CONN.

1

GND

2

SW_RF

3

GND

4

BATT_FDBAK

5

MAN_TEST

6

RS232_TX

7

RS232_RX

8

AUDIO_IN

9

AUDIO_OUT

10

GND

11

UPLINK

12

DOWNLINK

13

DSC_EN_B

14

EXT_B+

15

GND

A

C

D

E

F

B

G

H

I

J

K

J900

SIM INTERFACE

1

GND

2

SIM_5V

3

SIM_VPP

4

*SIM_RST

5

SIM_I_0

6

SIM_CLK_B

Y702

U703

BIC

U701

CPU

U500

SMOC

59

17

CLK_13IN

37

13_DCLK_B

U220

GIF_SYN

M7

40

TP15

L

N

O

P

Q

M

R

S

T

U

TP11

1

7

8

14

TP3

TP7

TP8

TP18

TP51

TP5

TP6

TP1

TP4

TP2

TP75

TP73

TP71

TP74

TP72

TP13

1

4

5

8

TP14

TP12

TP78 TP77 TP52 TP76

TP79

SH1

SH2

SH3

SH14

SH12

SH4

SH8

SH7

SH6

SH5

SH9

SH11

SH13

1

15

TP16

J500

1

DP_EN

17

NC

2

KEY7

18

B+

3

KEY3

19

GND

4

KEY4

20

D3

5

KEY2

21

KEY6

6

A0

22

D4

7

NC

23

*DP_ON_OFF

8

R_W

24

D5

9

KEY8

25

GND

10

D0

26

D6

11

*RESET

27

KEY5

12

SIZ1

28

D7

13

PWR_SW

29

GND

14

D1

30

BL_CNTL

15

GND

31

L275

16

D2

32

-10V

1

N

R

X

_

I

R

X

_

Q

RXQ

T

X

Q

T

X

I

*ROM2CS

*ROM1CS

*BIC_CS

*RAM1CS

*RAM2CS

WDOG

*RESET

L275

*DM_CS

V_SWITCH

SW_B+

B+

L_BATT

B+

RX275

RX Local Osc Tun. Volt.

TX Local Osc Tun. Volt.

RX275

MDM_ANA_VCC

EXT_B+

R475

V_SWITCH

SIM_5V

DOWNLINK

L500

R275

L275

Main VCO Tun. Volt.

SF_OUT

SW_VCC

RX275

V_SWITCH

TX VCO Tuning Voltage

a

b

c

d

e

h

i

j

k

6

2

LOGIC_GSM_*DCS

*GSM_DCS

GSM_*DCS

LOGIC_*GSM_DCS

g

f

SCHEMATICS

x

TESTPOINTS FROM
BLOCK DIAGRAM

LOUDSPEAKER

A

L

E

R

T

38

V

V

57 59

17

37

W

W

40

M7

V

W