BD U9 L3 C A3 V1 0

background image

U9

3

3

2

2

1

1

LNA

LNA

LNA

TX_HB

DCS/PCS OUT

GSM850/

B+

15

11,14....

26

25

GSM900 OUT

S

er

ia

l

In

te

rf

ac

e

D1

E3

G3

1

PA + Antenna Switch

6

13 8

E1

D2

F1

LEG_SPI_READY

RXTXEN

RXTXDATA

V

R

A

M

P

Y101

26MHz

2

1

1800 MHz

1900 MHZ

850 MHz

900 MHz

(P

A

Po

w

er

C

on

tro

l)

J1

Mechanical

Antenna Switch

Internal

Antenna

M1

R

E

S

E

T

B

U

S

_

E

U

R

O

T

X

_

A

N

T

_

S

W

_

E

N

T

X

_S

T

A

R

T

F3

(T

ra

ns

m

itt

E

na

bl

e)

CTRLCLK

CTRLDATA

CTRLEN

B3

PA Control

B9

C2A2

E2

GPIO

ADC

Voltage

Reg.

VRF2

VRFCP

VRFDIG

B4..

J5

H2..

(VCC’s from Atlas)

W28

SIM

Interface

External

Interface

Memory

SPI

Power

SCMA11

U800

C4

E3

A15

A13

C6
C5
C7

UART / USB

Interface

Keypad
Interface

VRFCP

VMMC1

VRFDIG

H18

(from Atlas )

VIOHI

EGSM: CH 37 -- 942,4Mhz

DCS: CH 700 -- 1842,8MHz

PCS: CH 661 -- 1960MHz

RX MID CHANNELS

GSM: CH 62 -- 947,4 MHz

850: CH190 -- 881,6

U700

ADDRESS BUS

DATA BUS

DDR_CLK

A0-23

D0-15

64

M

B

S

D

R

A

M

VDIG_1.8V

F4

12

8M

B

N

A

N

D

R

O

M

FLASH

A20

A

S

A

P

_

T

X

A

S

A

P

_

R

X

A

S

A

P

_

F

S

A

S

A

P

_C

L

K

AB7

AH5

AG6

AB8

(fr

am

es

yn

c)

(c

lo

ck

)

BB_SYS_CLK

AH10

L26

H27

J26

J27

B

B

_

S

P

I_

C

L

K

B

B

_

S

P

I_

M

O

S

I

B

B

_

S

P

I_

M

I

S

O

P

M

_S

P

I_

C

S

SCMA11/Atlas
Communication

AG26

AF24

AD27

AE26

B

B

_S

T

A

N

D

B

Y

AH9

R

E

S

E

T

B

AF10

(13 MHz)

W

D

O

G

_

A

P

B

A

T

T

_

D

A

T

G27

O

ne

W

ire

da

ta

fro

m

B

at

ter

y

U

S

B

_

V

P

I

N

U

S

B

_

V

M

IN

U

S

B

_

V

P

O

U

T

U

S

B

_

V

M

O

U

T

U

S

B

_

X

R

X

D

U

S

B

_

T

X

E

N

_

B

F27

J22

KPP_ROW(3,4)

KPP_COL(2,4,5)

Timer

GPIO

Interface

1st

Port Interface

Serial Audio

MQSPI

One

Bus

Wire

2nd

C7

9

L

B

_H

B

C3

T

X

_

E

N

234

Power and
Antenna
Control

16

A1

3

K4

K5

LNA

TX_LB

L8

L10

VSDRAM

E4...

(from

Atlas

)

(to

A

tla

s)

VCORE

E2

A11..

H1

V5..

(Clock )

(Reset )

(Data In /OUT)

(T

ra

ns

m

itt

E

na

bl

e)

(Clock )

(Chip select)

(Data In /OUT)

10

(fr

om

A

tla

s)

ANT_DETB

(indicates mechanical Antenna connection to U800)

17

IP

C

_B

C

M

B2

VRF2

18,31

FL102

FL101

2

2

4

4

FL100

Quard Saw Filter

4

3

Low Band

850MHz

Low Band

900MHz

High Band

1800MHz

High Band

1900MHz

6

1

and Matching

14
15

12
13

8
9

10

11

K12
L12

G12
H12

A12
B12

D12

E12

DC

Correct

LPF

÷

4

90°

÷

2

90°

÷

2

÷

2

LPF

LPF

Transmit
Modulator

TX CP

RX CP

Phase Modulation

Amplitude Modulation

TX VCO

RX VCO

VRF1

J8..

Digital Radio
Receiver

S

yn

th

es

iz

er

R

X

/

T

X

C

lo

c

k

R

X

/

T

X

In

/

O

u

t

-P

u

tc

on

tr

ol

er

SYSCLK

J1

BT_CLK

J3

V

D

E

T

E

C

T

A4

VDIG_1.8V

M18

^

Servive, Engineering & Optimization

2007.08.10

LEVEL 3 AL Block Diagram

Rev. 1.0

U9

Page 1of 2

TRANSAAM

U100 -

Revision Overview
Rev. 1.0: Initial Block Diagram

1. IPC: Input Power Control mode - for EDGE mode

2.BCM: Bias Control mode - for GMSK mode

(PA gain is fixed and PA input power varies)

(PA gain varies according to power step and fixed input PA power)

PA Power Control selection via VRAMP, TX_HB and TX_LB

GSM / EDGE Tranceiver IC

RAPTOR

U50 -

BT_CLK_EN

DDR DATA

D0-15

DDR_CAS_B
DDR_RAS_B
DDR_SDWE_B

DDR_SDCKE
DQM0
DQM1
DDR_SDBA0
DDR_SDBA1
NAND_CS_B
NAND_RE_B
NAND_WE_B
NAND_WP_B
NAND_ALE
NAND_CLE
NAND_R_B
SDCLK_B

E6
F6
D6

DDR_CS3B

D5
D7
K6
K7
E5
F5
G3
F3
M3
N3
L3
K3
E3
C6

U2
V8
R1

M2
M3

U3

W7

V3

W8

V2
F7
C3
G8
B3
C2
F3
C8
T1
H2

MA10

G5

VMMC_EN
BAT_DETB

SIM_RST

SIM_CLK

SIM_IO

AG13
AA12
B17
B16
C16

(from Atlas )

(to Atlas )

EFUSE_PGM

(from

Atlas

)

B5

B14

BT_RTS_B
BT_CTS_B
BT_RX_AP_TX
BT_TX_AP_RX
BT_RESET_B
BT_WAKE_B
BT_HOST_WAKE_B

AG3
AD9

AF8
AF7

F26

AD12

E26

(from/to Bluetooth module U300)

Serial Audio

Port Interface

M

M

S

A

P

_T

X

M

M

S

A

P

_R

X

M

M

S

A

P

_F

S

M

M

S

A

P

_

C

L

K

AF9

AH6

AG7

AB9

(f

ra

m

es

yn

c)

(c

lo

ck

)

U

S

B

_

X

C

V

R

_

E

N

AB15

32K_CLK

AG8

AF27

W

D

O

G

_

B

P

(2

w

ire

Se

ria

l

EL_EN2
LOWBAT_B
POWER_RDY

FLIP_DET

AG17
AG20

AF13

B19

AH24

I

2C

_

C

L

K

AD28

I

2C

_

D

A

T

I2C
BUS

SD1_CMD
SD1_DATA 0-3

SD1_CLK

L27
P22

M27..

SD Memory
Interface

AD_TRIG

F14

IPU_LD(15:0)
IPU_D1CS_LD16
IPU_D0_VSYNC_LD17
IPU_D3_HSYNC
IPU_D3_VSYNC
IPU_D3_DRDY
IPU_D3_CLK
SER_EN
GPIO_DISP_SD

N28..

AB26
AC28
AC23
AC26
AA27
AB27

W22
W26

(from/to Serializer U650)

(from/toTransFlash)

P

M

_

IN

T

A19

GPIO_DISP_RST_B

AG18

IPU_SD_D1_CS

C19

(to U650/Serializer)

IPU_SD_MISO
IPU_SD_MOSI
IPU_SD_CLK

Y28
V23

AA22

CSI_D(7:0)
CSI_MCLK
CSI_VSYNC
CSI_HSYNC
CSI_PIXCLK
GPIO_CAM_RST_B
GPIO_CAM_PD

AF19..

AF25

AH23
AD26

AF23

AC19
AG21

AB17..

AB16..

Keyboard Matrix
0-9,*,#,5-Way Navigation

KPP_ROW(4:0)

KPP_COL(5:0)

Power

Interface

Interface

Interface

Clock

Digital

Digital

G1

SYSCLKEN

Interface

BB Interface

RF Control
Interface

SC140

AMR1

Memory

Memory

16KB
16KB
128KB

16KB
32KB

156MHz

208MHz

turbo

399MHz

532MHz

turbo

133MHz

Camera

Bluetooth

IPU

(Display)

VIOHI

VDIG_1.8V

U902

Hall Sens.

DQS0
DQS1

P1
R7

(to U900)

(to U901)

(from/to U900)

(from/to U900)

(from/to U900
USB Com.)

B

us

,U

50

0,

Sl

id

er

)

(from Atlas)

(to Atlas)

(1.3V, 399/156MHz

1.55V, 532/208MHz)

(1,775V )

(2,8V )
(2,8V )

(3,2V )

M21

AF5

MMC_CMD
MMC_DATA0

M26

N22

MMC_CLK

J28

(from/to SIM)

CLI_ID

AG11

(from/to J650 /Flip)

IPU_2D_CS_B

AA26

GPIO_CLI_SER_RS

Y27

(from/to J650 /Flip)

POWER_RDY

AE27

(to U900)

(DSP)

(AMR)

VVIB_EN

B18

(to U900)

VFUSE_SEL

AH13

(to U940)

TOUCH_INTB

AC15

(from J650)

AF11

L

V

S

(A

M

R)

L6
L7

FL770

Side Keys

FL771

background image

U9

BB_SYS_CLK

L3

TIMER

WATCHDOG_B

F17

CNTL.

PRI SPI

LOGIC

Logic

V

3

,

J4

..

..

..

..

N

6

P

7

N

8

N

5

M

7

Interface

USB

Y900

V14

C16

V_COIN_CELL

V16

B

+

EAR_SPP
EAR_SPM

V9
V10

V2

R2

V5
V4

O

N

_O

F

F

_

E

N

D

_B

E

1

6

B4

C2

D2

ATLAS UL

ON

LOGIC

BATT_DAT

M14

BATT_TEMP_SENSE

BATT+_RAW

D15

GND

CHRG_CTRL_2

C18

USB_PWR

S

G

D

CHARGE

Charger

BATT CONN.

CNTL.

LED

G15

CODEC

16 BIT

STEREO

(tx) (rx)

LSPP
LSPM

(to SCMA11 and U300)

P

5

RESETB

USB_ID

F7

Q903

G

S

B+

A12

BATTFET_CTRL

Battery to BPLUS

U

S

B

_

V

P

IN

USB/RS232

(communication)

B

3

B

5

C

5

C

6

C

4

C

3

MC1RIN

MC1RB

Det.

Stereo

H

18

S

w

itc

he

r

2

R

18

V

D

IG

_1

.8

V

G

18

K

2

G

2

B

6

V

IO

L

O

V

M

M

C

1

_E

N

F

16

USB_PWR

CONTR.

AD

A18..

V

IO

H

I

(B

ia

s)

(One Wire Bus

to SCMA11)

BPFET

VBUS to BP

Switch

(Main Source

for Atlas)

(from Mini USB Connector)

Main Charge Path

B+ support without Ext Charger
B+ support with Ext Charger

Color definition only for this section !

D900

Bluetooth

U301

C7

BT_WAKE_B

C8

BT_HOST_WAKE_B

F7

BT_RX_AP_TX

E4

BT_CTS_B
BT_RTS_B

E7

BT_TX_AP_RX

E5
E8

BT_RESET_B

E3

(from/ to SCMA11

Serial Audio for Ringtone

and Voice Audio)

VBTRF

F1,F5..

VIOLO

A3,8...

B

T

_

A

N

T

P301

F6

V

V

IB

SCMA11 Atlas

USB/ RS232

Communication

(Battery Sense)

(Sense)

CONV.

A/D

32K_CLK

(from Atlas)

3

(from Atlas)

(

1,

3V

)

(from/ to U301 BT,

Neptune - BT - Neptune

Communication and Wakeup)

MK900

ADTRIG

N15

(from SCMA11, Tx Mode indication for Atlas)

V

B

O

O

S

T

2

3

USB_PWR

1

4

5

(to Charging Circuit)

G1-G4

(Shield)

32K_CLK

R14

USB_DM

USB_DP

VBUS 5V
Pass FET

VBOOST

USB_PWR

D3

(PPD device support)

(to J650)

to

V

ib

ra

to

r

V

IB

R

E

G

E

2

M

ot

or

A

u

d

io

IO

H

M

M

C

R

E

G

.

A

U

D

IO

R

E

G

.

C

P

R

ef

.

D

ig

.R

F

R

E

G

.

R

F

1

D

ri

ve

r

R

F

2

4

Microphone

M

6

M

9

L

5

13 Bit

Handset

Amplifier

(to J600)

V

R

F

1_

D

R

V

(M

ai

n

So

ur

ce

-f

ro

m

Q

90

2)

K

8

BATTDETB

K13

CHRG_PWR

S

G

D

Q902

Q900

G

S

R907

R902

D

Switch

B15

CHRGISENSEP

B17

(Current Control)

Q901

Bluetooth

MICROUSB

Charger and Power-

source Control

(to SCMA11, U100)

(toSCMA11)

(from Atlas)

(from SCMA11 / 13MHz)

ADOUT

(Accessory Detection signal)

(from Acesory Connector)

(EXT Power)

(EXT Power)

Det.

Headset

SAP

Supply

Amplifier

Alert

Amplifier

Headset

Amplifier

EMU

NC

NC

Speaker

NC

2

1

B

A

T

T

+

_

R

A

W

J903

3

2

4

1

VR991/VR992

B+

Se

ns

e

BATTISNS

C14

(Charger+ Sense)

TP_LSPP

A14

SOL

D13

(toJ600)

BB_STANDBY

H14

V

13

C

a

m

IO

L

VIB Motor

BT_CLK_EN

D7

(to U250)

A7
B6

C5

H2

E2

BT_CLK

(from U250)

Servive, Engineering & Optimization

2007.08.10

LEVEL 3 AL Block Diagram

Rev. 1.0

U9

Page 2of 2

(f

ro

m

J6

00

)

EL_EN2

EL_LAMP_V+

EL_LAMP_V

VBOOST

8

3

10

U901

EL Driver

(enable from SCMA11)

USB_DM
USB_DP

EMU_ID

ESD

VR952

2

3

1

4

A

S

A

P

_

T

X

A

S

A

P

_

R

X

A

S

A

P

_

F

S

A

S

A

P

_C

L

K

M

M

S

A

P

_

T

X

M

M

S

A

P

_

R

X

M

M

S

A

P

_

F

S

M

M

S

A

P

_

C

L

K

(from/ to SCMA11

Serial Audio for High

Quality Stereo)

M

8

M

5

M

2

M

3

ASAP_TX
ASAP_RX
ASAP_FS
ASAP_CLK

U

S

B

_

V

M

IN

U

S

B

_

V

P

O

U

T

U

S

B

_

V

M

O

U

T

U

S

B

_

X

R

X

D

U

S

B

_

T

X

E

N

_B

U

S

B

_

X

C

V

R

_

E

N

B

2

B

B

_

S

P

I_

C

L

K

B

B

_

S

P

I_

M

O

S

I

B

B

_

S

P

I_

M

IS

O

P

M

_

S

P

I_

C

S

SCMA11/Atlas
Communication

P

M

_

IN

T

MIC

VR993

(Bias)

E5

B+

B13

(Sense)

WDOG_AP

WDOG_BP

(from SCMA11)

(from SCMA11)

U17

POWER_RDY

(from SCMA11)

N14

LOBAT_B

(to SCMA11)

Q

9

06

V

R

F

1

(2

,7

75

V

)

B

+

V

R

F

2_

D

R

V

J6

Q

9

05

V

R

F

2

(2

,7

75

V

)

V

IO

H

I

Sw

itc

he

r1

K

1

7

V

R

F

C

P

V

R

F

D

IG

V

T

F

L

A

S

H

V

A

U

D

IO

U

10

R

E

G

.

R

E

G

.

D

ri

ve

r

R

E

G

.

R

E

G

.

SER_DATAM

SER_DATAP

SER_CLKM

SER_CLKP

SOL

EAR_SPP

EAR_SPM

VBOOST
VIOHI
VRFDIG
USB_PWR

45
47
41
39

24

48
46

22

6

3,5

28

IPU_LD(15:0)

IPU_D1CS_LD16

IPU_D0_VSYNC_LD17

IPU_D3_HSYNC
IPU_D3_VSYNC

IPU_D3_DRDY

IPU_D3_CLK

SER_EN

(from/to Serializer SCMA11)

C6..
F5
G6
C4
C3
B3
B4

G3

F1

G1
E1
D1

VRFDIG

C2..

U650

J650

Serializer

Flip Con.

GPIO_CAM_RST_B
GPIO_CAM_PD

MMC_DATA0

MMC_CMD

MMC_CLK

SIM_RST

SIM_IO

VMMC1

8
7
3

2

4
5

M610

SIM Con.

U900

V

C

O

R

E

(1

.3V

,3

99

/1

56

M

H

z

1.

55

V,

53

2/

20

8M

H

z)

(1

,7

75

V

)

(2

,8V

)

(2

,8

V

)

(to SCMA11 / 3,2V )

VFUSE_SEL

U940

EFUSE_PGM

VBOOST

(from/to SMA11)

(from Atlas)

(from Atlas)

(from Atlas)

(from Atlas)

(from Atlas)

(2

,8

V

)

(2

,8

V

)

(f

ro

m

SC

M

A1

1)

(1

,8

V

)

GPIO_DISP_SD

A3

SIM_CLK

6

FL610

1
2

3

4

5

6

12
11

10

9

8

7

GPIO_DISP_RST_B

G2

VDIG_1.8V

36

B+

26

CLI_ID
CSI_MCLK
CSI_VSYNC
CSI_HSYNC
CSI_PIXCLK

I2C_DAT

I2C_CLK

CSI_D<7..0>

TOUCH_INTB

IPU_D2_CS_B

GPIO_CLI_SER_RS

40

27..

42

8
10

IPU_SD_CLK

IPU_SD_MOSI
IPU_SD_MISO

35
33
31

14
12
18
11

9
7

29

IPU_SD_D1_CS

30

38
32

VCAM

16

H1

7

5

3

FL301

FL902

VR961

J902

TP_LSPM

U600

G8

P14

L

T

_

S

N

S

_

E

N

L

T

_

S

N

S

_

A

D

C

GPIO

Light Sensor

VFUSE_SENSE

(from SCMA11)

(to Atlas)

E-Fuse circuit

V

F

U

SE

_S

E

L

E

1

6

(t

o

U

94

0)

CHRGISENSEN

L

V

S

(f

ro

m

SC

M

A

11

/D

yn

am

ic

V

ol

ta

ge

sc

al

in

g)

J1

5

D

V

S

1A

VFUSE_SENSE

V18

U903

Sw

itc

he

r3

V

M

M

C

_

D

R

V

L

7

Q

9

07

V

M

M

C

1

(2

,7

75

V

)

B

+

V

V

IB

_

E

N

_E

N

E

1

9

(f

ro

m

SC

M

A

11

)

R

e

g.

S

IM

R

eg

.

V

V

A

M

V

1

1

(2

,7

5V

)

V

B

T

R

F

F

3

(2

,8

5V

)

SD1_DATA(0)
SD1_DATA(1)
SD1_DATA(2)
SD1_DATA(3)

SD1_CMD

SD1_CLK

VTFLASH

7

J620

T-Flash Con.

(from/to SMA11)

(from Atlas)

FL620

8
1
2
3
5

4

6

12
11
10
9
8
7

1
2
3
4
5
6

Sim

Serializer / Flip Con.

T-Flash

EL Backlight Driver


Document Outline


Wyszukiwarka

Podobne podstrony:
BD V600 L3 C A3 V1[1] 1
BD C150 L3 C A3 V1[1] 2
BD TripletsR L3 C A3 V1[1] 1
BD Z3 L3 C A3 V1 1
BD V3 L3 C A3 V1[1] 2
BD C200 L3 C A3 v1[1] 0
BD F3 L3 C A3 v1
BD K1 L3 C A3 V1 3
BD BlDi V235 L3 C A3 V1[1] 1
Block Diagram W510 L3 C A3 V1 0 Block Diagrams
Block Diagram V3 06 L3 C A3 v1 0
BD W206 W213 A3 C L3 V1
C380 PCB P4c L3 A3 BW V1 0
BL C380 P4c L3 A3 BW V1[1] 0
BL C650 P03 L3 A3 BW V1(1)
BD BlDi E365 A3 C L3 1[1] 2 030611100711
SCH C650 P03 L3 A2 C V1[1] 1

więcej podobnych podstron