BD V3 L3 C A3 V1[1] 2

background image

GSM SERVICE SUPPORT GROUP

2004.08.31

LEVEL 3 AL Block Diagram

Rev. 1.2

V3

Michael Hansen, Alexander Buehler

Page 1of 3

Internal
Antenna

J40

AOC_DRIVE

Antenna

Switch

FL100

Quard Saw Filter

4

3

25

RX_CP

TX_CP

D5

47

Synth F/B

SYNTH_FD_P

SYNTH_FB_N

TXIN_HB

TXIN_LB

38

39

41

42

44

CM IN

26

C9

BB I

BB IX

BB Q

BB QX

A8

B8

A9

B9

27

28

29

30

B6

LP Filter

Tracking

Control

Tracking Osc.

RF_REG

RX

Charge

TX
CP

C4

D9

7, 8, 10, 11, 15, 18, 21, 37, 43, 48

NEP_IO_REG

RF_CS
RF_DATA
RF_CLK

3

U8, V7, W9

GMSK Mod &
Mod DAC

(TX)

PA Control

(PAC)

Y805

3

1

A4

Power Detector

PACII IC

VCC

2

6

4

17

LOWB_HIGH

T6

TX_EN

U6

8,16

Switch
Control
Circuit

W7
N9

RF_5V_REG

EXC_EN

EUROB_US

PA_REF

PA_DET

D12
B10

PA_REF

PA_DET

LOWB_HIGH

TX_EN

EXC_EN

EUROB_US

Digital Channal

Filters

26 MHz

Timer

19
18

14
15

13

Matching and

Combiner Network

LP

LP

Low Band

High Band

3

3

DMA

1Mbit RAM

PMA

AAF

2

2

1

1

Pump

Super Filter

Generator

2,45V

5

4

D4

A6

720 - 915 MHz

1710 - 1785 MHz

880 - 915 MHz

Synthesizer

Prescaler

Phase
Detect

Dual ADC

DSP

DSP

UltraLite
104 MHz

DSP Peripherals
accelerator, encryption
Timer, Interupts

Shared Memory

MCU

52 MHz

ARM7

MCU

26 MHz
Oscillator

B4

Memory

Memory

2

1

6

SIM

Interface

SIM DIO

SIM RST

SIM CLK

J4
L1

K3

SIM PD

3,5

VSIM

4

GND

R1

MQSPI

Display

Connector

JSIM

SIM

GPIO

M1

1.8 or 3V
SIM Card

VSIM_EN

External

Interface

Memory

U13

(decoupling analog GND)

HP-Filter

D8

TX

Loop

Filter

Clock Generator

L1 Timer

NEPTUNE LTS

ALGAE

U150

U800

XTAL

EXTAL

Interface

UART / USB

Interface

TRK_OSC_OUT

B5

35

( 26MHz for Digital IF Filter syncronisation)

EXC EN

EXC_EN

(Post Mixer Amplifier)

BB

Out

BB

Out

IF Amp.

2 Pole Filter

L & H

Band

V3

L

o

w Ba

nd 85

0 MH

z

EGSM: CH 37 -- 942,4Mhz

DCS: CH 700 -- 1842,8MHz

PCS: CH 661 -- 1960MHz

RX MID CHANNELS

GSM: CH 62 -- 947,4 MHz

850: CH190 -- 881,6

EGSM: 880 - 915MHz
DCS: 1710 - 1785MHz

TX VCO FRQ. RANGE

850: 824 - 850Mhz

PCS: 1850 - 1910MHz

EGSM: CH 37 - 897,4Mhz

DCS: CH 700 - 1747,8MHz

TX VCO MID CHANNELS

GSM: CH 62 - 902,4MHz

PCS: CH 661 - 1880 MHz

850: CH 190 - 836,6

GSM : 890 - 915 MHz

Direct

Memory
Access

Controller

Analog / Digital

Converter

SPI

32
33
34

31

36

2

4

TX VCO

3.4 - 3.7 GHz

100kHz

100kHz

N

and LO

Digital

If Mixer

BaseBand

Port Interface

Serial Audio

BB S

A

P TX

BB

S

A

P

R

X

BB

S

A

P

FS

BB

S

A

P C

L

K

B13

B12

A12

D13

(frames

ync)

(cl

o

ck

)

(tx)

(rx)

TX_MOD

A10

CL

K 13

M

H

z

W13

C15

C16

D15

A16

Keypad
Interface

BB

_S

PI_C

LK

BB

_SP

I_M

OS

I

BB

_SP

I_M

IS

O

PC

AP_

C

S

Neptune PCap

Communication

MQSPI

T11

V12

V11

W12

ST

A

NDB

Y_

1_5V

G8

U801

ST

AN

DB

Y

Buffer

CL

K 32K

HZ

E3

B14

PC

AP_

INT

RE

S

E

T

B

V13

(13 M

H

z)

(W

atchdog)

WD

OG

Mechanical

Antenna Switch

A1

(VCC)

RF

_

R

E

G

(V

CC)

V6

RX_EN

OW

B

W11

One W

ire d

at

a from

B

at

tery

T7

SWBP_EN

RX

Loop

Filter

POWER

SPI

VBUCK

IO_REG

(VCC + 2.775V)

(VCC + 1,875V)

AGC

RF Det.

AGC

RF Det.

RX VCO

3.6 - 3.9 GHz

n

LNA

LNA

LNA

LNA

23

27

29

Low Band

850MHz

Low Band

900MHz

High Band

1800MHz

High Band

1900MHz

21

6

1

and Matching

Lo

w Ban

d

900

M

H

z

H

igh

B

and 18

00 M

H

z

14
15

12
13

8
9

10
11

Hi

gh Ba

nd 190

0 MH

z

19

20

22

23

16

17

13

14

EAGLE

U50

CMOS
PA Bias
Circuit

33

32

10

34

11

12

BP

BP

(to Algae)

(VCC)

U700

VBUCK

EB1_B

EB0_B

OEB

R WB

CS1B

ADDRESS BUS

DATA BUS

K16

J19

G17

T16

BURSTCLK

LBAB

CS0B

ECBB

V17

T19
L16

W18

N18

A1-24

D0-15

32 MB Flash

RESET OUT

F3
C2

D6

E5

F5,D5
J2,H1,H8

G7

C6

E4,B6...

F4

(from PCAP )

USB

_

V

P

IN

USB

_

X

RXD

_R

T

S

USB

_

V

P

OU

T_

TX

D

USB

_

V

M

IN

_R

XD

U

S

B_

TX

EN

B

USB

_

S

E

0

B16

A17

RF REG

K2

VSIM

A11

M17

Neptune PCap

USB/ RS232

Communication

(f

ro

m

PC

ap

)

RE

SE

T OU

T

W5

(t

o U70

0

)

One

Bus

Wire

RX EN

9

(from/ to Neptune

Serial Audio for Ringtone

and Voice Audio)

USB_EN

T13

RX

D2

T

XD2

RT

S

2

CT

S2

UART2

N17

N13

V16

D16

Universal

Asynchron.

Rx /Tx

(from/ to U301 BT,

Neptune - BT - Neptune

Communication and Wakeup)

BT

BL

UE

_

W

A

K

E

B

BL

UE

_HO

ST

_W

AK

EB

D19

B15

KB

R0

-7

KB

C0

-1

E3....

G3....

C13

MIDRATE_CTRL

P2

LCD_RS

P1

LCD_SDATA

M4

LCD_CLK

N3

LCD_CS

L3...

LCD DATA (0 - 5)

HS INT

C14

D4

C18

LT_SNS_CTL

4MB Ram

(from Neptune)

FLASH

(from U911)

B5

VBUCK

BB

_SP

I_C

S6

D18

Neptune Camera

T10

GA

_

IN

T

R80

Match

R81

Match

(t

o U

900

)

U804

R

E

S

ET_

OU

T_2

_7V

Buffer

(t

o K

eyb

oa

rd

C

o

n

n

ec

to

r0)

K1

U12

ANT_DET_B

ANT_DET_B

(to U800)

W8

PPD_DETB

(to Q957)

U10

SNP_INT_CTL

(from U910)

V14

SNP_INTB

(to U1400)

G11

MUX1

(toU1400)

G10

MUX2

(toD7614)

A14

FACT_DET

(to U906)

VCC_OUT

(VCC + 1,8V)

E2

(to Q956)

B17

CHRG_DET_PU

E1

EL_EN

D14

ADC_DATA

(from Frontend)

( Light Sensor Control)

(Open / Close Detect)

(to Switch BP Circuit)

( to Charger)

( to U150)

(to Pcap)

(from Light Sensor )

( to EL Backlight Circuit)

(from / to EMU Bus)

(from / to RF Circuit)

(LCD Control )

(from / to Keyboard Connector)

(to PCap / Charger)

(from

P

C

ap)

Revision Overview
Rev. 1.0: Initial Block Diagram
Rev.1.1: updated page 3 Table

background image

GSM SERVICE SUPPORT GROUP

2004.08.31

LEVEL 3 AL Block Diagram

Rev. 1.1

V3

Michael Hansen, Alexander Buehler

Page 2of 3

(clock)

CLK 13 MHZ

C2

CLK_32KHZ

T7

TIMER

WDOG

H12

CNTL.

PRI SPI

LOGIC

Logic

G

1

6

,

U

3

...

...

...

.

S

w

itcher 1

B

+

Sens

e

B

B

-S

PI_

C

L

K

BB

_

S

P

I_M

OS

I

BB

_S

P

I_

M

IS

O

P

CAP

C

S

CODEC

PHONE

K9

R7

P8

M8

H8

H7

F6

F5

INTERF.

USB

Y900

U8

T11

RTC_BATT

U10

BP

to V

ibr

a

HAND SPKRM

HAND SPKRP

J4

K2

H2

J2

F1

H1

PW

R SW

K3

J1

2

A5

B4

U900

PCAP3

MEMORY

HOLD

BACKl.
CONTR.

ON

LOGIC

THERM

U5

VBUS

ISENSE

BATT+

R17

M13

T15

CHRGC

R15

CHARGE

AUDIO_IN

K7

CNTL.

LED

L12

VI

B

DR

IV

E

B

B

_

S

AP

_FS

BB_

SA

P_C

L

K

B

B

_S

AP_

T

X

BB

_S

AP_

R

X

(tx) (rx)

Neptune PCap

CODEC

16 BIT

STEREO

(tx) (rx)

Communication

ALERT-

ALERT+

STANDBY

M9

(to Neptune and U301 BT)

PC

AP IN

T

L1

0

RESETB

(f

ro

m

Neptune)

CNTL.

SEC SPI

LOGIC

Neptune PCap

Communication

HJACK_SPKR_L

TOUCH

SCREEN

INTERF.

N15

MAIN_FET

VOLT.

OVER

CNTL.

OV GATE

N13

IO

N8

THERMBIAS

US

B_

V

P

IN

U

S

B

_

XR

XD

_R

T

S

US

B_

V

P

O

U

T

_

TX

D

US

B_

V

M

IN

_

R

XD

U

S

B

_

TX

EN

B

US

B_

S

E

0

USB/RS232

(communication)

G7

C6

C5

G8

E5

F7

13 BIT

FAIL DET.

POWER

INT_MICP

MIC_BIAS1

DE

T

.

ST

ERE

O

B

u

ck M

o

de

F10

( 1

,87

5V

)

VB

UCK

S

w

itcher 2

B

u

ck M

o

de

F15

S

w

itcher 3

B

oos

t M

o

d

e

D10

( 5,

6

V

)

VBO

O

S

T

H17

( 2,

77

5V

)

A

T

I_C

A

M

_

IO

U1

AU

D_ RE

G

F17

( 1

,27

5

)

GA

_

V

C

C

H15

K20

N19

G17

( 2

,77

5V

)

RF

_R

EG

V1

V2

V3

V4

V5

V6

V7

Q943

V

H

O

L

D

_

EX

T_

EN

A7

A6

( 1,

57

5V

)

RE

F_

REG

E10

( 5,

0

V

)

RF_

5

V_

RE

G

V8

V9

V10

U13

B7

( 1,

8

/ 3V

)

VS

IM

VS

IM

V

S

IM

_EN

H1

4

AUDIO

AMPL.

CONTR.

SIM_PD

K13

NC

J16
J15

(to Neptune)

AD

USB_PWR

T16

NC
NC
NC
NC

NC

BB_SAP_TX

BB_SAP_RX

BB_SAP_FS

BB_SAP_CLK

(framesync)

NC

NC

Bluetooth

U300

40

38

36

35

BLUE_WAKEB

11

BLUE_HOST_WAKEB

9

4

39

41
37

RESETB

29

(from Neptune/ PCap)

(from/ to Neptune

Serial Audio for Ringtone

and Voice Audio)

IO_REG

10

BTRF_REG

21

ANTENNA

33

Antenna

FL

3

0

1

Y301

15

16

12

( 1,

8V

)

BT

RF

_

R

E

G

NC

NC

E

C

VV

IB

Neptune PCap

NC

NC

NC

NC

NC

NC

NC

NC

Neptune PCap

USB/ RS232

Communication

K17

T10

LCELL_BYP

(Over Volt. Sense)

(Battery Sense)

(External B+ Sense)

W21

MIDRATE2

(from Neptune)

IO

CONV.

A/D

CLK 32KHZ

(from PCap)

(to J_KEYBRD)

(from/ to U1400)

J41

1

J_KEYBRD

RESET_OUT_2_7V
BB_SPI_MISO
BB_SPI_MOSI

BB_SPI_CS6
HS_INT
GA INT
LCD_SDATA

LCD_DATA3

BB_SPI_CLK

LCD_RS

LCD_DATA5
LCD_CS
LCD_DAT2
LCD_CLK
LCD_DATA1
LCD_DATA0
LCD_DATA4

GND
BP
RTC_BATT
ATI_CAM_IO
GND
EL_EN
EL_SUPPLY
GND
GND
HAND_SPKRM
HAND_SPKRP
GND
CLK_32KHZ_2_7V

VBUCK
IO REG
GND

GND

KEYPAD

MATRIX

L1

7

(from PCap 1,3V from Vibrator Regulator)

0-9,*,#,

Up, Down
Left-Right,
Center,
Soft L+R,
Menu, Send,
Volume U-D
Smart, VA

(from/ to U301 BT,

Neptune - BT - Neptune

Communication and Wakeup)

KEYBOARD

CONNECTOR

Internal

MIC

Alert

Speaker

RXD2

TXD2

RTS2

CTS2

V3

(not us

ed)

(from/ to Neptune)

(from Neptune)

VCC_PA

24,26,28

BT Crystal

26 MHz

IO_REG

10

BT_FEED

( 2,

77

5V )

VD

DA

( 2,

77

5V )

IO

_R

EG

NC

M17

( ??

??

? )

EL

_S

U

P

P

L

Y

AU

X4

B10

AU

X4

BP

B

C10

VC

C_

P

A

Q943

2

1

3

V

CC_

OU

T

J_VIB

Vi

b

ra

to

r

TX_EN

P15

C935

NC

BT_STAT

(to Staus LED in Flip)

AD6

R6

(from EMU Bus)

HJACK_SPKR_R

L2

4

DP_RXD_OUT

DM_TXD_OUT

(from/ to U1200)

USB_VBUS

B3

(from Q957 - EMU Interface)

NC

U902

IO_REG

Buffer

(from Keyboard Connector)

50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2

49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1

CLK_32KHZ_2_7V

LT_SNS_CTL
GND
ADC_DATA
BT_STAT

(from PCap - drivesBlueTooth Status LED)

(to Neptune - Lightsensor Status)

PWR_SW
KBC1
KBR0

KBC2

D800

INVERTER

KBR5
KBR4
KBR3
KBR5
KBR7
KBC0
KBR2
KBR1

U1401

HS_INT

IO REG

Power/
Send-End

Main and

CLI Display

EL

Backlight

RTC

Coincell

VGA

Camera

BT

Status LED

Loud-

Speaker

(from/ to PCap)

(from/ to PCap)

(from Neptune)

(from/ to Neptune)

(from PCap)

G1-G4

(GND)

CLK_32KHZ

(to Neptune )

Revision Overview
Rev. 1.0: Initial Block Diagram
Rev.1.1: updated page 3 Table

J_BATT

OW_B

3

2

4

1

GND

BATTP

Q958

R95

8

USB_PWR_IN

S

G

D

BATT CONN.

S

G

D

BP

Battery to B+

Switch

S

G

D

(Overvoltage Protection)

OV GATE

USB_PWR_IN to USB_PWR

USB_PWR

USB_PWR

IO_

R

E

G

(Bi

as

)

(One Wire Bus

to Neptune)

D958

S

S1

G

D

D1

Q952

Q953-1

USB_PWR to BP Switch

SWITCH

(Key Source
for PCap IC)

(to PCap AD Converter

(to PCap AD Converter)

and internal Charger)

Main Charge Path

B+ support without Ext Charger
B+ support with Ext Charger Full -Rate

Color definition only for this section !

D952

CHRG_DET

(from U216)

Only for Full Rate Charger Mode

U912

D2

S2

G2

Q954

Q250

S1

G1

D1

USB_PWR

G2

S2

D2

R9

54

Q951

Charger

MIDRATE_CTL

OV_SENSE

B1

C2

Q953-2

B+ support with Ext Charger Mid - Rate

L

/

H

/

H

L

/

H

/

H

H

/

L

/

L

H

/

L

/

H

L

/

H

/

L

L

/

H

/

L

H

/

H

/

H

L

/

H

/

H

L

/

H

/

H

H

/

H

/

H

L

/

H

/

H

H

/

L

/

H

H

/

L

/

H

L

/

H

/

L

Battery

(from Neptune )

background image

Pin Number

Normal USB

Acc.

Factory Test &
Flash

High Voltage Flash

Mono Accessory

Stereo Accessory

Dumb PPD *3

Dumb Mid-Rate

Charger (500mA)

Dumb Fast Charger

(1,25A)

Battery Powered

Software Regression

Testing

MPx Mid-Rate

Charger (450mA)

MPx Dual-Rate VPA

(450/850mA)

1

VBUS

VBUS

VBUS

Phone PPD Level

Phone PPD Level

Phone PPD Level

5V 5V VBUS

VBUS

5V 5V

2

DM_TXD

DM_TXD

DM_TXD

HJACK_SPKR_L

HJACK_SPKR_L

DM_TXD

Short to DP_RXD

Short to DP_RXD

DM_TXD

DM_TXD

DP_RXD

DP_RXD

3

DP_RXD

DP_RXD

DP_RXD

AUDIO_IN

HJACK_SPKR_R

DP_RXD

Short to DM_TXD

Short to DM_TXD

DP_RXD

DP_RXD

DM_TXD

DM_TXD

4

(ID)

Open (2,8V)

4,75-5,25 *1, 3,0-
3,3V *2

Open (2,8V)

102 K OHm +/- 1%

102 K OHm +/- 1%

102 K OHm +/- 1%

200 KOHm +/- 1%

440 KOHm +/- 1%

440 KOHm +/- 1%

(Powers on the phone)

200 KOHm +/- 1%

100KOHm +/- 1%

10 KOHm +/- 1%

5

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

Shield

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

Signal Name

USB_ID

Open (2,4V)

5V

9V

Open (2,4V)

Open (2,4V)

0V

1,225V

1,68V

1,68V

1,225V

0,82V

0,1V

AD6

2,4V

3,4V

3,5V

2,4V

2,4V

0V

1,225V

1,68V

1,68V

1,225V

0,825V

0,1V

PPD_DETB

High

High

High

High

High

Low

High

High

High

High

Low

Low

SMP_INTB

High

High

High

High

High

Low

High

High

High

High

High

Low

FACT_DET

Low

High

Low

Low

Low

Low

Low

Low

Low

Low

Low

Low

CHRG_DET

Low

High

Low

Low

Low

Low

High

High

Low

Low

High

High

MUX1

Low

Low

Low

High

High

Low

Low

Low

Low

Low

Low

Low

MUX2

Low

Low

Low

Low

High

Low

Low

Low

Low

Low

Low

Low

CHRG_DET_PU

High

Low

Low

Low

Low

Low

Low

Low

Low

Low

Low

Low

USB_EN

Low

Low

Low

Low

Low

Low

Low

Low

Low

Low

Low

Low

USB_PWR

High

High

High

High

High

High

High

High

High

High

High

High

USB_VBUS

5V

5V

5V

Phone PPD Level

Phone PPD Level

Phone PPD Level

5V

5V

5V

5V

5V

5V

SNP_INT_CTL

High

High

High

High

High

High

High

High

High

High

High

High

GSM SERVICE SUPPORT GROUP

2004.08.31

LEVEL 3 AL Block Diagram

Rev. 1.1

V3

Michael Hansen, Alexander Buehler

Page 3of 3

Revision Overview
Rev. 1.0: Initial Block Diagram
Rev.1.1: updated page 3 Table

V3

12

3

MUX1

MUX2

4

8

HJACK_SPKR_R

13

LDP_DM

HJACK_SPKR_L

7

15

AUDIO_IN

U1400

( from / to PCAP)

Filter

J_USB

2

3

VBUS

1

4

5

DP_R

XD

DM_T

XD

U1200

RESET_B

DM_TXD_OUT

DM_RXD_OUT

(to Charging Circuit)

USB_EN

G1-G4

(Shield)

USB Mode
UART Mode
Not used
Mono Headset/ Carkit
Stereo Mode

0
0
0
1
1

0
0
1
0
1

MUX1 MUX2

(from Neptune)

D960

U7607

BP

USB_PWR

VBOOST

U950

EMU_3_3V

In
En

USB_PWR

Mode

EMU_2_8V

U951

In
Out

EMU_3_3V

4

5

2

C3

A1

A3

C1

Regulator

EMU SENSE INTERFACE
(U910, U911, U913,

For details please

U915, U916, Q956, Q957)

see Schematic

USB_ID

AD6

PPD_DET_B
SNP_INTB
FACT_DET
CHRG_DET

DP_RXD

DM_TXD

SNP_INT_CTL

CHRG_DET_PU

(Phone Powered Device Detect - to U800)

(Signal Navigation Protocol Interrupt- to U800)

(Factory Detect- to U800)

(Charge Detect- to U800)

(Analog /Digiatl Converter 6 - to PCap)

(Enable Pull Up Voltage to DP_RXD)

(Enables USB_VBUS to PCap Inerface)

(Data Minus / Transmit Data)

(Data Plus / Receive Data)

(Enables R984 as Test-Resistor on USB_ID, and used to mute SIHF by a pull down on USB_ID line)

Charger

Detect

Power to

PCap
USB Bus

ID Sense

and Test

Detect

and

Interupt

USB_VBUS

( VCC - to PCap)

EMU (Enhanced Mini USB) INTERFACE

Note:
V3 does not support
Stereo Audio
Fast Fash Mode
USB „on the go“

U901

In

Out

1

6

Switch

SWBP_EN

( from Neptune)

3

BP

Switch BP Circuit


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