Internal
Antenna

J100

AOC_DRIVE

Antenna

Switch

FL100

Quard Saw Filter

4

3

25

47

Synth F/B

TX_IN_HB

TX_IN_LB

38

39

41

42

44

CM IN

RF_REG

7, 8, 10, 11, 15, 18, 21, 37, 43, 48

Power Detector

PACII IC

VCC

2

6

4

17

LOWB_HIGH

TX_EN

8,16

Switch
Control
Circuit

EXC_EN

EUROB_US

PA_REF

PA_DET

19
18

14
15

13

Matching and

Combiner Network

LP

LP

Low Band

High Band

3

3

2

2

1

1

Super Filter

Generator

2,45V

5

4

720 - 915 MHz

1710 - 1785 MHz

880 - 915 MHz

TX

Loop

ALGAE

U150

TRK CLK

EXC EN

Lo

w Ba

nd 850

M

H

z

EGSM: 880 - 915MHz
DCS: 1710 - 1785MHz

TX VCO FRQ. RANGE

850: 824 - 850Mhz

PCS: 1850 - 1910MHz

EGSM: CH 37 - 897,4Mhz

DCS: CH 700 - 1747,8MHz

TX VCO MID CHANNELS

GSM: CH 62 - 902,4MHz

PCS: CH 661 - 1880 MHz

850: CH 190 - 836,6

GSM : 890 - 915 MHz

36

2

4

TX VCO

3.4 - 3.7 GHz

A11

(VCC)

RX

Loop

AGC

RF Det.

AGC

RF Det.

RX VCO

3.6 - 3.9 GHz

n

LNA

LNA

LNA

LNA

23

27

29

Low Band

850MHz

Low Band

900MHz

High Band

1800MHz

High Band

1900MHz

21

6

1

and Matching

Low

Band

9

00 M

H

z

H

igh Ba

nd 18

00 MH

z

14
15

12
13

8
9

10
11

Hig

h

Ban

d

190

0

M

H

z

19

20

22

23

16

17

13

14

EAGLE

U50

CMOS
PA Bias
Circuit

33

32

10

34

11

12

PA_B+ PA_B+

RX EN

9

b

GSM SERVICE SUPPORT GROUP

2004.04.02

LEVEL 3 AL Block Diagram

Rev. 1.1

Dual Band C650

Michael Hansen, Alexander Buehler

Page 1of 2

RX_CP

TX_CP

D5

RX
Loop
Filter

SYNTH_FD_P

SYNTH_FB_N

C9

BB_I

BB_IX

BB_Q

BB_QX

A8

B8

A9

B9

B6

Tracking Osc.

RF

_RE

G

RF_REG

RX

Charge

TX
CP

C4

D9

IO_2,65V

RF_CS
RF_DATA
RF_CLK

3

W9, U8, V7

GMSK Mod &
Mod DAC

(TX)

PA Control

(PAC)

Y805

3

1

A4

T6

U6
W7
N9

VM_REG

D12

A10

Digital Channal

Filters

26 MHz

Y900

4

1

B1

A1

32,768 kHz

Timer

C

L

K

_32

K

AD2 Mux

SPI

Control

Logic

DMA

1Mbit RAM

Pump

D4

A6

Synthesizer

Prescaler

Phase
Detect

Dual ADC

DSP

DSP

UltraLite
104 MHz

DSP Peripherals
accelerator, encryption
Timer, Interupts

Shared Memory

MCU

52 MHz

ARM7

MCU

26 MHz
Oscillator

B4

SPI

Memory

Memory

KBC0, KBC1, KBC3

KBR0-KBR4

Keypad

Port

KBR6, KBR7

6

5

4

SIM

Interface

SIM_DIO

J1502

SIM_RST

SIM_CLK

J4

L1

K3

1

SIM_VCC

2

GND

3

NC

MQSPI

Display

M4

L3,L2, ...

LCD_DATA (0-5)

11

1

5-10

Flip

Connector

J800

SIM

SIM_EN

GPIO

F4

D14

M1

C8

SIM_EN

External

Interface

Memory

Reset

V13 U13

(decoupling analog GND)

HP-Filter

D8

TX
Loop
Filter

Clock Generator

Audio

Codec

ADC

_N

AD

C_P

DA

C_N

DA

C_P

Amplifier

Microphone

G9

D3

E4

C3

G3

H4

F4

F5

ALTP

ALTN

J3

Amplifier

Microphone

H5

A2
Alert
Amplifier

F9

E9

HED_MIC

Aux.

HEAD_INT

C4

Mux.

VM_REG

C907

C908

C934

A4

A8

4,7V- 5mA

IO_REG

2,75V- 200mA

(to Syn. Chargep.,

Switch control

)

(to VM, NeptuneI/O, Ser- Flash, Displ.)

DIG_REG_OUT

1,875V- 200mA

(Neptune cores, logic& memory)

RF_REG

2,75V- 200mA

AUD_REG

2,75V- 150mA

(Synthes., SF reg., RF& AL funct.of Algae)

(Aud. analog funct. of Neptune & Seaweed)

1,575V- 100uA

COINCELL

(RTC)

1,85/ 2,85V- 20mA

SIM_VCC

(SIM Card)

M900

Vibrator

MOTOR

1,3V- 200mA

A5 A6

I/O Regulator

A3

V. Multiplier

A8

Digital Reg.

A9

Reference Reg.

RF Regulator

D9

Audio Reg.

B7

SIM Regulator

B9

J7

Vibrator Reg.

G8

B+

D8, E8, F8

AD / DA

R

E

S

ETB

E3

L1 Timer

WDOGB

B2

GPIO

NEPTUNE

SEAWEED

U800

U900

VAG Regulator

1,325 - 100uA

VAG_CODEC

V

A

G_

CO

DEC

D1

ST

ANDBY_T

O

DAI

T
i
m
e
r

PWR_SW

F2

XTAL

EXTAL

LOW_BATT_B

LOW_BATT_B

A2

F1

EXT_PWR_ON

Charger

Interface

CHRG_DETB
CHRG_STATE

D1
E1
G1

CHRG_SW

E6

CHRG_TYP

D6

(TEMP)

PC12

PC12

E2

CHG_DISABLE

Interface

USB

Interface

USB_TXENB
USB_VPIN
USB_VMIN
USB_XRXD
USB_VPOUT
USB_VMOUT
USB_SUSPEND

D15

A17

C16

B16

C15

A16

B17

USB_DET

C13

B5

( 26MHz for RC tuning)

SP

I_C

S

1

U12

C650

G6

V8

G8

AU

D_R

E

G

D7

IO

_

R

E

G

E1

Reset

RESETB

C1

B15

SOFTCON

B+ Sense

EGSM: CH 37 -- 942,4Mhz

DCS: CH 700 -- 1842,8MHz

RX MID CHANNELS

GSM: CH 62 -- 947,4 MHz

Direct

Memory
Access

Controller

Analog / Digital

Converter

N

and LO

Digital

If Mixer

RESETB

12

13,16,20

Keypad
Matrix

C5

BL_SINK

Revision Overview

Rev. 1.0: initial Block Diagram
Rev. 1.1: change two R901 to R902 and R903/ change L404 to
L104

PA_REF

PA_DET

LOWB HIGH

TX_EN

EXC_EN

EURO_US

EXC_EN

(to Algae)

(VCC)

SPI

32
33
34

31

25

27

28

29

30

LP Filter

Tracking

Control

PMA

AAF

(Post Mixer Amplifier)

BB

Out

BB

Out

IF Amp.

2 Pole Filter

L & H

Band

100kHz

100kHz

35

Headset

J931

HED_SPK

A1
Speaker
Amplifier

J8

J9

SPKP

SPKN

Mic

R931

Charge

CHRG_ID

EXT_B+

Connector

Connector

Internal

U902

1
2

U901

SPK.

A3

A1

C3

C1

2
1

J910

TOUT11

U700

DIG_REG

EB1

EB0

OEB

R_WB

CS1B

ADDRESS BUS

DATA BUS

K16

J19

G17

T16

BURSTCLK

LBA

CS0B

ECBB

V17

T19
L16

W18

N18

D0-15

16 MB Flash

RESET OUT

F3
C2

D6

E5

F5,D5
J2,H1

G7

C6

B5,L4...

F4, K8

K1

4MB Ram

(from Neptune)

FLASH

W5

RE

SET

_

O

U

T

VPP

D4

A1-24

A13

SC1A

J2003

Coincell

E3

D2

D3

D4

T11

V11

V12

W12

K2

SIM_VCC

ADC_DATA

E5
F6

ADC_SYNC

A

DC_

DA

T

A

E1

AD

C_

S

Y

N

C

W13

B10

0-9,*,#,Send,
PWR/End,Menu,
Soft Left+Right

PWR/END

PWR_SW

1,3,6

2,4

5,7a,7b

S5

JOYSTICK

Up:

Right:

KBR1 - KBC0

KBC0 - KBR0

Down: KBR0 - KBC1

Left:

KBR1 - KBC1 Center: GND - KBR4

RT900

DS513

DS514

Yelow

Joystick
Backlight

B6

AD2

R6

01

R6

00

IO_REG

Photo T

y

pe

ID

D5

32kHz RTC

Osc.

C3

MQSPI

SPI

_

CL

K

MIS

O

A

MO

SIA

SPI

_

CS

3

SPI_CLK
MISOA
MOSIA

SPI_CS6

D18

(to U6001,U6004

6006 and 6007)

WD

OG

B

G10

PE11

D19

INT5

CKO

P16

A14

PE12

T7

TOUT9

G12

SC0A

U101

3

1

5

A10

C1

12

L1

04

U100

3

1

4

4

EUROB_US

E

URO

B_

US

LOWB_HIGH

(to U100)

LO

WB

_H

IG

H

(OR

G

at

e)

(S

W

it

ch)

(Enable)

Antenna
Switching
Circuit

LSC_CLK_DATA
LCD_SDATA_DATA

P1

LCD_CS

3

LCD_RS

2

IO_REG

4

14,15

GND

LED5

17

LED6

18
19

LED7

N3
P2

(from / to U900)

(from / to U800)

(from / to U920)

(to J1512)

(t

o

U

7

00)

(from U400)

(from U900)

(from U900)

(to U900)

(from D904)

(to U900)

(from U900)

(to U600)

(to U400)

(to U6004)

(to U900,U920)

(from J600)

(to U400)

(to U6005, U6006, U6007)
(from Lightsensor)

(from U6007)

J513

Display Connector

Power

IO_REG

RF_REG

DIG_REG

(VCC)

DIG_REG

(VCC from U900)

U6006

PE11

A1,B2

D2

U6007

D2

A1,B2

RTS

C2

INT5

C1

CTS

C2

RXD

C1

U6001

SPI_CS6

A1

B1

MISOA

C2

(Data)

TXD

(from/ to Neptune)

MOSIA

(Data)

(Clock)

(Enable)

SPI_CLK

B1

(from Neptune)

D2

U400

B+

LED1

LED2

LED_DRV_EN

LED3

LED4

LED5

LED6

LED7
ISET

R4

06

VPOUT

C404

LED

Driver

C1

A7

D6

E5

D4

E3

C5

C3

B4

C7
A3

LED_GRPA_EN

B6

LED_GRPB_EN

E7

SEL_UART

SPI_CS6

U6004

F4
F6

F5
E6

(Enable)

E7

(Request To Send)

(from/ to Neptune)

(Interupt)

J1503

7,8,11,

Camera

Camera

Connector

Driver

PWRON

B1

CLK_IN

A4

21
22

13,23,24

VSYNC

B4

20

CLK_OUT

E1

19

Y0

C2

18

Y2

F3

17

Y4

F1

16

Y6

G2

15

HREF

C1

14

CVDD

12

NC

10

SDA

A5

9

CLK_IN

E2

6

Y1

C3

5

Y3

F2

3

4

Y5

G3

2

Y7

G1

CVDD

1

A1,A3...

IO_VDD

D6

TOUT11

D2

CKO

A6,B3...

JO_VDD

C7

RI_VDD

U6005

B+

C3

A1

C1

(from Neptune)

PE11

Regulator

(Enable)

DS504 DS507

D400

DS505

Q904

Q905

E

B

G

IO_REG

EXT_B+

C

S

D

Sign of live Circuit

SOL

3

1

2

1

2

3

DS7000

Light
Sense

5

4

U7000

IO_2.65V

PE12

3

1

IO_REG

1

2

DS502

Blue Keypad Backlights

NC

NC

Keypad Backlight

Driver

DIAMONDHEAD 3

U920

M4

G

S

D

M5

G

S

D

M3

S

D

G

9-12

B

E

C

Q901

VDETECT

VIN

6,7,15,16

Sense

13

Current

(Charge and Protection)

Safety

Pass Transistor

B

E

C

Q903

Fuse

EXT_B+

R901

IO_REG

CHRG_TYP

CHRG_SW

R913

R914

F900

CNTRL

CHRG_STATE
CHRG_DETB

B+

B+

24-26

CHG_DISABLE
PC12

(CHEMISTRY)

NC

GND

5

18
17

22
28
3
4

20+21

8

Logic

I / O

Charge
Control

M100

Battery

Conn.

1

2

PNP

NPN

(Charge)

(Drive)

Charge
Control

Shunt

Sense

Under-

voltage
&Short

Circuit

Protect.

19

BATT_DETB

3

CHRG_ID

(from J931)

R902

R903

(from/ to J931)

(from U900)
(Bias)

(from U900 - If high current is set to 400mA limit. If low current is set to 900mA imit.)

(to U900 - Charger Type indication from pull down resisor in Charger)

(Charger ID and current setting)

(EXT_B+_SOL)

4

1

3

Q904

NPN

TOUT12

(from U800)

D904

DIG_REG

(to U700

1,2

EXT_PWR_ON

1,2

USB_TXENB
USB_VPIN
USB_VMIN
USB_XRXD
USB_VPOUT
USB_VMOUT
USB_SUSPEND

U600

USB

Interface

IC

Accesory

J600

Connector

USB_DNEG
USB_DPOS
USB_DET

USB_DNEG
USB_DPOS

USB_VCC

USB_VCC

IO_REG

SOFTCON

16

14

9
10
8

3

4

2

11

12

5

1

7

1
2
3
4

5-9

GND

SC1A

NC

SC0A
TOUT9

Buffer

USB

b

GSM SERVICE SUPPORT GROUP

2004.04.02

LEVEL 3 AL Block Diagram

Rev. 1.0

Dual Band C650

Michael Hansen, Alexander Buehler

Page 2of 2

C650

Revision Overview

Rev. 1.0: initial Block Diagram
Rev. 1.1: change two R901 to R902 and R903/ change L404 to
L104

Charger

Light Sensor

Camera Diver, Buffer
and Regulator

(to Display
Connector)

(to Neptune)

VPP

3

- for fast FLash Process)

(VCC from U900)