�P 8051/80535 INSTRUCTION SET
Jacek Majewski , 1994
�P Algorithm �P Memory Maps
�P
1. Fetch from memory
instruction:
Memory Memory
Memory
Instr. Reg. �!(PC)
Indirect Direct 64Kbyte 64Kbyte
2. PC �!PC+ No_of_bytes
3. Operation
128 byte 128 byte
4. Go to 1.
Direct/Indirect
128 byte
Notes on Data addressing modes:
Rn working register R0-R7
direct 128 internal RAM locations, any l/O port, control or status register located in memory space
@R0/1 indirect memory space (internal or external RAM) location addressed by register R0 or R1
# data 8-bit constant included in instruction
#data 16-bit constant included as bytes 2 and 3 of instruction
16
bit 8-bit address of �P bits located in memory space
A accumulator
( ) contents of memory space (internal data RAM of �P);
description ( ) is equivalent to ( )
( ) contents of program memory space (internal/external ROM of �P)
( ) contents of data external Data memory space (external Data RAM of �P)
addr destination address for LCALL and LJMP may be anywhere within the 64 Kbyte program memory
16
address space
addr destination address for ACALL and AJMP will be within the same 2 Kbyte page of program memory as
11
the first byte of the following instruction.
rel SJMP and all conditional jumps include an 8-bit offset byte. Range is + 127/-128 bytes relative to first
byte of the following instruction. Value of rel is sign-extended to double bytes before e addition to PC.
sign sign extension
nosgn no sign extension
�! move
"! exchange
Ą" concatenate
C language operators:
+ - * / % add, subtrac, multiply, divide, moduilo
& | ^ ~ and, or, xor, not (bitwise operators)
INST535.DOC 8051/80535 Instruction Set (J. Majewski 1994) page 1
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Cyc
Code
Mnemonic Operation
les
Arithmetic operations
0010 1rrr 1
ADD A, Rn
A �!A + Rn
flags : CY OV AC
1
25 direct
ADD A, direct
A �!A + (direct)
flags : CY OV AC
26 /27 1
ADD A, @R0/1
A �!A + (R0/1 )
flags : CY OV AC
1
24 data
ADD A, #data
A �!A + data
flags : CY OV AC
0011 1rrr 1
ADDC A, Rn
A �!A + Rn +CY
flags : CY OV AC
1
35 direct
ADDC A, direct
A �!A + (direct) + CY
flags : CY OV AC
36 /37 1
ADDC A, @R0/1
A �!A + (R0/1 ) + CY
flags : CY OV AC
1
34 data
ADDC A, #data
A �!A + data + CY
flags : CY OV AC
1001 1rrr 1
SUBB A, Rn
A �!A - Rn - CY
flags : CY OV AC
1
95 direct
SUBB A, direct
A �!A - (direct) - CY
flags : CY OV AC
96 /97 1
SUBB A, @R0/1
A �!A - (R0/1 ) - CY
flags : CY OV AC
1
94 data
SUBB A, #data
A �!A - data - CY
flags : CY OV AC
04 1
INC A
A �!A + 1
0000 1rrr 1
INC Rn
Rn �!Rn + 1
1
05 direct
INC direct
(direct) �!(direct) + 1
06 /07 1
INC @R0/1
(R0/1 ) �!(R0/1 ) + 1
14 1
DEC A
A �!A - 1
0001 1rrr 1
DEC Rn
Rn �!Rn - 1
1
15 direct
DEC direct
(direct) �!(direct) - 1
16 /17 1
DEC @R0/1
(R0/1 ) �!(R0/1 ) - 1
A3 2
INC DPTR
DPTR �! DPTR + 1
A4 4
MUL AB
B Ą" A �! A * B
flags : CY=0 OV
84 4
DIV AB
A �! A / B (result)
A �! A % B (remainder)
flags : CY=0 OV
D4
DA A
if A3-0 >0 or AC=1 : A3-0�! A3-0 +6
1
if A7-4 >0 or CY=1 : A7-4�! A7-4 +6
flag : CY
Logical operation
0101 1rrr 1
ANL A, Rn
A �! A & Rn
1
55 direct
ANL A, direct
A �! A & (direct)
56 /57 1
ANL A, @R0/1
A �! A & (R0/1 )
1
54 data
ANL A, #data
A �! A & data
INST535.DOC 8051/80535 Instruction Set (J. Majewski 1994) page 2
M
Cyc
Code
Mnemonic Operation
les
1
52 direct
ANL direct, A
(direct) �! (direct) & A
2
53 direct data
ANL direct, #data
(direct) �! (direct) & data
0100 1rrr 1
ORL A, Rn
A �!A | Rn
1
45 direct
ORL A, direct
A �!A | (direct)
46 /47 1
ORL A, @R0/1
A �!A | (R0/1 )
1
44 data
ORL A, #data
A �!A | data
1
42 direct
ORL direct, A
(direct) �! (direct) | A
2
43 direct data
ORL direct, #data
(direct) �! (direct) | data
0110 1rrr 1
XRL A, Rn
A �!A ^ Rn (^ XOR)
1
65 direct
XRL A, direct
A �!A ^ (direct)
66 /67 1
XRL A, @R0/1
A �!A ^ (R0/1 )
1
64 data
XRL A, #data
A �!A ^ data
1
62 direct
XRL direct, A
(direct) �! (direct) ^ A
2
63 direct data
XRL direct, #data
(direct) �! (direct) ^ data
E4 1
CLR A
A �! 0
F4 1
CPL A
A �! <"A
23 1
RL A
< A
<<
33 1
RLC A
C A
<
<<
03 1
RR A
A >
>>
13 1
RRC A
AC
>> >
C4 1
SWAP A
A7-4"! A3-0
Data transfers
1110 1rrr 1
MOV A, Rn
A �! Rn
1
E5 direct
MOV A, direct
A �! (direct)
MOV A, ACC
E6 /E7 1
MOV A, @R0/1
A �! (R0/1 )
1
74 data
MOV A, #data
A �! data
1111 1rrr 1
MOV Rn, A
Rn �! A
2
A8 direct
MOV Rn, direct
Rn �! (direct)
1
0111 1rrr data
MOV Rn, #data
Rn �! data
1
F5 direct
MOV direct, A
(direct) �! A
2
88 direct
MOV direct, Rn
(direct) �! Rn
INST535.DOC 8051/80535 Instruction Set (J. Majewski 1994) page 3
M
Cyc
Code
Mnemonic Operation
les
2
85 direct
MOV directd, direct
(directd ) �! (direct )
s
s
s
directd
2
86 direct
MOV direct, @R0/1
(direct) �! (R0/1 )
87 direct
2
75 direct data
MOV direct, #data
(direct) �! data
F6 /F7 1
MOV @R0/1, A
(R0/1 ) �! A
2
A6 direct
MOV @R0/1, direct
(R0/1 ) �!(direct)
1
76 data
MOV @R0/1, #data
(R0/1 ) �! data
77 data
2
90 data16 (HiLo)
MOV DPTR, #data16
DPTR �! data16
93 2
MOVC A, @A+DPTR
A �! (A +DPTR )
nosign
83 2
MOVC A, @A+PC
A �! (A +PC )
nosign
E2 /E3 2
MOVX A, @R0/1
A �! (P2 Ą" R0/1)
E0 2
MOVX A, @DPTR
A �! (DPTR)
F2 /F3 2
MOVX @R0/1, A
(P2 Ą" R0/1) �! A
F0 2
MOVX @DPTR, A
(DPTR) �! A
2
C0 direct
PUSH direct
SP�! SP+1; (SP)�!(direct)
2
D0 direct
POP direct
(direct)�!(SP); SP�! SP-1
1100 1rrr 1
XCH A, Rn
A "! Rn
1
C5 direct
XCH A, direct
A "! (direct)
C6 /C7 1
XCH A, @R0/1
A "! (R0/1 )
D6 /D7 1
XCHD A, @R0/1
A3-0 "! (R0/1 )3-0
Program and machine control
aaa1 0001 2
ACALL addr11 2S
SP�! SP+2; (SP : SP-1) �! PC
addr7-0
PC�!PC15-11 Ą" addr10-0
2
12 addr16 (HiLo)
LCALL addr16 2
SP�! SP+2; (SP : SP-1) �! PC
PC�! addr15-0
22 2
RET
PC�!(SP : SP-1);SP �! SP-2
-
32 2
RETI
PC�!(SP : SP-1);SP �! SP-2
-
aaa0 0001 2
AJMP addr11
PC�!PC15-11 Ą" addr10-0
addr7-0
2
02 addr16 (HiLo)
LJMP addr16
PC�! addr15-0
2
80 rel
SJMP rel
PC�! PC + rel
sign
73 2
JMP @A+DPTR
PC�! A +DPTR
nosign
2
60 rel
JZ rel
if A=0 : PC �! PC + rel
sign
2
70 rel
JNZ rel
if A`"0 : PC �! PC + rel
sign
2
40 rel
JC rel
if CY=1 : PC �! PC + rel
sign
INST535.DOC 8051/80535 Instruction Set (J. Majewski 1994) page 4
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Cyc
Code
Mnemonic Operation
les
2
50 rel
JNC rel
if CY=0 : PC �! PC + rel
sign
2
20 bit rel
JB bit, rel
if bit=1 : PC �! PC + rel
sign
2
30 bit rel
JNB bit, rel
if bit=0 : PC �! PC + rel
sign
2
10 bit rel
JBC bit, rel if bit=1 :
bit�!0
PC�! PC + rel
sign;
2
B5 direct rel
CJNE A, direct, rel
if A`"(direct) : PC�! PC + rel
sign
if A<(direct) : CY�!1 else CY�!0
2
B4 data rel
CJNE A, #data, rel
if A`"data : PC�! PC + rel
sign
if A2
B8 data rel
CJNE Rn, #data, rel
if Rn`"data : PC�! PC + rel
sign
if Rn2
B6 data rel /
CJNE @R0/1, #data, rel
if (R0/1 )`"data : PC�! PC + rel
sign
B7 data rel
if (R0/1 )2
1101 1rrr rel
DJNZ Rn, rel
Rn �!Rn - 1
if Rn`"0 : PC�! PC + rel
sign
2
D5 direct rel
DJNZ direct, rel
(direct) �!(direct)- 1
if (direct)`"0 : PC�! PC + rel
sign
00 1
NOP ;
Bololean variable manipulation
1
C2 bit
CLR bit
bit �!0
D3 1
SETB C
CY �! 1
1
D2 bit
SETB bit
bit �! 1
B3 1
CPL C
CY �! <" CY
1
B2 bit
CPL bit
bit �! <" bit
2
82 bit
ANL C, bit
CY �! CY & bit
2
B0 bit
ANL C, /bit
CY �! CY & <" bit
2
72 bit
ORL C, bit
CY �! CY | bit
A0 bit
ORL C, /bit
CY �! CY | <" bit
2
A2 bit
MOV C, bit
CY �! bit
1
92 bit
MOV bit, C
bit �! CY
2
Program Status Word register (PSW) D0 HEX.
CY AC F0 RS1 RS0 OV F1 P
Bank Register
Select
D7H D6H D5H D4H D3H D2H D1H D0H
INST535.DOC 8051/80535 Instruction Set (J. Majewski 1994) page 5