Sch PCB E1070 L3 P4

background image

BB

RF

MFG CTRL CHK:

QA CHK:

REV:

Drawing Number:

Page:

TITLE:

Size:

Engineer:

Drawn by:

R&D CHK:

DOC CTRL CHK:

Of:

Changed by:

Time:

Date:

2

EMU

3

4

D

C

B

A

MOTOROLA CONFIDENTIAL PROPRIETARY

11x17

TARAZED

4 1 3 A

20

1

P4

2:31:07 pm

20th July 2005

ARC127

Roger Callister

FEM

BLUE

GSM_PA

WCDMA PA

SHEILDS

TOP LEVEL

UNDERFILMS

PCAP

HARMONY

POG

BLUETOOTH

1

NC

NC

NC

NC

NC

NC

PIN1

PIN2

NC

NC

M5403
1188983Y01

PIN1

PIN2

1188983Y01

M5404

PIN2

1188983Y01

M5402

PIN1

PIN2

TX_RAMP

WB_SPIWB_CE

WB_SPI_CLK

WB_SPI_MISO

WB_SPI_MOSI

WB_VCO_SF_EN

M5401
1188983Y01

PIN1

HAR_TX_PREKEY

HAR_TX_SLOT

HAR_WB_RX_ACQ

HAR_WB_RX_ON

HAR_WB_RX_SLOT

MB_RX_VCO_EN

MB_SPI_CLK

MB_SPI_MISO

MB_SPI_MOSI

PS_CLK_EN

PS_CLK_MM

PS_SPIMB_CE

PS_SPIWB_CE

STBY_MB

STBY_WB

TEMP_SENSE

BBIF_TX_FRM

BB_CLK_13M

BB_CLK_15_36M

BCLKR

BCLKX

BDR

BDX

BFSR

BLUETOOTHCLK

DMCS

HAR_MB_RX_ACQ

HAR_MB_RX_ON

HAR_MB_RX_SLOT

HAR_RESETb

HAR_SPIMB_CE

HAR_SPIWB_CE

PIN1

2

PIN2

NC

NC

NC

AOC_PWR_UP

BBIF_CLK

BBIF_RX[7:2]

BBIF_RX_FRM

BBIF_TX[7:0]

PIN2

2

NC

NC

1171905B01

M5617

1

NC

NC

M5616
1171905B01

PIN1

1

NC

NC

1171905B01

M5615

1

PIN1

2

PIN2

NC

M5614
1171905B01

PIN1

1

PIN2

2

NC

1171905B01

M5613

1

PIN1

2

PIN2

NC

MB_SPI_MISO

MB_SPI_MOSI

PS_CLK_EN

PS_CLK_MM

PS_SPIMB_CE

PS_SPIWB_CE

STBY_MB

STBY_WB

TEMP_SENSE

TX_RAMP

WB_SPIWB_CE

WB_SPI_CLK

WB_SPI_MISO

WB_SPI_MOSI

WB_VCO_SF_EN

BDX

BFSR

BLUETOOTHCLK

DMCS

HAR_MB_RX_ACQ

HAR_MB_RX_ON

HAR_MB_RX_SLOT

HAR_RESETb

HAR_SPIMB_CE

HAR_SPIWB_CE

HAR_TX_PREKEY

HAR_TX_SLOT

HAR_WB_RX_ACQ

HAR_WB_RX_ON

HAR_WB_RX_SLOT

MB_RX_VCO_EN

MB_SPI_CLK

PIN1

1

PIN2

2

AOC_PWR_UP

BBIF_CLK
BBIF_RX[7:2]
BBIF_RX_FRM
BBIF_TX[7:0]
BBIF_TX_FRM

BB_CLK_13M
BB_CLK_15_36M

BCLKR

BCLKX

BDR

1

PIN1

2

PIN2

NC

NC

M5621
1171905B01

PIN2

2

NC

NC

1171905B01

M5620

2

PIN2

NC

NC

M5619
1171905B01

PIN1

1

NC

NC

1171905B01

M5618

1

PIN1

NC

NC

NC

NC

NC

NC

1

PIN1

2

PIN2

M5629
1188983Y01

PIN1

1

PIN2

2

M5627
1188983Y01

PIN1

1

PIN2

2

1188983Y01

M5628

1

PIN1

2

PIN2

1

PIN1

2

PIN2

NC

NC

1188983Y01

M5626

M5624
1171905B01

PIN1

1

PIN2

2

NC

NC

1171905B01

M5625

1

PIN1

2

PIN2

NC

NC

1171905B01

PIN1

1

PIN2

2

NC

NC

1171905B01

M5623

1

PIN1

2

PIN2

NC

NC

M5612

M5610
1171905B01

PIN1

1

PIN2

2

1171905B01

M5611

1

PIN1

2

PIN2

NC

NC

M5606
1188983Y01

PIN1

1

PIN2

2

1188983Y01

M5607

1188983Y01

M5605

1

PIN1

2

PIN2

2

PIN2

M5604
1188983Y01

PIN1

1

PIN2

2

PIN1

1

PIN2

2

1188983Y01

M5603

1

PIN1

15

3

4

5

6

7

8

9

10

M5602
1188983Y01

SHIELD

SH5

1

2

11

12

13

14

1

2

3

4

5

6

7

8

1

2

3

4

5

6

7

8

9

SH8
SHIELD

SHIELD

SH7

1

SH4
SHIELD

SH3
SHIELD

1

2

3

4

5

6

7

8

SH2

SHIELD

1

2

3

4

5

6

1

2

11

12

3

4

5

6

7

8

9

10

1

SH6
SHIELD

M5622
1171905B01

PIN1

1

PIN2

2

SHIELD

SH1

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

PIN2

NC

NC

NC

NC

NC

NC

PIN1

1

PIN2

2

1188983Y01

M5609

1

PIN1

2

BB_CLK_15_36M

BB_CLK_13M

BBIF_TX_FRM

BBIF_TX[7:0]

BBIF_RX_FRM

BBIF_RX[7:2]

BBIF_CLK

AOC_PWR_UP

M5608
1188983Y01

HAR_SPIWB_CE

HAR_SPIMB_CE

HAR_RESETb

HAR_MB_RX_SLOT

HAR_MB_RX_ON
HAR_MB_RX_ACQ

DMCS

BLUETOOTHCLK

BFSR

BDX

BDR

BCLKX

BCLKR

PS_SPIMB_CE

PS_CLK_MM

PS_CLK_EN

MB_SPI_MOSI
MB_SPI_MISO

MB_SPI_CLK

MB_RX_VCO_EN

HAR_WB_RX_SLOT

HAR_WB_RX_ON
HAR_WB_RX_ACQ

HAR_TX_SLOT

HAR_TX_PREKEY

WB_VCO_SF_EN

WB_SPI_MOSI
WB_SPI_MISO

WB_SPI_CLK

WB_SPIWB_CE

TX_RAMP

TEMP_SENSE

STBY_WB
STBY_MB

PS_SPIWB_CE

background image

FLIP CONNECTOR

PCAP2

BLUETOOTH

MEMORIES

CORE LOGIC BLOCK

POG

SIM

TRANSFLASH

KEYPAD

MISC CONNECTORS

EMU & BATTERY

MFG CTRL CHK:

QA CHK:

REV:

Drawing Number:

Page:

TITLE:

Size:

Engineer:

Drawn by:

R&D CHK:

DOC CTRL CHK:

Of:

Changed by:

Time:

Date:

B

C

D

4

WB_VCO_SF_EN

20

BaseBand Top Level

7

20th July 2005

3:24:22 pm

P4

TARAZED

ARC127

3

MOTOROLA CONFIDENTIAL PROPRIETARY

A

1

2

STEREO_CLK

STEREO_FS

STEREO_TX

TXD_VPOUT

TX_RAMP

USB_TXENb

USB_VMOUT

USB_VPIN

USER_OFF

VSIMC_EN

WATCHDOG

WB_SPIWB_CE

WB_SPI_CLK
WB_SPI_MISO
WB_SPI_MOSI

MUXCTL

PCAP_CLK_IN

PCAP_CS

PCAP_INT

PCAP_RESETb

PS_CLK_EN

PS_SPIMB_CE

PS_SPIWB_CE

ROW[7:0]

RTSb_XRXD

RXD_VMIN

SD_GP0

SIM_CLK

SIM_IO

SIM_RST

STBY_MB

STBY_WB

HAR_SPIWB_CE

HAR_TX_PREKEY

HAR_TX_SLOT
HAR_WB_RX_ACQ
HAR_WB_RX_ON

HAR_WB_RX_SLOT

LOGIC_SENSE

LOUD2_EN

MB_RX_VCO_EN

MB_SPI_CLK
MB_SPI_MISO
MB_SPI_MOSI

MMC_CLK

MMC_CMD

MMC_DAT

EL_PANEL_EN

EMU_CS

EMU_INT

FLASH_DOC_GPU_OEb

FLASH_RWb_GPU_EBHb

FLIP_DETECT

GPU_CSb

GPU_IND_ADDR

GPU_INTb
GPU_RESETB

GPU_RWb

HAR_MB_RX_ACQ

HAR_MB_RX_ON

HAR_MB_RX_SLOT

HAR_RESETb

HAR_SPIMB_CE

BCLKX

BDR

BDX

BFSR

BLUETOOTH_INTb

BLUE_CLK_EN

BLUE_CTSb
BLUE_RTSb

BLUE_RX

BLUE_SHUTDOWN

BLUE_TX

BLUE_WAKEb

CLK_32_768K_BUFF

COL[7:0]

DATA[15:0]

DMCS

DOC_GPU_EBLb

ASAP_FS

ASAP_RX

ASAP_TX

BATT_DETB

BATT_IO

BBIF_CLK

BBIF_RX[7:2]

BBIF_RX_FRAME

BBIF_TX[7:0]
BBIF_TX_FRAME

BB_CLK_13M

BB_CLK_15_36M

BB_SPI_CLK

BB_SPI_MISO
BB_SPI_MOSI

BCLKR

BLUE_CTSb
BLUE_RTSb

BLUE_RX

BLUE_SCAN_SYNC

BLUE_SHUTDOWNb

BLUE_TX

CLK_32_768K_BUFF

AOC_PWR_UP

ASAP_CLK

STEREO_CLK

STEREO_FS

STEREO_TX

TEMP_SENSE

THERM_BIAS

USER_OFF

VSIMC_EN

WATCHDOG

ASAP_CLK

ASAP_FS

ASAP_RX
ASAP_TX

BLUETOOTHCLK

BLUETOOTH_INTb
BLUETOOTH_WAKEb

BLUE_CLK_EN

EAR_SPKR-

EMU_PWR_ON

FLASH_LIGHT

FLASH_SINK

HAR_TX_PREKEY

HS_SPKR_L

HS_SPKR_R

LOGIC_SENSE
LOUD2_EN

MUXCTL

ON_OFF_ENDb

PCAP_CLK_IN

PCAP_CS

PCAP_INT
PCAP_RESETb

PS_CLK_MM

AD4

AD6

ASAP_CLK

ASAP_FS

ASAP_RX
ASAP_TX

AUDIO_IN

BATT_DETb

BATT_P

BB_SPI_CLK
BB_SPI_MISO
BB_SPI_MOSI

CLK_32_768K_BUFF

EAR_SPKR+

GPU_CSb

GPU_IND_ADDR

GPU_INTb

GPU_RESETb

GPU_RWb

PS_CLK_MM

SD_CLK

SD_CMD

SD_D0

TXD_VPOUT

USB_TXENB

USB_VMOUT

USB_VPIN

DATA[15:0]

DOC_GPU_EBLb

EAR_SPKR+

EAR_SPKR-

FLASH_DOC_GPU_OEb

FLASH_LIGHT

FLASH_RWb_GPU_EBHb

FLASH_SINK

AD6

AUDIO_IN

BATT_IO

BATT_P

BB_SPI_CLK

BB_SPI_MISO

BB_SPI_MOSI

EMU_CS
EMU_INT

EMU_PWR_ON

HS_SPKR_L

HS_SPKR_R

PCAP_RESETb

RTSB_XRXD

RXD_VMIN

THERM_BIAS

SD_CMD

SD_D0

SD_GP0

SIM_CLK

SIM_IO

SIM_RST

AD4

COL[7:0]

EL_PANEL_EN

FLIP_DETECT

MMC_CLK

MMC_CMD

MMC_DAT

ON_OFF_ENDb

ROW[7:0]

SD_CLK

BLUETOOTHCLK

BLUE_CLK_EN
BLUE_SHUTDOWN

PS_CLK_EN

PS_CLK_EN

MMC_CLK

MMC_DAT
MMC_CMD

EL_PANEL_EN

RXD_VMIN

RTSb_XRXD

PCAP_RESETb

EMU_INT

EMU_CS

BB_SPI_MOSI

BB_SPI_MISO

BB_SPI_CLK

BATT_IO

SD_CLK

SD_GP0

EAR_SPKR-

EAR_SPKR+

CLK_32_768K_BUFF

BL2_SINK

BATT_DETb

ASAP_TX

ASAP_TX

ASAP_RX

ASAP_RX

ASAP_FS

ASAP_FS

ASAP_CLK

ASAP_CLK

FLASH_LIGHT

USB_VPIN

USB_VMOUT

USB_TXENb

TXD_VPOUT

VSIMC_EN

USER_OFF

TEMP_SENSE

STEREO_TX

STEREO_FS
STEREO_CLK

PS_CLK_MM

PS_CLK_MM

PCAP_INT

PCAP_CS

PCAP_CLK_IN

ON_OFF_ENDb

MUXCTL

LOUD2_EN

LOGIC_SENSE

HAR_TX_PREKEY

HAR_TX_PREKEY

ROW[7:0]

USIM_RST
USIM_IO

USIM_CLK

BCLKR

BDR

BFSR

BCLKX

BDX

BBIF_RX[7:2]

WB_SPIWB_CE

BBIF_TX[7:0]

BBIF_RX_FRM

BBIF_CLK

BB_CLK_13M

BBIF_TX_FRM

AOC_PWR_UP

HAR_TX_SLOT

HAR_WB_RX_SLOT

HAR_WB_RX_ACQ

HAR_WB_RX_ON

BB_CLK_15_36M

STBY_WB

STBY_MB

WATCHDOG

GPU_INTb

DOC_GPU_EBLb

GPU_CSb

DMCS

FLASH_RWb_GPU_EBHb

WB_SPI_MOSI

WB_SPI_MISO

WB_SPI_CLK

MB_SPI_MOSI

MB_SPI_MISO

MB_SPI_CLK

MB_RX_VCO_EN

WB_VCO_SF_EN

HAR_SPIMB_CE

PS_SPIMB_CE

HAR_MB_RX_SLOT

HAR_MB_RX_ON

HAR_MB_RX_ACQ

PS_SPIWB_CE

TX_RAMP

HAR_SPIWB_CE

SD_D0

SD_CMD

HAR_RESETb

BLUETOOTH_WAKEb

BLUE_RTSb

BLUE_CTSb

BLUETOOTH_INTb

BLUE_TX
BLUE_RX

COL[7:0]

FLIP_DETECT

DATA[15:0]
GPU_IND_ADDR

FLASH_DOC_GPU_OEb

GPU_RWb

GPU_RESETb

background image

Power

Memory & Test Interface

4 Sheets

MCU and IPCM Peripheral Interface

DSP Interface

POG Hiearachy Block

SDRAM_DOC

FLASH

MFG CTRL CHK:

QA CHK:

REV:

Drawing Number:

Page:

TITLE:

Size:

Engineer:

Drawn by:

R&D CHK:

DOC CTRL CHK:

Of:

Changed by:

Time:

Date:

20

20th July 2005

3:25:40 pm

P4

TARAZED

POG & Memories

ARC127

9

20

1

2

3

4

D

C

B

A

MOTOROLA CONFIDENTIAL PROPRIETARY

E1034

R1050

DQML

FLASH_CLK

FLASH_DOC_GPU_OEb

FLASH_RWb_GPU_EBHb

PCAP_RESETb

SDRAM_CASb

SDRAM_CKE

SDRAM_CLK

SDRAM_CSb

SDRAM_MA[11:10]

SDRAM_RASb

SDRAM_WEb

0

ADDR[24:0]

DATA[31:0]

DOC_CSb

DOC_GPU_EBLb

DOC_IRQ

DQMH

STEREO_TX

TXD_VPOUT

TX_RAMP

USB_TXENb

USB_VMOUT

USB_VPIN

USER_OFF_POG

VSIMC_EN

WATCHDOG

WB_SPIWB_CE

WB_SPI_CLK
WB_SPI_MISO
WB_SPI_MOSI

WB_VCO_SF_EN

RXD_VMIN

SDRAM_CASb

SDRAM_CKE

SDRAM_CLK

SDRAM_CSb

SDRAM_MA[11:10]

SDRAM_RASb

SDRAM_WEb

SD_GP0

SIM_CLK

SIM_IO

SIM_RST

STBY_MB

STBY_WB

STEREO_CLK_POG

STEREO_FS_POG

MB_SPI_CLK
MB_SPI_MISO
MB_SPI_MOSI

MMC_CLK

MMC_CMD

MMC_DAT

MUXCTL

PCAP_CLK_IN

PCAP_CS

PCAP_INT

PCAP_RESETb

PS_CLK_EN

PS_SPIMB_CE

PS_SPIWB_CE

ROW[7:0]

RTSb_XRXD

GPU_INTb

GPU_RESETb

GPU_RWb

HAR_MB_RX_ACQ
HAR_MB_RX_ON

HAR_MB_RX_SLOT

HAR_RESETb

HAR_SPIMB_CE

HAR_SPIWB_CE

HAR_TX_PREKEY
HAR_TX_SLOT

HAR_WB_RX_ACQ
HAR_WB_RX_ON
HAR_WB_RX_SLOT

LOGIC_SENSE

LOUD2_EN

MB_RX_VCO_EN

DOC_IRQ

DQMH
DQML

EL_PANEL_EN

EMU_CS

EMU_INT

FLASH_CLK

FLASH_CS0b

FLASH_CS1b

FLASH_CS2b

FLASH_DOC_GPU_OEb

FLASH_ECBb_GPU_WAITb

FLASH_LBAb

FLASH_RWb_GPU_EBHb

FLIP_DETECT

GPU_CSb

BFSR

BLUETOOTH_INTb

BLUETOOTH_WAKEb

BLUE_CLK_EN

BLUE_CTSb

BLUE_RTSb

BLUE_RX

BLUE_SHUTDOWN

BLUE_TX

CLK_32_768K_BUFF

COL[7:0]

DATA[31:0]

DMCS

DOC_CSb

DOC_GPU_EBLb

ASAP_TX

BATT_DETB

BATT_IO

BBIF_CLK

BBIF_RX[7:2]

BBIF_RX_FRAME

BBIF_TX[7:0]
BBIF_TX_FRAME

BB_CLK_13M

BB_CLK_15_36M

BB_SPI_CLK

BB_SPI_MISO

BB_SPI_MOSI

BCLKR

BCLKX

BDR

BDX

R1051

0

ADDR[24:0]

AOC_PWR_UP

ASAP_CLK

ASAP_FS

ASAP_RX

FLASH_RWb_GPU_EBHb

PCAP_RESETb

ADDR[24:0]

DATA[31:0]

FLASH_CLK

FLASH_CS0b

FLASH_CS1b

FLASH_CS2b

FLASH_DOC_GPU_OEb

FLASH_ECBb_GPU_WAITb

FLASH_LBAb

15:0

DOC_GPU_EBLb

DOC_GPU_EBLb

BLUE_CLK_EN

USER_OFF

DOC_IRQ

SD_GP0

BLUE_SHUTDOWN

MMC_CLK

MMC_DAT
MMC_CMD

GPU_INTb

GPU_CSb

DATA[31:0]
ADDR[24:0]

PCAP_RESETb

PCAP_RESETb

GPU_IND_ADDR

DATA[15:0]

FLASH_DOC_GPU_OEb

FLASH_DOC_GPU_OEb

FLASH_RWb_GPU_EBHb

FLASH_RWb_GPU_EBHb

FLASH_LBAb
FLASH_ECBb_GPU_WAITb

FLASH_CS2b
FLASH_CS1b
FLASH_CS0b

FLASH_CLK

DOC_CSb

GPU_RWb

DQMH
DQML

SDRAM_CASb

SDRAM_CKE

SDRAM_CLK

SDRAM_CSb

SDRAM_MA[11:10]

SDRAM_RASb

SDRAM_WEb

PCAP_INT

DMCS

BLUE_CTSb

SIM_CLK

PCAP_CLK_IN

CLK_32_768K_BUFF

BFSR

BDX

BDR

BCLKX

BCLKR

BB_CLK_15_36M

BB_CLK_13M

BBIF_TX_FRAME

BBIF_TX[7:0]

BBIF_RX_FRAME

BBIF_RX[7:2]

BBIF_CLK

BATT_IO

ASAP_TX
ASAP_RX

ASAP_FS

ASAP_CLK

AOC_PWR_UP

SIM_IO

BATT_DETB

COL[7:0]

PS_CLK_EN

LOUD2_EN

EMU_CS

EMU_INT

EL_PANEL_EN

STEREO_TX

BLUE_WAKEb

STEREO_CLK_POG
STEREO_FS_POG

MUXCTL

MB_SPI_MOSI

MB_SPI_MISO

MB_SPI_CLK

MB_RX_VCO_EN

GPU_RESETb

ROW[7:0]

HAR_WB_RX_SLOT

HAR_WB_RX_ON

HAR_WB_RX_ACQ

HAR_TX_SLOT

HAR_TX_PREKEY

HAR_SPIWB_CE

HAR_SPIMB_CE

HAR_RESETb

HAR_MB_RX_SLOT

HAR_MB_RX_ON

HAR_MB_RX_ACQ

PCAP_CS
BB_SPI_MOSI
BB_SPI_MISO
BB_SPI_CLK

FLIP_DETECT

LOGIC_SENSE

STEREO_FS

STEREO_CLK

USER_OFF_POG

WATCHDOG

WB_VCO_SF_EN

WB_SPI_MOSI

WB_SPI_MISO

WB_SPI_CLK

WB_SPIWB_CE

BLUETOOTH_INTb

USB_VPIN

USB_VMOUT

USB_TXENb

TX_RAMP

BLUE_TX

TXD_VPOUT

VSIMC_EN

STBY_WB

STBY_MB

BLUE_RX

RXD_VMIN

BLUE_RTSb

RTSb_XRXD

SIM_RST

PS_SPIWB_CE

PS_SPIMB_CE

background image

MFG CTRL CHK:

QA CHK:

REV:

Drawing Number:

Page:

TITLE:

Size:

Engineer:

Drawn by:

R&D CHK:

DOC CTRL CHK:

Of:

Changed by:

Time:

Date:

D

1

2

MOTOROLA CONFIDENTIAL PROPRIETARY

20

A

18

30

17

5

20th July 2005

8:54:35 am

P4

TARAZED

SDRAM and DOC

ARC127

B

15

3

C

4

C1507

0.10uF

10K

10K

R1502

R5702

0

VMMC_2.775V

R1501

R5701

.01uF

C1503

DOC_VCC

0

4

9

1

NC

NC

9

26

VLVIO_1.875V

5

23

VPOG_LVIO_1.875V

2

21

7

9

NC

22

14

NC

5

20

6

8

VSDRAM

C1508
0.10uF

4

NC

NC

31

10

NC

E1501

SHORT

NC

8

12

24

NC

DOC_VCC

VSDRAM

NC

7

27

13

3

25

2

R1505DNP

0

29

R1504

0

NC

12

VSDRAM_IO

0.10uF

C1504

NC

11

3

SHORT

E1500

8

2

NC

12

NC

NC

0

0.10uF

C1505

11

DOC_VCC

6

15

10

1

10

NC

1

3

R1500

10K

G1

VSS1

G3

VSS2

G8

VSS3

VSS4

J9

NC

19

NC9

D6

RAS

G10

RSTIN

UDQM

C4

F1

VCC_M_1

G5

VCC_M_2

J6

VCC_SD_1

K6

VCC_SD_2

NC21

NC22

M10

NC3

M1

A2

NC4

B2

NC5

NC6

K2

L2

NC7

NC8

M2

B3

NC14

NC15

J5

NC16

A9

NC17

M9

NC18

A10

B10

NC19

L1

NC2

NC20

F10

L10

F6

IRQ

D4

LDQM

L5

LOCK

A1

NC1

NC10

L3

B4

NC11

NC12

L4

NC13

B5

C5

H6

DQ8_M

E10

DQ8_SD

K7

DQ9_M

D10

DQ9_SD

E1

EN_CE

H3

EN_OE

E2

EN_WE_M

EN_WE_SD

C7

K4

DQ4_M

K9

DQ4_SD

J4

DQ5_M

K10

DQ5_SD

H5

DQ6_M

J10

DQ6_SD

DQ7_M

K5

H10

DQ7_SD

H8

DQ15_M

B6

DQ15_SD

J3

DQ1_M

L7

DQ1_SD

G4

DQ2_M

L8

DQ2_SD

DQ3_M

H4

L9

DQ3_SD

G7

DQ11_M

C9

DQ11_SD

H7

DQ12_M

B9

DQ12_SD

K8

DQ13_M

B8

DQ13_SD

DQ14_M

J8

B7

DQ14_SD

C3

CLK_M

D7

CLK_SD

C6

CS

C1

DMARQ

K3

DQ0_M

L6

DQ0_SD

DQ10_M

J7

C10

DQ10_SD

A8_SD

A9_M

G6

D8

A9_SD

E4

BA0

F4

BA1

E5

BUSY

CAS

E6

E7

CKE

A4_SD

F3

A5_M

E9

A5_SD

F5

A6_M

A6_SD

D9

A7_M

D5

F8

A7_SD

E3

A8_M

E8

F7

J1

A1_M

F2

A1_SD

A2_M

H1

A2_SD

G2

D1

A3_M

H2

A3_SD

A4_M

J2

H9

A0_M

K1

A0_SD

D2

F9

A10_M

C2

A10_SD

A11_M

G9

A11_SD

C8

D3

A12_M

A12_SD

14

VSDRAM_IO

NC

U1500
MS06D9SD8B3

.01uF

C1512

11

.01uF

C1511

2

IN_A

1

NC

4

OUT_Y

5

VCC

NC

28

13

U1520
MC74VHC1GT50
5164751E03

3

GND

NC

VSDRAM_IO

16

DOC_VCC

R1503
10K

VSDRAM_IO

VSDRAM

4

0.10uF

C1509

C1500

0.10uF

C1502
0.10uF

C1501
0.10uF

0.10uF

C1510

C1506

NC

6

VHVIO_2.775V

NC

NC

10

.01uF

SHORT

E1503DNP

7

0

R1506

ADDR[24:0]

ADDR(13)

ADDR(14)

DOC_IRQ

SDRAM_CASb

SDRAM_CSb

DQMH

FLASH_DOC_GPU_OEb

FLASH_RWb_GPU_EBHb

DOC_GPU_EBLb

DOC_CSb

FLASH_CLK

DATA[31:0]

SDRAM_CKE

PCAP_RESETb

SDRAM_MA[11:10]

SDRAM_CLK

SDRAM_WEb

SDRAM_RASb

DQML

background image

MFG CTRL CHK:

QA CHK:

REV:

Drawing Number:

Page:

TITLE:

Size:

Engineer:

Drawn by:

R&D CHK:

DOC CTRL CHK:

Of:

Changed by:

Time:

Date:

NC

64MB FLASH

TARAZED

P4

8:54:35 am

1st JULY 2005

ARC127

4

D

2

1

MOTOROLA CONFIDENTIAL PROPRIETARY

B

10

20

A

3

C

11

18

4

16

18

V_FLASH_IO

NC

NC

8

6

14

12

NC

NC

V_FLASH_IO

5

7

C1302

0.10uF

19

7

5

15

3

VLVIO_1.875V

C1305

0.10uF

23

16

25

26

14

V_FLASH

VPOG_LVIO_1.875V

1

IN_A

2

IN_B

4

OUT_Y

5

VCC

24

19

17

2

IN_B

4

OUT_Y

5

VCC

5114007M44

NL17SV08

U1302

3

GND

NC

5114007M44

NL17SV08

U1301

3

GND

1

IN_A

NC

NC

NC

NC

NC

V_FLASH_IO

NC

22

TP_FLASH_CSb

1

V_FLASH_IO

0

NC

NC

NC

V_FLASH

NC

V_FLASH_IO

NC

NC

NC

NC

C1306

NC

NC

NC

NC

NC

NC

0.10uF

SHORT

E1303

NC

21

SHORT

E1300

8

NC

NC

NC

NC

NC

NC

4

6

NC

NC

NC

V_FLASH

V_FLASH_IO

12

1

2

0.10uF

C1307

17

NC

C1309

0.10uF

WE

13

10

20

27

29

30

B8

VSSQ3

VSSQ4

B10

P3

VSSQ5

VSSQ6

P5

P8

VSSQ7

P10

VSSQ8

L4

WAIT

E3

VSS3

L7

VSS4

G11

VSS5

K11

VSS6

F4

VSS7

J1

VSS8

K4

VSS9

B3

VSSQ1

B5

VSSQ2

B7

VCCQ3

B9

VCCQ4

P2

VCCQ5

P4

VCCQ6

P7

VCCQ7

P9

VCCQ8

E6

VSS1

E7

VSS2

L6

P1

RFU5

C6

N6

RFU6

L8

RFU7

B11

RFU8

F11

RFU9

VCCQ1

B2

B4

VCCQ2

RFU25

L11

RFU26

E1

RFU27

F1

RFU28

RFU29

C11

H1

RFU3

RFU30

D11

RFU31

L3

RFU4

RFU18

D1

RFU19

G1

RFU2

C1

RFU20

RFU21

E9

RFU22

H8

G4

RFU23

F5

RFU24

E11

RFU10

M11

RFU11

H11

RFU12

J11

RFU13

K1

RFU14

N11

RFU15

N1

RFU16

L1

RFU17

M1

L5

FVCC5

P6

FVCC6

M6

FVPP

H4

F_CLK

E4

F_RST

D6

F_WP1

OE

J8

B1

RFU1

P11

DU6

A2

DU7

DU8

A1

G8

F1_CE

B6

FVCC1

E5

FVCC2

F8

FVCC3

FVCC4

K8

M7

N5

D8

M5

D9

R1

DU1

R2

DU2

R10

DU3

R11

DU4

A11

DU5

A10

D29

D3

M9

D3

D30

C2

D2

D31

D4

N8

M8

D5

N7

D6

D7

D20

D21

D8

C7

D22

D7

D23

C5

D24

D5

D25

C4

D26

D4

D27

C3

D28

M2

D14

N2

D15

D16

C10

D10

D17

C9

D18

D9

D19

N9

D2

C8

J9

A9

J4

ADV

N10

D0

M10

D1

N4

D10

M4

D11

N3

D12

M3

D13

A25

G10

A26

E8

A27

L2

A3

K2

A4

J2

A5

H2

A6

L9

A7

K9

A8

G3

A19

H3

A2

K3

A20

J3

G9

A21

H9

A22

F9

A23

E10

A24

F10

A10

J10

A11

K10

A12

L10

A13

A14

E2

F2

A15

G2

A16

F3

A17

A18

23

2

NC

U1300

5199187J01

PF48F4400L0YBP0

H10

20

22

31

28

3

24

15

9

10

11

13

0.10uF

NC

NC

0.10uF

C1304

9

V_FLASH_IO

NC

C1301

FLASH_CSb

21

FLASH_LBAb

FLASH_CLK

FLASH_RWb_GPU_EBHb

FLASH_DOC_GPU_OEb

PCAP_RESETb

FLASH_CS1b

FLASH_CS2b

DATA[31:0]

FLASH_CS0b

FLASH_CS0b

FLASH_CS0b

FLASH_ECBb_GPU_WAITb

ADDR[24:0]

background image

POG 1.0

DSP Interfaces

MFG CTRL CHK:

QA CHK:

REV:

Drawing Number:

Page:

TITLE:

Size:

Engineer:

Drawn by:

R&D CHK:

DOC CTRL CHK:

Of:

Changed by:

Time:

Date:

U1000 Development

C

B

A

MOTOROLA CONFIDENTIAL PROPRIETARY

U1000 Production

13

20

5199169K06

5199169K05

D

1

2

3

4

6

NC

7

20th July 2005

4:24:18 pm

P4

TARAZED

POG DSP Interface

ARC127

IN_B

4

OUT_Y

5

VCC

VLVIO_1.875V

3

NL17SZ32
5113837M42

U1161

GND

3

2

IN_A

1

2

6

7

TP_CLK_13M

NC

2

NC

POG_LVIO

U2

TX_DATA_5

U3

TX_DATA_6

U1

TX_DATA_7

V1

TX_FRAME

M4

VCCA_CKIH

E19

P3

RX_DATA_7

N4

RX_FRAME

N2

STBY1

F7

TX_DATA_0

T1

TX_DATA_1

P5

TX_DATA_2

T2

TX_DATA_3

T3

TX_DATA_4

B6

NVCC_39_ASAP

Y8

NVCC_42_DSPGPIO

W4

PA_ENABLE

N3

RX_DATA_2

R5

RX_DATA_3

N7

RX_DATA_4

R4

RX_DATA_5

P4

RX_DATA_6

C8

MQSPI1_DO2

D8

MQSPI1_SPI_CS_0

A8

MQSPI1_SPI_CS_1

C9

MQSPI1_SPI_CS_2

D9

NVCC_28_BBIF

R2

NVCC_29_BBIF_BBP

N1

NVCC_34_MQSPI_L1T1

C10

NVCC_35_MQSPI_L1T1

A5

L1T1_TOUT1_5

C7

L1T1_TOUT1_6

D7

L1T1_TOUT1_9

B4

MQSPI1_CK1

A7

MQSPI1_CK2

B8

MQSPI1_DI1

E8

MQSPI1_DI2

F8

MQSPI1_DO1

E6

L1T1_TOUT1_10

C4

L1T1_TOUT1_11

D5

L1T1_TOUT1_12

C5

L1T1_TOUT1_13

B5

L1T1_TOUT1_14

B7

L1T1_TOUT1_2

G7

L1T1_TOUT1_3

D6

L1T1_TOUT1_4

Y4

GPIO18

W5

GPIO19

V5

GPIO20

U5

GPIO21

R6

GPIO22

T5

GPIO23

Y3

L1T1_TOUT1_0

A4

L1T1_TOUT1_1

D20

CLKSEL1

E7

CLK_CHIPX8

M3

GPIO12

V6

GPIO13

W6

GPIO14

T6

GPIO15

P7

GPIO16

P6

GPIO17

W9

BBP_RX_CLK

M5

BBP_RX_DATA

N6

BBP_RX_FRAME

P2

BBP_TX_CLK

P1

BBP_TX_DATA

N5

BBP_TX_FRAME

R1

CKIH1

E17

CKIH2

U1000
DSPIO

5199169K06

A_SC0

T9

A_SC1

U9

A_SC2

Y9

A_SCK

V9

A_SRD

R9

A_STD

100K

R1040

0

TP_BB_CLK_15_36M

4

1

POG_LVIO

POG_LVIO

3

VLVIO_1.875V

POG_LVIO

POG_LVIO

4

BLUE_CLK_EN

5

5

TP_GPIO23

BB_CLK_15_36M

BBP_TX_FRAME

BDX

BDX

BCLKX

BCLKX

BFSR

BFSR

BDR

BDR

BCLKR

BCLKR

ASAP_TX

ASAP_TX

ASAP_RX

ASAP_RX

ASAP_CLK

ASAP_CLK

ASAP_FS

ASAP_FS

A_SC1

A_SC0

TX_RX_ERROR

PS_CLK_EN

PS_CLK_EN

POG_CLK_EN

POG_CLK_EN

HAR_TX_PREKEY

HAR_TX_PREKEY

HAR_MB_RX_ACQ

HAR_MB_RX_ACQ

HAR_MB_RX_SLOT

HAR_MB_RX_SLOT

DMCS

DMCS

HAR_MB_RX_ON

HAR_MB_RX_ON

STBY_MB

STBY_MB

TX_RAMP

TX_RAMP

HAR_WB_RX_SLOT

HAR_WB_RX_SLOT

DSP_GPIO23

AOC_PWR_UP

WB_SPIWB_CE

WB_SPIWB_CE

PS_SPIMB_CE

PS_SPIMB_CE

GPIO16

GPIO15

HAR_RESETb

HAR_RESETb

BBIF_CLK

BBIF_CLK

WB_VCO_SF_EN

WB_VCO_SF_EN

BB_CLK_13M

PS_SPIWB_CE

HAR_SPIMB_CE

HAR_SPIMB_CE

HAR_SPIWB_CE

HAR_SPIWB_CE

MB_SPI_MOSI

MB_SPI_MOSI

WB_SPI_MOSI

WB_SPI_MOSI

MB_SPI_MISO

MB_SPI_MISO

WB_SPI_MISO

WB_SPI_MISO

MB_SPI_CLK

MB_SPI_CLK

WB_SPI_CLK

WB_SPI_CLK

MB_RX_VCO_EN

MB_RX_VCO_EN

L1T1_TOUT1_6

HAR_WB_RX_ON

HAR_WB_RX_ON

HAR_WB_RX_ACQ

HAR_WB_RX_ACQ

HAR_TX_SLOT

HAR_TX_SLOT

BBIF_RX[7:2]

BBIF_RX[7:2]

BBIF_TX[7:0]

BBIF_TX[7:0]

BBIF_TX_FRAME

BBIF_TX_FRAME

STBY_WB

STBY_WB

BBIF_RX_FRAME

BBIF_RX_FRAME

PS_SPIWB_CE

background image

POG

External Memory Interface

Test Interface

MFG CTRL CHK:

QA CHK:

REV:

Drawing Number:

Page:

TITLE:

Size:

Engineer:

Drawn by:

R&D CHK:

DOC CTRL CHK:

Of:

Changed by:

Time:

Date:

2:21:53 pm

20th July 2005

ARC127

JTAG CONNECTOR

PINS 6 & 7 CAN BE USED FOR

EXTERNAL CONNECTION TO B+

4

U1000 Production

U1000 Development

5199169K06

5199169K05

D

12

20

B

A

MOTOROLA CONFIDENTIAL PROPRIETARY

1

2

3

C

J1900DNP

11

18

POG Memory & Test Interface

TARAZED

P4

J1900DNP

9

J1900DNP

10

J1900DNP

7

J1900DNP

8

J1900DNP

5

J1900DNP

6

J1900DNP

3

J1900DNP

4

J1900DNP

1

J1900DNP

2

11

3

13

11

NC

J1900DNP

G2

J1900DNP

G1

27

12

NC

21

NC

3

31

20

16

6

8

14

R1002DNP

23

3

GND

5

VCC

POG_LVIO

0

U1001

NL17SV32

5114007B07

1

2

4

U1001
PWR_GND

19

23

22

11

TEST

Y16

TMS

R13

TRST_B

22

15

SDCKE1

D14

SDWE

A18

S_CAS_B

D16

S_CLOCK

B18

S_RAS_B

W16

TCK

U14

TDI

TDO

V15

T14

NVCC_7_EIM

J20

NVCC_8_EIM

A19

NVCC_9_EIM

C17

OE_B

T15

RDY_B

B16

RP_B

F15

RW_WE_B

B15

SDCKE0

C15

NVCC_1_EIM

Y15

NVCC_24_TEST

Y17

NVCC_25_TEST

Y19

NVCC_2_EIM

NVCC_3_EIM

J19

L19

NVCC_4_EIM

P20

NVCC_5_EIM

G18

NVCC_6_EIM

A17

LBA_B

B17

MA10

F14

MA11

Y18

MCKO

U16

MDO0

P14

MDO1

V17

MSE0_B

T18

NVCC_0_EIM

T20

EB_B_DQM2

F17

EB_B_DQM3

E15

ECB_B

V16

EMU0_B

U15

EMU1_B

C16

ENDN_SEL

R14

EVTI_B

EVTO_B

W18

K18

DATA5

H19

DATA6

J16

DATA7

J17

DATA8

J18

DATA9

T13

DE_B

F20

EB_B_DQM0

H16

EB_B_DQM1

G17

DATA26

M17

DATA27

M16

DATA28

M13

DATA29

DATA3

J14

N19

DATA30

N18

DATA31

J15

DATA4

G20

DATA19

H18

DATA2

L18

DATA20

L16

DATA21

M15

DATA22

M14

DATA23

N20

DATA24

M19

DATA25

M18

DATA11

K15

DATA12

K14

DATA13

K20

DATA14

L13

DATA15

L20

DATA16

L15

DATA17

DATA18

L14

L17

CS1_B

H14

CS2_B

E20

CS3_B

F19

CS4_B_CSD0

H15

CS5_B_CSD1

J13

DATA0

G19

DATA1

K17

DATA10

K16

ADDR6_MA5

P15

ADDR7_MA6

R19

ADDR8_MA7

R18

ADDR_9_MA8

BCLK

K13

D15

BOOTMOD_0

E14

BOOTMOD_1

G16

CS0_B

F18

ADDR21

W20

ADDR22

U17

ADDR23

T16

ADDR24

P19

ADDR2_MA1

N16

ADDR3_MA2

N14

ADDR4_MA3

P18

ADDR5_MA4

P17

ADDR14_SDBA3

R17

ADDR15_SDBA4

R16

ADDR16_SDIBA0

T17

ADDR17_SDIBA1

V20

ADDR18_SDIBA2

V19

ADDR19_SDIBA3

N15

ADDR1_MA0

ADDR20

U18

W19

N17

ADDR0

P16

ADDR10_MA9

U20

ADDR11_SDBA0

T19

ADDR12_SDBA1

R15

ADDR13_SDBA2

U19

POG_LVIO

5199169K06

MEM_TEST

U1000

12

5

4

21

26

19

J1900DNP

30

29

10

NC

10

16

9

24

0

POG_LVIO

14

J1900DNP

15

J1900DNP

NC

J1900DNP

13

J1900DNP

1

TP_EMU0B

1

2

J1900DNP

17

TP_EMU1B

16

20

1

7

24

2

17

17

25

14

6

9

12

0

1

13

5

15

18

10

4

28

8

7

FLASH_CS2b

GPU_CSb

DOC_CSb

EMU1b

EMU0b

DAI_FS

DAI_SRDA

PCAP_RESETb

TMS

TDI

TRSTb

TDO

DEb

DAI_SCKA

WATCHDOG

DAI_STDA

TCK

DEb

TRSTb

TMS

TDO

TDI

TCK

GPU_RWb

GPU_RWb

FLASH_RWb_GPU_EBHb

ADDR[24:0]

SDRAM_MA[11:10]

DATA[31:0]

SDRAM_RASb

SDRAM_CLK

SDRAM_CASb

SDRAM_WEb

SDRAM_CKE

RDYb

FLASH_DOC_GPU_OEb

MSE0b

MDO1

MDO0

MCKO

FLASH_LBAb

EVTOb

EVTIb

DQML

DQMH

SDRAM_CSb

FLASH_CS1b

FLASH_CS0b

FLASH_CLK

EB_B_DQM2

FLASH_ECBb_GPU_WAITb

DOC_GPU_EBLb

NC_4_6

NC_4_6

background image

POG

MCU & IPCM Peripherals

MFG CTRL CHK:

QA CHK:

REV:

Drawing Number:

Page:

TITLE:

Size:

Engineer:

Drawn by:

R&D CHK:

DOC CTRL CHK:

Of:

Changed by:

Time:

Date:

2

1

14

20

5199169K05

B

POG_HVIO

POG Peripheral Int

TARAZED

P4

5:01:37 pm

20th July 2005

ARC127

A

4

D

C

U1000 Production

U1000 Development

3

MOTOROLA CONFIDENTIAL PROPRIETARY

5199169K06

VHVIO_2.775V

TP_OPT1

3

NC

POG_HVIO

POG_LVIO

E1000
SHORT

NC

10K

NC

5

NC

1

R1076

100K

R1075

R1061

0

R1033DNP

0

NC

POG_LVIO

0

R1072

0

2

4

POG_HVIO

R1071

NC

POG_HVIO

NC

TP_CK02

NC

5

NC

2

NC

POG_LVIO

1

NC

NC

NC

NC

NC

NC

E1001
SHORT

TP_DAI_FS

TP_DAI_STDA

TP_DAI_SCKA

0

6

POG_HVIO

POG_LVIO

3

NC

7

TP_DAI_SRDA

6

7

NC

NC

NC

NC

NC

NC

TP_OPT2

V_SRD

W2

V_STD

G14

WDOG_RST

NC

NC

USB_TXEN_B

V14

USB_VMOUT

W15

USB_VPIN

B20

USER_OFF

W3

V_SC0

T4

V_SC1

U4

V_SC2

Y2

V_SCK

V3

SIMPD0_0

C14

SIMPD0_1

C18

STO

C12

SVEN0_0

B12

SVEN0_1

U10

TXD1

D10

TXD2

U12

TXD3

U13

RST0_0

K3

RST0_1

R10

RTS1_B

B11

RTS2_B

W14

RTS3_B

T10

RXD1

E9

RXD2

V13

RXD3

E13

NVCC_41_MCUGPIO

W1

NVCC_43_VSAP

L1

NVCC_44_MMC

A12

NVCC_49_SVEN

D17

POWER_FAIL

E16

RESET_IN

W12

RI1_B

F9

RI2_B

H3

NVCC_30_KEY

D1

NVCC_31_LCD

G1

NVCC_32_LCD

H1

NVCC_33_SIM0

Y14

NVCC_36_USB

W11

NVCC_37_UART1_BATIO

A10

NVCC_38_UART2

A15

NVCC_40_GQSPI_IRDA

W7

MMC_CLK

L2

MMC_CMD

L3

MMC_CMD_OD_EN

L5

MMC_DAT

P10

MUXCTL

G15

NVCC_10_CLKS_RSTS

Y13

NVCC_12_UART3

J1

NVCC_26_SIM1

A2

LCD6

E1

LCD7

F4

LCD8

G5

LCD9

H5

LCD_AC_LOE

G4

LCD_CLK

G3

LCD_FRAME_VSYNC

H6

LCD_LOAD_HSYNC

L4

LCD0

H4

LCD1

F3

LCD10

F2

LCD11

J6

LCD2

J5

LCD3

E3

LCD4

F5

LCD5

E2

KEY_ROW0

D2

KEY_ROW1

C2

KEY_ROW2

B1

KEY_ROW3

C1

KEY_ROW4

D3

KEY_ROW5

F6

KEY_ROW6

C3

KEY_ROW7

G2

GQSPI_CS_1

F11

GQSPI_CS_2

D13

IRDA_RX1

B14

IRDA_TX1

E5

KEY_COL0

B2

KEY_COL1

D4

KEY_COL2

B3

KEY_COL3

E4

GPIO9

A14

GQSPI1_CK

F12

GQSPI1_DI

F13

GQSPI1_DO

C13

GQSPI2_CK

B13

GQSPI2_DI

E12

GQSPI2_DO

D12

GQSPI_CS_0

G11

GPIO24

R11

GPIO25

V8

GPIO3

W8

GPIO4

Y7

GPIO5

R7

GPIO6

T7

GPIO7

U7

GPIO8

V7

DSR2_B

U11

DTR1_B

E10

DTR2_B

R8

GPIO0

T8

GPIO1

U6

GPIO10

Y6

GPIO11

U8

GPIO2

Y12

CTS3_B

J4

DATA0_RX_0

K2

DATA0_RX_1

J3

DATA0_TX_0

K5

DATA0_TX_1

T11

DCD1_B

D11

DCD2_B

V12

DSR1_B

E11

BATT_LINE

C19

CKIL

E18

CKO1

C20

CKO2

H2

CLK0_0

K4

CLK0_1

V11

CTS1_B

C11

CTS2_B

T12

POG_LVIO

5199169K06

MCU_IPCM_IO

U1000

V10

4

POG_HVIO

VSIM_POG

NC

NC

NC

0

MMC_CLK

DAI_SCKA

DAI_FS

DAI_STDA

DAI_SRDA

ROW[7:0]

COL[4]

COL[7:0]

COL[5]

COL[6]

COL[7]

COL[4]

COL[5]

COL[6]

COL[7]

VHVIO_2.775V

STEREO_CLK_POG

STEREO_CLK_POG

STEREO_FS_POG

STEREO_FS_POG

PCAP_CS

USER_OFF_POG

STO

PCAP_RESETb

PCAP_RESETb

BLUETOOTH_INTb

BLUETOOTH_INTb

WATCHDOG

WATCHDOG

GPU_INTb

LOUD2_EN

GPU_RESETb

EMU_CS

EMU_INT

EL_PANEL_EN

BATT_FDBK_SW

DOC_IRQ

SD_GP0

BLUE_SHUTDOWN

MUXCTL

MMC_DAT

MMC_CMD

ROW(5)

ROW(4)

ROW(3)

ROW(2)

ROW(1)

ROW(0)

COL(3)

COL(2)

COL(1)

COL(0)

IRDATX1

IRDARX1

BB_SPI_MOSI

BB_SPI_MISO

BB_SPI_CLK

PCAP_INT

SIMPD0_0

DATA0_RX_1

BLUE_CTSb

BLUE_CTSb

LOGIC_SENSE

FLIP_DETECT

SIM_CLK

SIM_IO

SIM_RST

BATT_IO

PCAP_CLK_IN

CLK_32_768K_BUFF

STEREO_TX

STEREO_TX

NC_7

NC_5

BATT_DETB

TXD_VPOUT

BLUE_TX

USB_TXENb

USB_VMOUT

USB_VPIN

SVEN0_1

VSIMC_EN

VSIMC_EN

SIMPD0_1

BLUE_RX

RXD_VMIN

BLUE_RTSb

RTSb_XRXD

RI2b

BLUETOOTH_WAKEb

BLUETOOTH_WAKEb

ROW(7)

ROW(6)

background image

CORE POWER and GROUND

POG

MFG CTRL CHK:

QA CHK:

REV:

Drawing Number:

Page:

TITLE:

Size:

Engineer:

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Date:

1st JUNE 2005

3:23:21 pm

P4

TARAZED

POG Power Interface

ARC127

MOTOROLA CONFIDENTIAL PROPRIETARY

U1000 Production

U1000 Development

5199169K06

5199169K05

3

1

2

4

D

C

B

A

11

20

0.1uF

C1066

POG_LVIO

VSIM_POG

0.1uF

C1069

VMAIN_1.55V

0.1uF

C1020

C6114

POG_HVIO

POG_HVIO

A6

QVCC_8

QVCC_9

B9

UVCC

Y11

XVCC

A11

VHVIO_2.775V

0.1uF

QVCC_21

A9

QVCC_22

C6

F1

QVCC_23

QVCC_3

W13

R20

QVCC_4

QVCC_5

K19

QVCC_6

D18

A13

QVCC_7

Y5

QVCC_14

QVCC_15

R3

QVCC_16

Y10

B10

QVCC_17

A3

QVCC_18

QVCC_19

A16

W10

QVCC_2

M20

QVCC_20

QGND_7

H7

QGND_8

G12

H10

QGND_9

W17

QVCC_1

QVCC_10

H17

M1

QVCC_11

QVCC_12

K1

J2

QVCC_13

QGND_21

G8

G13

QGND_22

QGND_23

P8

QGND_24

H11

L10

QGND_3

K7

QGND_4

QGND_5

J9

J11

QGND_6

QGND_14

M9

N10

QGND_15

M11

QGND_16

QGND_17

G9

QGND_18

F10

H9

QGND_19

QGND_2

M10

K11

QGND_20

D19

NGND_7

H8

J8

NGND_8

J10

NGND_9

L8

QGND_1

J12

QGND_10

QGND_11

P11

QGND_12

N9

N12

QGND_13

NGND_4

K10

NGND_40

H13

M7

NGND_41

NGND_42

M8

NGND_43

V4

N13

NGND_44

K12

NGND_5

NGND_6

P9

P13

NGND_32

NGND_33

P12

G6

NGND_34

G10

NGND_35

NGND_36

L12

NGND_37

L9

H12

NGND_38

M12

NGND_39

L11

NGND_24

NGND_25

V18

NGND_26

N8

V2

NGND_28

N11

NGND_29

J7

NGND_3

NGND_30

R12

NGND_31

NC5

A1

A20

NC6

Y1

NC7

NGND_0

K6

NGND_1

K8

B19

NGND_10

NGND_12

L7

K9

NGND_2

U1000

H20

FVCC

F16

GNDA

M2

NC1

NC2

L6

NC3

M6

Y20

NC4

0

POG_LVIO

VPOG_LVIO_1.875V

5199169K06

PWR_GND

0

R1011

R1010

C1068
0.1uF

C1070

C1071
0.1uF

C1073

0.1uF

0.1uF

0.1uF

0.1uF

C1072

0.1uF

C1074

C1075

0.1uF

C1063

C1062
0.1uF

0.1uF

C1061

C1060
0.1uF

0.1uF

C1059

C1057

C1058
0.1uF

0.1uF

0.1uF

0.1uF

C1055

C1056

0.1uF

0.1uF

C1053

C1054

C1052
0.1uF

0.1uF

C1051

C1050
0.1uF

C1010
1.0uF

NC

NC

VMAIN_1.55V

NC

0.1uF

C6113

C6112
0.1uF

C6111
0.1uF

C1065

0.1uF

C6110

0.1uF

0.1uF

C1064
0.1uF

NC_5

NC_4_6

NC_7

C1067

background image

MFG CTRL CHK:

QA CHK:

REV:

Drawing Number:

Page:

TITLE:

Size:

Engineer:

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D

7

Nav Down

9

6

Camera

ROW0

Triflash-R Connector

Back

ROW3

*

SIM Connector

1

2

Keypad

Vol Down

A

B

4

3

4

COL [4 - 7] RESERVED FOR FUTURE USE

20

Nav Right

Send

Vol Up

ROW6

VA/VR

0

Nav Center

1

2

16

C

3

COL 3

Browser

2 POLE IMPLEMENTATION FOR THE KEYPAD AND SIDE KEYS

#

COL 1

COL 2

Nav Up

COL 0

ROW2

21st July 2005

3:05:27 pm

P4

TARAZED

ARC127

SMART

5

Misc Connectors

Video Call

MOTOROLA CONFIDENTIAL PROPRIETARY

Connector

ROW7

Nav Left

Clear

ROW4

Send

8

ROW1

ROW5

Voice Call

Right Soft

Left Soft

75K

R3901DNP

R3900
0

8

C3911DNP
1.0uF

10

B1

GND1

B2

GND2

B3

GND3

2

A5

FLTR5

A6

FLTR6

C1

FLTR1

C2

FLTR2

C3

FLTR3

C4

FLTR4

C5

FLTR5

C6

FLTR6

FL5104

A1

FLTR1

A2

FLTR2

A3

FLTR3

A4

FLTR4

FLTR2

C3

FLTR3

C4

FLTR4

C5

FLTR5

C6

FLTR6

B1

GND1

B2

GND2

B3

GND3

4889526L12

A1

FLTR1

A2

FLTR2

A3

FLTR3

A4

FLTR4

A5

FLTR5

A6

FLTR6

C1

FLTR1

C2

C6

FLTR6

B1

GND1

B2

GND2

B3

GND3

4889526L12

FL5102

A4

FLTR4

A5

FLTR5

A6

FLTR6

C1

FLTR1

C2

FLTR2

C3

FLTR3

C4

FLTR4

C5

FLTR5

4889526L12

FL5100

A1

FLTR1

A2

FLTR2

A3

FLTR3

0

R3923DNP

12

22

J5100

0989721N01

13

VSIM

1

10pF

C5502DNP

J5500

3985602F01

4

GND

5

NC

3

SIM_CLOCK

6

SIM_DATA

2

SIM_RESET

11

100K

R5117

0

R3922

R3924

0

4

5

6

R3925DNP

0

1

4

0

5

9

R3921

7

VSIM_CARD

1

NC

3

17

21

1.0uF

VHVIO_2.775V

6

B+

C5503

C5501DNP

10pF

VS3900
4813979M41

R3903

VMMC_2.775V

0

10K

PIN7

PIN8

6

10K

R3904

DETECT_SW

GND1

GND2

PIN1

PIN2

PIN3

PIN4

PIN5

PIN6

J3900

0989801Y01

COMMON

10pF

C5505DNP

14

NC

NC

NC

15

7

2.7MEG

R3906

4

33pF

C3906

R3905
10K

VS5500
4813979M41

10K

R3902DNP

2

10pF

3

C5500

3

24

16

5

1

2

VSIM_CARD

VHVIO_2.775V

20

R3920DNP

0

R5501
5.6K

18

19

C3910
0.10uF

7

23

0

ROW[1]

ROW[3]

ON_OFF_ENDb_C

FLIP_DETECT_C

KEY5

KEY6

KEY4

KEY2

KEY1

KEY3

ROW[5]

ROW[6]

ROW[4]

ROW[2]

KEY11

KEY10

KEY7

KEY0

COL[0]

COL[1]

COL[3]

COL[2]

ROW[7]

ROW[0]

SD_CMD

SD_CLK

MMC_DAT

SD_D0

MMC_CLK

MMC_CMD

COL[7]

COL[5]

COL[4]

COL[6]

FLIP_DETECT

ON_OFF_ENDb

COL[7:0]

COL[4]

COL[4]

COL[5]

COL[5]

COL[6]

COL[6]

COL[7]

COL[7]

KEY8

KEY9

KEY7

SIM_RST

SIM_RST

SIM_CLK

SIM_CLK

SIM_IO

SIM_IO

VSIM_CARD

VSIM_CARD

SD_GP0

ROW[7:0]

EL_PANEL_EN

KEY10

KEY3

KEY11

KEY1
KEY2
KEY4

KEY9

KEY6

KEY8

KEY5
KEY0

background image

MFG CTRL CHK:

QA CHK:

REV:

Drawing Number:

Page:

TITLE:

Size:

Engineer:

Drawn by:

R&D CHK:

DOC CTRL CHK:

Of:

Changed by:

Time:

Date:

C

1

VHVIO_2.775V

EMU, Battery

TARAZED

P4

3:12:01 pm

20th July 2005

ARC127

D

18

PLACE CLOSE TO PINS OF J5000

MOTOROLA CONFIDENTIAL PROPRIETARY

B

PLACE CLOSE TO PINS

2

MINI-AB USB

4

A

3

20

Main Battery

C5005
2.2uF

4.7uF

C5011

g4

4

B+

g3

g1

NC

NC

TP_GROUND

NC

NC

TP_SPI_CS

TP_SPI_CLK

TP_SPI_MISO

TP_SPI_MOSI

4805585Q23

SI8401DB

2

3

1

4

D3961

MBRM120ET3

4809653F10

Q3964

0.10uF

C5013

0.1uF

C5003

C3960
10uF

J5000

0988486Y02

1

C3961
10uF

NC

2

3

1

4

SI8405DB

4888585Y01

Q3963

20m

4809788E21

6.8V

VS5400

R3961

R4904
330K

100

R5402

C5006

1.0uF

10K

29

VBUS

1

VC

4

VCCIO

14

VM

13

VP

24

VREG

R4907

7

SPICLK_12CSCL

6

SPICS_12CADR0

9

SPIMISO_12CSDA

SPIMOSI_12CADR1

8

20

SPKR_L

18

SPKR_R

12

TXENB

USB_EN

27

15

ID

ISENSE

32

19

MIC

33

PWR_ON

RCV

28

25

REG_5V_IN

11

RESET_B

17

SEO_VM

22

DGND

21

DM

23

DP

EMU_INT

10

GND

G1

GNDREF

3

40

I2C_SPIF_SEL

ICHRG

5

BG_BYP

2

26

BOOTMODE

35

BP

34

BP_FET

30

CHRGCTRL

39

CHRGMODE

38

CHRG_LED

16

DAT_VP

5109773F18

MC13883

U5000

31

AGND

37

BATTP

36

BATT_FET

C5009

1.0uF

GND

3

IN_A

2

NC

1

OUT_Y

4

VCC

5

B+

MC74VHC1GT50

U5002

C5014

1.0uF

TP_BP_FET

0.1

0689774Y02

C5008

R3960

C4903

g2

33pF

VBOOST_5.5V

VBOOST_EMU

.01uF

22

R5011

22

R5012

3

PIN3

4

PIN4

VHVIO_2.775V

M5400

3989978Y01

1

PIN1

2

PIN2

2

3

1

4

VS5001

MMSZ5246B

16V

4813977C26

Q3960

SI8401DB

4805585Q23

C5021DNP
33pF

C5020DNP
33pF

E5000

SHORT

BATT_I

39nH

L5000

VBOOST_EMU

4805585Q23

SI8401DB

Q3961

2

3

1

4

2

3

C5007

33pF

C5015

R5002
1

33pF

BATT_I

4809788E22

8.2V

VS4302

R5003
1

A3

C3

2488090Y20

L5002

39nH

VS5003
CSPESD304G

15KV

4809948D49

B2

A1

C1

C5004
2.2uF

VHVIO_2.775V

5

22K

R5401

4.7K

R4903

VHVIO_2.775V

NC

TP_BATT_FET

TP_CHRGCTRL

L5001

39nH

BATT_THERM

USB_PWR

EMU_CS

ISENSE

USB_PWR

USB_PWR

BB_SPI_MISO

BB_SPI_CLK

B+

DM_TXD

DP_RXD

USB_ID

ISENSE

BB_SPI_MOSI

USB_TXENB

USB_ID

USB_ID

BATT_P

BATT_P

PCAP_RESETb

BATT_FET

BATT_FET

THERM_BIAS

AD4

AD6

EMU_INT

EMU_PWR_ON

HS_SPKR_R

HS_SPKR_L

USB_VPIN

RXD_VMIN

DP_RXD

DP_RXD

BP_FET

BATT_IO

BATT_IO

DM_TXD

DM_TXD

AUDIO_IN

USB_VMOUT

RTSB_XRXD

TXD_VPOUT

CHRGCTRL

CHRGCTRL

BP_FET

background image

MFG CTRL CHK:

QA CHK:

REV:

Drawing Number:

Page:

TITLE:

Size:

Engineer:

Drawn by:

R&D CHK:

DOC CTRL CHK:

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Flip Connector

TARAZED

P4

5:25:05 pm

20th July 2005

ARC127

MOTOROLA CONFIDENTIAL PROPRIETARY

A

B

C

17

HINGE FLEX GROUND CONTACT

20

4

D

3

2

1

J5200

38

C5214
0.1uF

9

J5200

7

C5208

J5200

12

33pF

43

J5200

42

J5200

J5200

39

J5200

41

J5200

J5200

G2

J5200

48

J5200

47

J5200

46

J5200

45

10

VPOG_LVIO_1.875V

J5200

29

J5200

31

J5200

35

J5200

16

G1

J5200

14

M5200

0.1uF

C5212

J5200

B+

3

2

VHVIO_2.775V

J5200

24

J5200

8

22

J5200

1

0.1uF

C5211

J5200

32

J5200

10

J5200

33

J5200

J5200

30

C5213
0.1uF

B7

11

21

CTGND

GND

10

19

OE

TR

1

20

VCC

A7

9

B0

18

B1

17

16

B2

B3

15

B4

14

B5

13

B6

12

5114007M40

2

A0

A1

3

4

A2

A3

5

A4

6

A5

7

A6

8

U5201

74VCXH245MNR2G

33pF

VS5201

15KV

4809948D49

13

GND1

14

GND2

GND3

G1

C5207

5

FLTR5

6

FLTR6

FLTR1

12

11

FLTR2

10

FLTR3

9

FLTR4

8

FLTR5

7

FLTR6

4885534E09

1

FLTR1

2

FLTR2

3

FLTR3

4

FLTR4

10

FLTR3

9

FLTR4

8

FLTR5

FLTR6

7

13

GND1

14

GND2

G1

GND3

NUF6401

FL5203

1

FLTR1

2

FLTR2

3

FLTR3

FLTR4

4

5

FLTR5

6

FLTR6

12

FLTR1

11

FLTR2

5

1

4885534E09

NUF6401

FL5204

J5200

40

12

NC

26

J5200

5

20

J5200

3

J5200

J5200

27

J5200

VCAM_2.6V

7

VPOG_LVIO_1.875V

J5200

19

J5200

18

21

J5200

17

15

J5200

13

J5200

J5200

11

J5200

J5200

37

J5200

44

9

J5200

36

J5200

G3

J5200

49

G4

13

NC

NC

8

J5200

50

J5200

23

VPOG_LVIO_1.875V

J5200

25

J5200

15

NC

0

R5220DNP

0

R5221

VMAIN_1.55V

11

NC

SHORT

E5200

FLTR3

10

FLTR4

9

FLTR5

8

FLTR6

7

GND1

13

GND2

14

GND3

G1

FLTR1

1

FLTR2

2

FLTR3

3

FLTR4

4

FLTR5

5

FLTR6

6

FLTR1

12

FLTR2

11

J5200

28

FL5202

NUF6401

4885534E09

12

B7

11

21

CTGND

GND

10

OE

19

1

TR

20

VCC

8

A7

9

B0

18

B1

17

B2

16

15

B3

B4

14

B5

13

B6

2

A0

A1

3

A2

4

5

A3

A4

6

A5

7

A6

6

IN4

7

OUT1

8

OUT2

9

OUT3

10

OUT4

U5200

74VCXH245MNR2G
5114007M40

NFA21SL

FL5200

1

GND1

2

GND2

3

IN1

4

IN2

5

IN3

14

0

6

J5200

2

4

4

J5200

6

8

OUT2

9

OUT3

10

OUT4

J5200

34

J5200

1

GND1

2

GND2

3

IN1

4

IN2

5

IN3

6

IN4

7

OUT1

NFA21SL

FL5201

0.10uF

0.10uF

C5204

C5200

VS5202

15KV

4809948D49

C5201

0.10uF

C5202

GPU_DATA15_C

GPU_DATA6_C

FLASH_RWb_GPU_EBHb

DOC_GPU_EBLb

SD_CLK

SD_CMD

SD_D0

0.10uF

GPU_DATA5_C

GPU_DATA9_C

GPU_DATA3_C

GPU_DATA7_C

GPU_DATA1_C

GPU_DATA13_C

GPU_DATA8_C

GPU_DATA4_C

GPU_DATA0_C

GPU_DATA6

GPU_DATA9

GPU_DATA9

GPU_RESETb_R

GPU_DATA11_C

GPU_DATA10_C

GPU_DATA2_C

GPU_DATA12_C

GPU_DATA14_C

GPU_DATA3

GPU_DATA7

GPU_DATA1

GPU_DATA11

GPU_DATA10

GPU_DATA2

GPU_DATA12

GPU_DATA13

GPU_DATA8

GPU_DATA4

GPU_DATA0

GPU_DATA15

GPU_RESETb_C

GPU_EBHb_C

GPU_CSb

GPU_RESETb

FLASH_LIGHT

FLASH_SINK

GPU_DATA5

GPU_DATA13

GPU_DATA14

GPU_DATA7

GPU_DATA6

GPU_DATA15

GPU_DATA14

GPU_DATA5

GPU_EBLb_C

FLASDH_DOC_GPU_OEb_C

GPU_CSb_C

PS_CLK_MM

FLASH_DOC_GPU_OEb

GPU_IND_ADDR

GPU_INTb

GPU_INTB_C

PS_CLK_MM_C

GPU_IND_ADDR_C

GPU_DATA0

GPU_DATA12

GPU_DATA1

DATA[15:0]

GPU_DATA2

GPU_RWb

GPU_DATA8

GPU_DATA10

GPU_DATA3

GPU_DATA4

GPU_DATA11

EAR_SPKR-

EAR_SPKR+

background image

MFG CTRL CHK:

QA CHK:

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Drawing Number:

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7

8

8

1

2

8

20

F

E

1

D

B

A

3

3

E

4

C

D

C

5

6

7

ANTENNA CONNECTION

F

NC

NC

20th July 2005

4:18:03 pm

P4

TARAZED

Texas BlueTooth

ARC127

B

2

A

4

5

6

1.0uF

NC

NC

NC

GND2

G1

G2

GND3

NC

1

UNBAL

2

C5607

FL5650
DBF71C901

BAL1

4

5

BAL2

DC

3

GND1

6

NC

0.1uF

4.7uF

C5613

6.2pF

C5612

0.1uF

C5606

C5605DNP

C5610

VSSA4

G2

VSSA5

G1

VSSA6

F4

XTALM

E1

XTALP_FAST_CLK_IN

E2

100pF

VSS1

H7

VSS2

A5

VSS3

B8

VSS4

G8

VSS5

A2

VSSA1

H4

VSSA2

D1

VSSA3

F3

VDD_IN_OSC

H3

VDD_IN_RFIO

F1

VDD_IO1

D8

VDD_IO2_1

G7

VDD_IO2_2

A3

VDD_IO_SF1

H8

VDD_IO_SF2

B3

VLDO_OUT

G5

RFM

H2

RFP

H1

SLOW_CLK_IN

F6

TL_LDO_OUT

G4

TX_DBG

A8

VBAT

H6

VDD_IN_ANA

C2

VDD_IN_BB

F5

JTAG_TCK

D4

JTAG_TDI

C3

JTAG_TDO

E6

JTAG_TMS

B5

KA_OUT

G6

NSHUT_DOWN

E3

OSC_LDO_OUT

G3

RFIO_LDO_OUT

F2

IO14

B4

IO15

F7

IO1_EXT_CLK_REQ_IN

C6

IO2_SCL

B7

IO3_SDA

D5

IO4

A6

IO5

C4

IO7

C8

BGAP_I

A1

BGAP_V

B1

EMRST

D6

HCI_CTS

E8

HCI_RTS

E7

HCI_RX

E4

HCI_TX

E5

IO0_EXT_CLK_REQ_OUT

D7

ANA_LDO_OUT

D2

AUD_CLK

B6

AUD_FSYNC

A7

AUD_IN

C5

AUD_OUT

C7

BB_LDO_OUT_1

A4

BB_LDO_OUT_2

H5

BB_LDO_OUT_3

F8

NC

U5600
BRF6150

ANATEST1

B2

ANATEST2

C1

C5608

0.1uF

VBLUETH_1.875V

VLVIO_1.875V

NC

TP_BT_TX_DBG

0.1uF

100pF

C5604DNP

M5600

C5609

NC

NC

NC

NC

C5611
1.0uF

C5603

100pF

M5601

R5602

0

C5601DNP

BLUE_CLK_EN

BLUETOOTH_INTb

BT_RF_ANT

NC

NC

100pF

CLK_32_768K_BUFF

ASAP_RX

ASAP_CLK

ASAP_FS

ASAP_TX

BLUETOOTHCLK

BLUETOOTH_WAKEb

BLUE_SCAN_SYNC

BLUE_SHUTDOWNb

BLUE_RX

BLUE_TX

BLUE_CTSb

BLUE_RTSb

background image

PCAP2

SYMBOL

MFG CTRL CHK:

QA CHK:

REV:

Drawing Number:

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TITLE:

Size:

Engineer:

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B

(PrimSyn xtal+TCXO)

ALERT SPEAKER

MOTOROLA CONFIDENTIAL PROPRIETARY

(PrimSyn PLL)

3

for stereo or mono audio

(Harmony I/O, AlgaeMB SPI I/O)

4

7

A

(OneLifeWB SPI I/O, SW2 Dig)

19

(POG Core)

(BT I/O, GPU I/O)

4

2

20

(Harmony TX, SW2 TX, Sidekick)

1

U3000

D

(POG I/O, ATI LCD)

Vibrator

MIC

(Harmony Dig, PrimSyn Dig)

(GPU Core)

TO EMU ONE IC mux

3

TARAZED

PCAP2

P4

3:23:51 pm

20th July 2005

ARC127

5

(Harmony RX, OneLifeWB RX)

connected to GPIO7 from POG

(POG LVIO, Memory I/O)

6

D

C

E

E

(HSidekick, AlgaeMB TX)

(PrimSyn xtal+TCXO)

8

6

(SDRAM, Flash, Imager DSP)

8

1

A

5

C

2

(AlgaeMB RX)

B

7

C4102DNP

B+

B+

NC

NC

33pF

1.0uF

33pF

C4211DNP

C3970

4.7uF

C5401

NC

R4401

1K

120K

R3211

VS4200

88E24

6.93V

4809788E24

C4503

0.1uF

3

MTG_TAB

1

NEG

2

POS

VMAIN_1.55V

5988245Y01

SSR-N9L

U5700

1.2

R5101

1.0uF

C3550

B+

Q3401
NSL12AW
4813973M76

R4200

0

E3350

C4302

NC

VRF_DIG_1.875V

C4501

.01uF

B+

0.1uF

2.7pF

C4200DNP

C4003DNP

33pF

NC

B+

CR3000

BAS52

4809924D29

0

R3970DNP

R4202DNP
0

E3150

NC

VRF_HV_5V

NC

NC

VPOG_LVIO_1.875V

VRF_DIG_1.875V

E3050

VRF_TX_2.775V

E3600

R4902

270K

NC

NC

C4204

33pF

0

R3250DNP

150pF

BATT_I

C4214DNP

33pF

C3202

R3965

0

E3851

E3200

C3201

TP_ON_OFF

1

VLVIO_1.875V

10uF

C4504DNP

33pF

VMMC_2.775V

NC

NC

VBOOST_5.5V

VA_2.775V

5089874N01

J4100

3

GND

2

NC

1

OUT

4

VCC

2588079Y03

L3000
10uH

0.1uF

C4901

VPOG_LVIO_1.875V

OE

6

VCC

4

Y

NC

VMAIN_1.55V

VPOG_LVIO_1.875V

NC

5188085K07

NC7SP126

U3980

2

A

3

GND

NC

5

1

4813973A13

MMBT3906

Q5100

1

3

2

15pF

C4215

33pF

C4101DNP

NC

1.0uF

C3050

4700pF

NC

C3501DNP

C4550

TP_ON2

B+

0.10uF

1

VRF_REF_2.775V

B+

E3100

J5400

E3000

NC

C3801
1.0uF

C3001
10uF

3988194N04

J4200

2

A3

VONEG

C3

VOPOS

C4401

0.1uF

A2

GND1

GND2

B3

INNEG

C1

A1

INPOS

B2

PVDD

C2

SHUTDOWN

B1

VDD

56pF

NC

5109731C42

TPA2010D1

U4220DNP

NC

NC

C3200

MODE

6

PGND1

9

PGND2

10

SW1

7

SW2

8

VIN1

2

VIN2

3

B+

U3200

TPS62021

5188128Y01

11

CTGND

1

EN

FB

5

GND

4

B+

NC

C3000
10uF

33pF

C3151

4809653F10
MBRM120ET3

D3100

33pF

C4208

VHVIO_2.775V

C4100

0.1uF

C6051

33pF

VHVIO_2.775V

R3001

0.1

R5700

0

NC

NC

C3979
0.10uF

C4203

33pF

NC

B+

C4103DNP
33pF

VLVIO_1.875V

NC

R3973

0

C3984

10pF

0.10uF

C3002

NC

C6050

33pF

C3350

680pF

NC

4.7uF

B+

B+

NC

NC

C4212

R4901

47K

NC

4809995L20

MC146

Y3982

NC

2

NC1

3

4

OUT

IN

1

NC

C4002

32.768KHz

6.8uH

0.1uF

VSIM

VSIM2

VSIM_EN

VSW1

VSW2

VUSB

VUSB_IN

WDI

XRXD

XTAL1

XTAL2

L3100

2485063F02

VAUX3

VAUX3_IN

VAUX4

VAUX4_IN

VCC_OUT

VHOLD_EXT_EN

VHOLD_EXT_IN

VHOLD_OUT

VIB

VIB_IN

VOUT+

VOUT-

VPP

VREF+

VREF-

V4_IN

V5

V5_IN

V6

V6_DRV

V7

V7_IN

V8

V8_IN

V9

V9_IN

VAG

VAUX1

VAUX1_DRV

VAUX2

VAUX2_DRV

USB_DIG_VCC

USB_PU

USB_V+

USB_V-

USB_VBUS

USR_OFF

UV_SEL

V1

V10

V10_IN

V1_IN

V2

V2_IN

V3

V3_IN

V4

SPKR_GND2

SPKR_OUT1

SPKR_OUT2

STANDBY

STANDBY2

ST_CMP

ST_REF

THERM_BIAS

TSX1

TSX2

TSY1

TSY2

TS_BYP

TX

TX_ENB

USB_D+

USB_D-

RESETMCU_B

RTC_GND

RX0

RX1

SE0_IN

SEC_CE

SEC_MISO

SEC_MOSI

SEC_SPI_CLK

SEC_SPI_VCC

SEC_SSI_VCC

SPKR+

SPKR-

SPKRIN

SPKR_GND1

PGM4

PGND1
PGND2

PLL_GND

PLL_LPF

POWER_FAIL

PRI_CE

PRI_MISO

PRI_MOSI

PRI_SPI_CLK

PRI_SPI_VCC

PRI_SSI_VCC

PSRC1

PSRC2

PSRC3

REG_DO_MON

RESETB

MOBPORTB

MOD

MUX_CTRL

NC14

ON

ON2

OV_GATE

OV_SENSE

PGA_INL

PGA_INR

PGA_OUTL

PGM0

PGM1

PGM2

PGM3

LEDG

LEDR

LI_CELL

LX1

LX2

LX3

MAIN_FET

MB_CAP1

MB_CAP2

MCLK

MIC2_TX2

MIC_BIAS1

MIC_BIAS2

MIC_IN-

MIC_OUT

MID_RATE2

DGND_TEST

DIN

EOLI

EXTOUT

EXT_MIC

FB1

FB2

FB3

FSYNC0

FSYNC1

HS_OUT_L
HS_OUT_R

INT_PRI

INT_SEC

ISENSE

LCELL_BYP

BOB_BOOSTP

BOB_BUCKN

BOB_BUCKP

BOB_VDD1

BOB_VDD2

BOB_VSS1

BP2

CD_CAP

CHRGC

CHRGC_2

CLKIN1
CLK_IN

CS_OUT

DGND1

DGND2

DGND3

AR_IN

AUX_MIC+
AUX_MIC-

AUX_OUT

B+

BATT+

BATT_DETB

BATT_DET_IN

BATT_FDBK

BATT_I

BG_BYP

BITCLK0

BITCLK1

BL2_SINK

BL_FB

BL_SINK

BOB_BOOSTN

AGND4

AGND5

AGND6

AGND7

AGND_ESD1

AGND_ESD2

ALEFT_OUT

ALRT+

ALRT-

ALRTIN

ALRT_GND

ALRT_REF

ALRT_VCC

AL_IN

ARIGHT_OUT

32KHZ

A1_INT

AD4
AD5
AD6
AD7
AD8
AD9

AD_TRIG

AGND1

AGND2

AGND3

R3981DNP

0

B+

NC

6.8nH

L3205

22uF

C3500

R3210

270K

1.0uF

C4105

C3850

NC

1.0uF

0.1uF

C4551

33pF

C4000DNP

0.1uF

NC

VLVIO_1.875V

NC

C4213

NC

NC

C3205

10uF

SHORT

E5201

2

VCAM_2.6V

NC

B+

B+

NC

0988252L01

J5400

1.0uF

C3150

B+

NC

VSIM_CARD

E3800

L4200

82nH

1.0uF

C3100

C3300

NC

NC

B+

10uF

6.93V

88E24

VS4201

4809788E24

C3401DNP

NC

R3101

0.10uF

NC

0.1

L4201

82nH

TP_VSIM_EN

0

R3972

0

R3213

4.7uF

C5400

NC

C4301

.01uF

VRF_RX_2.775V

10uH

2588079Y03

L3206

2.7pF

C4201DNP

10pF

C3983

1.0uF

C4502

C3101
10uF

33pF

C4216

R4203DNP
0

R4201

0

NC

0.10uF

C3965

TP_RESETb

B+

VBOOST_5.5V

R4550

5.6K

C4209DNP

33pF

NC

VMAIN_1.55V

J4200

1

1.0uF

C3600

C4210

4.7uF

C3250

E3300

0.10uF

C3800
1.0uF

33pF

C4222DNP

C4223DNP
33pF

C4221DNP
33pF

0.1uF

0.1uF

C4220DNP

100K

C4225DNP

0.1uF

R4220DNP

C4224DNP

NC

B+

VSIM_POG

100K

R4221DNP

680pF

Q3501
NSL12AW
4813973M76

C4001

NC

NC

NC

NC

VBLUETH_1.875V

B+

C3102

0.10uF

E3950

NC

E3400

33pF

C4500DNP

E3801

VA_2.775V

10K

R5100

NC

E3850

NC

NC

3

2

1

NC

2187893N01

C3950
1.0uF

C3400

NC

4809579E67

Q3974

NC

22uF

E3550

1.0uF

C3851

B+

NC

E3500

INPOS_R

INPOS

AUD_AMP_BYP_R

AUD_AMP_BYP

LOUD2_EN

LOUD_SPKR_OUT2

CLK_32_768K_BUFF

NC

V_VIB

PCAP_RESETb

VHOLD_EXT_EN

HS_SPKR_L

VMAIN_MODE

VBOOST_OUT

VBOOST_OUT

VBOOST_OUT

BATT_P

HS_SPKR_R

RTC_BATT+

FLASH_SINK

USER_OFF

VHOLD_OUT

AD4

AD6

THERM_BIAS

EAR_SPKR-

EAR_SPKR+

AUDIO_IN

AUDIO_IN_R

LOGIC_SENSE

VSIMC_EN

PCAP_RESETb

PCAP_RESETb

ALT_SPK+

ALT_SPK-

VMAIN_FB

ON_OFF_ENDb

TEMP_SENSE

ASAP_RX

STEREO_TX

ASAP_TX

PLL_LPF

STEREO_FS

ASAP_FS

PCAP_CLK_IN

STEREO_CLK

ASAP_CLK

BG_BYP

ALRT_REF

HAR_TX_PREKEY

VMAIN_LX

PCAP2_V1_OUT

PCAP2_V2_OUT

LX3

LCELL_BYP

XTAL2

XTAL1

AUX_MIC_OUT_PCAP

VBOOST_BCAP

LX1

EMU_PWR_ON

BATT_DETb

VAUX2_DRV

V6_DRV

MUXCTL

PCAP_INT

WATCHDOG

PCAP_CS

BB_SPI_CLK

BB_SPI_MISO

BB_SPI_MOSI

PS_CLK_MM

FLASH_LIGHT

PCAP_B+

VLVIO_BCAP

background image

MFG CTRL CHK:

QA CHK:

REV:

Drawing Number:

Page:

TITLE:

Size:

Engineer:

Drawn by:

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Time:

Date:

MOTOROLA CONFIDENTIAL PROPRIETARY

20

1st JUNE 2005

2:45:16 pm

P4

TARAZED

PCAP2 IC

ARC127

20

C

3

2

D

4

1

B

A

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

VUSB_IN1

C3

VUSB_IN2

D4

V_VIB

L17

WDI

H12

XRXD

C6

XTAL1

U8

XTAL2

U10

VHOLD_EXT_IN

T12

VHOLD_OUT

U12

VIB_IN

L16

VPP_OUT

U6

VSIM

B7

VSIM2

E8

H14

VSIM_EN

VUSB

A3

VAUX2

C10

VAUX2_DRV

B10

VAUX3

K14

VAUX3_IN

L15

M17

VAUX4

M16

VAUX4_IN

VCC_OUT

R12

VHOLD_EXT_EN

U13

V7_IN

G15

V8

A7

V8_IN

C7

V9

A6

V9_IN

B6

VAG

N1

VAUX1

E7

VAUX1_DRV

F8

V3_IN

F16

V4

H15

V4_IN

H13

V5

M15

V5_IN

L13

V6

R13

V6_DRV

N12

V7

G17

V10

E10

V10_IN

A10

V1_IN

G16

V2_1

U1

V2_2

U2

V2_3

T1

V2_IN

U3

V3

F17

USB_DP

B4

USB_PU

C4

USB_VBUS

B3

USB_VM

G8

USB_VP

G7

USR_OFF

J13

UV_SEL

P16

V1

H17

TSY1

R4

TSY2

T4

TS_BYP

R8

TX

H8

TX2

M5

TX_ENB

E5

USB_DIG_VCC

E6

USB_DM

A5

SPKR_OUT2

H3

STANDBY

M9

STANDBY2

P10

ST_CMP

G3

ST_REF

H6

THERM_BIAS

N8

TSX1

T3

TSX2

T2

SEO_IN

F7

SPKRM

J4

SPKRP

K2

SPKR_GND1_1

J2

SPKR_GND1_2

J3

K1

SPKR_GND2

SPKR_IN

J5

H2

SPKR_OUT1

RX0

F5

RX1

D2

SEC_CE

H9

SEC_MISO

E11

SEC_MOSI

F11

SEC_SPI_CLK

C12

SEC_SPI_VCC

A13

SEC_SSI_VCC

E3

PSRC1_3

E13

PSRC1_4

F12

PSRC2

B12

PSRC3

A11

REG_DO_MON

M12

RESETB

L12

RESET_MCU_B

K12

RTC_GND

T9

PRI_SPI_CLK

M8

PRI_SPI_VCC

U7

PRI_SSI_VCC

L8

PRI_SSI_VCC_2

L7

PRI_SSI_VCC_3

N5

M6

PRI_SSI_VCC_4

PSRC1_1

F13

PSRC1_2

E15

PMG1

R9

PMG2

J11

PMG3

K10

G12

PMG4

POWER_FAIL

N9

PRI_CE

K9

PRI_MISO

R7

PRI_MOSI

P8

PGA_INL

L6

PGA_INR

J7

PGA_OUTL

J6

PGND1

C17

PGND2

C11

PLL_GND

G5

PLL_LPF

F3

PMG0

P9

A2

NC6

A1

NC7

B1

NC8

U16

NC9

ON2B

T6

ONB

J12

OV_GATE

N13

OV_SENSE

T15

H11

NC12

G11

NC13

NC14

M10

NC15

N11

C14

NC2

E12

NC3

G10

NC4

C13

NC5

MIC_OUT

R2

MID_RATE2

R16

MOBPORTB

T16

MOD

N10

MUX_CTRL

R10

H10

NC1

U17

NC10

T17

NC11

LX3

B11

MAIN_FET

N15

MB_CAP1

M3

MB_CAP2

M1

MCLK

G6

MIC_BIAS1

N3

MIC_BIAS2

M2

MIC_INM

R3

INT_SEC

D15

ISENSE

M13

LCELL_BYP

T10

LEDG

J16

LEDR

J15

LI_CELL

T11

LX1

D16

LX2

A12

FB1

F15

FB2

F10

FB3

D10

FSYNC0

H7

FSYNC1

B2

HS_OUT_L

K5

HS_OUT_R

K4

INT_PRI

L10

DGND2

J14

DGND3

G9

DGND4

K8

G13

DGND_TEST

DIN

C5

J10

EOL_INT_B

EXTOUT

F2

EXT_MIC

K7

CD_CAP

L3

CHRGC

R15

CHRGC_2

R14

CLKIN

C2

CLKIN1

C1

CS_OUT

R11

D32KHZ

T7

DGND1

J8

BOB_VREFP

B8

BOB_VSS1_1

A16

BOB_VSS1_2

A17

BOB_VSS1_3

B17

BOB_VSW1

D9

BOB_VSW2

B9

BP1

U15

BP2

A8

BOB_BOOSTP

A15

BOB_BUCKN

B16

BOB_BUCKP

C15

BOB_VDD1

B14

BOB_VDD2

C16

BOB_VOUTM

E9

BOB_VOUTP

C9

BOB_VREFM

C8

BATT_I

M11

BG_BYP

U11

BITCLK0

F6

BITCLK1

D3

BL2_SINK

K16

BL_FB

K15

BL_SINK

K17

BOB_BOOSTN

B15

AR_IN

K6

AUX_MICM

P2

AUX_MICP

P3

AUX_OUT

R1

BATTP

R17

BATT_DETB

K13

BATT_DET_IN

K11

BATT_FDBK

L9

ALRTIN

H4

ALRTM

F1

ALRTP

H1

ALRT_GND

E1

ALRT_REF

G2

ALRT_VCC

G1

AL_IN

L5

ARIGHT_OUT

L2

AGND3

N17

AGND4

H16

AGND5

E17

AGND6

T8

AGND7

D8

AGND_ESD1

F9

AGND_ESD2

T14

ALEFT_OUT

K3

AD5

R5

AD6

R6

AD7

N6

AD8

N7

AD9

M7

AD_TRIG

P15

AGND1

L1

AGND2

L11

U3000

TWL93010DGZGR

A1_INT

H5

AD4

U5

VSIM

VSIM2

VSIM_EN

XTAL2

MAIN_FET

V2

V3

V4

V5
V6_DRV

PGND2

PSRC3
LX3

VAG

AUX_OUT

ST_CMP

USB_D+

USB_V-

VUSB

EXTOUT

NC14

PRI_SSI_VCC

STANDBY

BL_SINK

BL_FB

BL2_SINK

LEDR

LEDG

SEC_CE

SEC_SPI_VCC

SPKRIN

THERM_BIAS

AD_TRIG

VPP

PGA_OUTL

USB_PU

AGND3

AGND6

AGND5

AGND4

BP2

PGM4

PGND1

USB_VBUS

USB_V+

USB_D-

USB_DIG_VCC

VUSB_IN

FB3

V4_IN

V5_IN

V2_IN

V1_IN

V3_IN

V1

PGM3

BOB_BUCKP

BOB_BOOSTN

BOB_BOOSTP

SPKR_GND2

SPKR_GND1

BOB_VSS1

SPKR_OUT1

MB_CAP1

ALEFT_OUT

ARIGHT_OUT

HS_OUT_R

32KHZ

BATT_I

VSW1

VSW2

VOUT+

VOUT-

VREF+

VREF-

STANDBY2

EXT_MIC

UV_SEL

AD4
AD5
AD6
AD7

A1_INT

EOLI

ON

ON2

PRI_CE

PRI_SPI_CLK

ALRT_VCC

ALRT_REF

HS_OUT_L

MIC2_TX2

V6

V7

V8

V9

V10

VAUX1_DRV
VAUX1
VAUX2_DRV

AGND7

RX0

PSRC2

VHOLD_EXT_EN

V7_IN

V8_IN

V9_IN

V10_IN

SEC_SSI_VCC

FSYNC1

BITCLK1

RX1

CHRGC

AGND2

PGM1

PGM2

PGM0

VIB

BATT_FDBK

B+

BATT+

LI_CELL

VHOLD_OUT

VCC_OUT
CS_OUT

CLKIN1

FB1

VAUX4

DGND2

DGND1

CD_CAP

DGND3

DGND_TEST

XTAL1

VAUX3_IN

LCELL_BYP

VAUX4_IN

VIB_IN

VHOLD_EXT_IN

REG_DO_MON

AD8
AD9

TSX1
TSX2

RTC_GND

TX_ENB

TSY1
TSY2

TS_BYP

PRI_SPI_VCC

AL_IN

ALRTIN

DIN

SE0_IN

XRXD

PRI_MOSI
PRI_MISO

SEC_MISO

TX

LX1

SPKR_OUT2

ALRT-

ALRT+

INT_SEC

USR_OFF

VAUX2

VAUX3

AUX_MIC+

AUX_MIC-

SPKR+

SPKR-

OV_GATE

BATT_DETB

INT_PRI

ISENSE

RESETMCU_B

OV_SENSE

MOBPORTB

BATT_DET_IN

MUX_CTRL

MOD

POWER_FAIL

AGND_ESD1

AGND_ESD2

AGND1

MB_CAP2

PSRC1

BOB_VDD2

BOB_VDD1

BOB_BUCKN

RESETB

CHRGC_2

MID_RATE2

MIC_IN-

WDI

LX2
FB2

MIC_OUT

SEC_MOSI

MCLK

FSYNC0

BITCLK0

SEC_SPI_CLK

ALRT_GND

ST_REF

MIC_BIAS1

MIC_BIAS2

CLK_IN

PLL_LPF

PLL_GND

BG_BYP

PGA_INR

PGA_INL

AR_IN

background image

HARMONY

RX_SYN

FEM_Q_BAND

MFG CTRL CHK:

QA CHK:

REV:

Drawing Number:

Page:

TITLE:

Size:

Engineer:

Drawn by:

R&D CHK:

DOC CTRL CHK:

Of:

Changed by:

Time:

Date:

A

5

8

7

6

C

B

2

D

A

3

7

REFERENCE OSCILLATOR

5

E

4

2

1

TARAZED

RF TOP LEVEL

P4

5:49:12 pm

Tuesday, May 30, 2005

ARC127

E

D

C

6

B

3

1

8

4

2

20

.01uF

C501

WB_AGC4

WB_CKIH

WB_CMODE

WB_DCOC_I

WB_DCOC_IX

WB_DCOC_Q

WB_DCOC_QX

WB_I

WB_IX

WB_LNA_BYP

WB_Q

WB_QX

WB_RX_EN

WB_TRK_CLK

SW_POS2

SW_POS3
SW_POS4

SW_Q

SW_QX

SW_VCA_AOC

SW_VCO_EN

TEMP_SENSE_EN

TX_EN

TX_EN_2V7

TX_WB_EN

WB_AGC0
WB_AGC1
WB_AGC2
WB_AGC3

SER_RX_CLK
SER_RX_DATA

SER_RX_FRAME

SPIMB_CLK

SPIMB_DR

SPIMB_DW

SPIWB_CLK
SPIWB_DR

SPIWB_DW

STBY_MB
STBY_WB

SW_ASPI_CE

SW_ASPI_CLK

SW_ASPI_DW

SW_I

SW_IX

SW_POS1

MB_EXC_EN

MB_I

MB_IX

MB_Q

MB_QX

MB_RX_EN

MB_TRK_CLK

PAR_RX_DATA[7:2]
PAR_RX_FRAME

PAR_TRX_CLK

PAR_TX_DATA[7:0]

PAR_TX_FRAME

PA_VBA1
PA_VBA2

PS_CLK_OUT

RESETB

HAR_TX_PREKEY

HAR_TX_RAMP
HAR_TX_SLOT

HAR_WB_RX_ACQ

HAR_WB_RX_ON

HAR_WB_RX_SLOT

HB_EN

LB_EN

MBC_EN1
MBC_EN2

MB_ASPI_CE

MB_ASPI_CLK

MB_ASPI_DATA

MB_CKIH

MB_CM_IN

5W_VLD

9E_VDET

9E_VMODE

9E_VREFDET

AOC_PWR_UP_DN

GSM_PA_VBA

HAR_MB_RX_ACQ
HAR_MB_RX_ON

HAR_MB_RX_SLOT

HAR_SPIMB_CE

HAR_SPIWB_CE

R500

0

3

OUTPUT

4

VCC

1

V_CONT

4809718L22

26MHz

TCXO_NDK_NT5032SC_26MHz2.5ppm_2V4

Y500

GND

2

WB_TRK_CLK

WB_UMTS_IN

WB_VCO_SF_EN

WB_AGC1
WB_AGC2
WB_AGC3
WB_AGC4

WB_CMODE

WB_DCOC_I
WB_DCOC_IX
WB_DCOC_Q
WB_DCOC_QX

WB_I
WB_IX

WB_LNA_BYP

WB_Q
WB_QX

WB_RX_EN

WB_SPIWB_CE

PS_CLK_OUT

PS_SPIMB_CE

PS_SPIWB_CE

RESETB

SER_TX_CLK

SER_TX_DATA

SPIMB_CLK

SPIMB_DW

SPIWB_CLK

SPIWB_DW

STBY_MB

STBY_WB

SW_POS3

TCXO_EN

TCXO_IN

WB_AGC0

MB_DCS_IN

MB_EXC_EN

MB_GSM900_IN

MB_HB_RF_OUT

MB_I
MB_IX

MB_LB_RF_OUT

MB_PCS_IN

MB_Q
MB_QX

MB_RX_EN

MB_RX_VCO_EN

MB_TRK_CLK

PS_CLK_ALT

PS_CLK_EN

PS_CLK_MM

BLUETOOTHCLK

DMCS

MB_ASPI_CE

MB_ASPI_CLK

MB_ASPI_DATA

MB_CM_IN

MBC_EN1
MBC_EN2

MB_DCS_OUT

MB_GSM_OUT

MB_HB_RF_IN

MB_LB_RF_IN

MB_PCS_OUT

SW_POS1

SW_POS2
SW_POS3
SW_POS4

WB_RX_OUT

WB_TX_IN

WB_PA_ENABLE

WB_PA_LOAD_SW

WB_PA_VBA1

WB_PA_VBA2

WB_TX_OUT

GSM_TX_OUT

REF

RF_IN_DCS_PCS

RF_IN_GSM

SPI_ASPI_CE

SPI_ASPI_CLK

SPI_ASPI_DW

TEMP_SENSE

TEMP_SENSE_EN

TX_EN

VCO_EN

VEND

VENH

VENL

VGC

VMODE

TRANSMITTER

9E_VDET
9E_VREFDET

BB_I

BB_IX

BB_Q

BB_QX

DCS_PCS_TX_OUT

GSM_PA_VBA

SW_POS3

TEMP_SENSE

PS_CLK{PS_CLK_EN,BLUETOOTHCLK,GPS_CLK,PS_CLK_MM}

PS_CLK_OUT

INT{HAR_RESETb,STBY_MB,STBY_WB}

INT{HAR_RESETb,STBY_MB,STBY_WB}

MB_SPI_MOSI

MB_SPI_CLK

SPIMB{MB_SPI_CLK,MB_SPI_MOSI}

SPIMB{MB_SPI_CLK,MB_SPI_MOSI}

SPIMB{MB_SPI_CLK,MB_SPI_MOSI}

PS_CLK_MM

BLUETOOTHCLK
PS_CLK_EN

DMCS

BCLKX

MB_RX_VCO_EN

TCXO_IN

TCXO_EN

TX_EN

WB_Q

WB_IX

WB_I

WB_IQ{WB_I,WB_IX,WB_Q,WB_QX}

MB_ASPI_CE

MB_ASPI_DATA

MB_ASPI_CLK

MB_ASPI{MB_ASPI_CLK,MB_ASPI_DATA,MB_ASPI_CE}

WB_DCOC_QX

WB_DCOC_Q

WB_DCOC_IX

WB_DCOC_I

WB_DCOC{WB_DCOC_I,WB_DCOC_IX,WB_DCOC_Q,WB_DCOC_QX}

MB_Q

MB_QX

MB_IX

MB_I

MB_IQ{MB_I,MB_IX,MB_Q,MB_QX}

MB_DCS

STBY_MB

MB_SPI_CLK

MB_SPI_MOSI

WB_SPI_MOSI

WB_SPI_CLK

SPI_WB{WB_SPI_CLK,WB_SPI_MOSI}

STBY_WB

HAR_RESETb

BDX

WB_AGC4

WB_AGC3

WB_AGC2

WB_AGC1

WB_AGC0

WB_AGC{WB_AGC0,WB_AGC1,WB_AGC2,WB_AGC3,WB_AGC4}

WB_QX

WB_RX_EN

WB_LNA_BYP

WB_CMODE

TX_RAMP

PS_SPIWB_CE

PS_SPIWB_CE

PS_SPIMB_CE

MB_RX_EN

MB_PCS

MB_LB_RF

MB_HB_RF

MB_GSM

WB_TX

GSM_TX

MBC_EN2

MBC_EN1

DCS_PCS_TX

SW_POS4

SW_POS2

SW_POS1

WB_VCO_SF_EN

WB_RX

WB_TRK_CLK

WB_SPIWB_CE

9E_MODE

TX_WB_EN

5W_VLD

TX_EN_2V7

TEMP_SENSE_EN

SW_VCA_AOC

SW_VCO_EN

PA_VBA1

PA_VBA2

TX_FE{SW_FB_CAL,SW_FB_SEL,SW_VCO_EN,TX_EN,SW_VCA_AOC,SK_VCA_AOC,TX_WB_EN,5W_VLD,PA_VBA1,PA_VBA2,TX_EN_2V7,9E_MODE,HB_EN,LB_EN,RA_BIAS_MIXER}

SW_ASPI{SW_ASPI_CLK,SW_ASPI_DW,SW_ASPI_CE}

LB_EN

HB_EN

STBY_MB

STBY_MB

SW_QX

SW_Q

SW_IX

SW_I

SW_ASPI_DW

SW_ASPI_CLK

SW_ASPI_CE

BBIF_CLK

BBIF_RX_FRM

BBIF_RX[7:2]

MB_QX

MB_Q

MB_IX

MB_I

BB_CLK_13M

MB_ASPI_DATA

MB_ASPI_CLK

MB_ASPI_CE

LB_EN

HB_EN

HAR_MB_RX_SLOT

HAR_WB_RX_ON

HAR_WB_RX_ACQ

HAR_TX_SLOT

HAR_TX_PREKEY

HAR_SPIWB_CE

HAR_SPIMB_CE

HAR_WB_RX_SLOT

HAR_MB_RX_ON

HAR_MB_RX_ACQ

AOC_PWR_UP

9E_MODE

5W_VLD

WB_AGC4

WB_AGC3

WB_AGC2

WB_AGC1

WB_AGC0

TX_WB_EN

TX_EN_2V7

TX_EN

SW_VCO_EN

SW_VCA_AOC

SW_QX

SW_Q

SW_IX

SW_I

SW_ASPI_DW

SW_ASPI_CLK

SW_ASPI_CE

WB_SPI_MISO

MB_SPI_MOSI

MB_SPI_MISO

MB_SPI_CLK

BFSR

BDR

BCLKR

PA_VBA2

PA_VBA1

BBIF_TX_FRM

BBIF_TX[7:0]

SW_IQ{SW_I,SW_IX,SW_Q,SW_QX}

HAR_RESETb

HAR_RESETb

STBY_WB

STBY_WB

WB_SPI_CLK

WB_SPI_CLK

BLUETOOTHCLK

BLUETOOTHCLK

PS_CLK_EN

PS_CLK_EN

PS_CLK_MM

PS_CLK_MM

WB_SPI_MOSI

WB_SPI_MOSI

WB_QX

WB_Q

WB_IX

WB_I

WB_DCOC_QX

WB_DCOC_Q

WB_DCOC_IX

WB_DCOC_I

BB_CLK_15_36M

background image

MFG CTRL CHK:

QA CHK:

REV:

Drawing Number:

Page:

TITLE:

Size:

Engineer:

Drawn by:

R&D CHK:

DOC CTRL CHK:

Of:

Changed by:

Time:

Date:

50 Ohms

FRONT END MODULE

1

3

5

2

4

E

A

8

6

5

5

7

D

7

50 Ohms

1

A

2

C

E

B

50 Ohms

50 Ohms

50 Ohms

Front End Module REF # (000 - 099)

50 Ohms

50 Ohms

20

50 Ohms

50 Ohms

50 Ohms

50 Ohms

D

50 Ohms

50 Ohms

NEAR FL001

V4

11

WCDMA_TX

Quad Band Front End Module

TARAZED

P3B

10:36:44 am

1st JUNE 2005

AAT102 / AMM261

TRACE NEEDS TO COME FROM THE

FILTER PAD AND BE HIGH IMPEDENCE

6

8

B

C

WCDMA_RX_ANT_GND

3

4

50 Ohms

Place LO02 NEAR FL002

12

GND_7

14

GND_8

17

GND_9

19

PCS_RX

20

V1

5

V2

4

V3

3

2

GND_23

35

GND_24

GND_25

36

37

GND_26

GND_27

38

GND_3

7

GND_4

9

GND_5

10

GND_6

GND_16

GND_17

28

29

GND_18

30

GND_19

GND_2

6

GND_20

31

32

GND_21

GND_22

33

34

15

GND_1

1

GND_10

21

GND_11

22

GND_12

23

24

GND_13

GND_14

25

GND_15

26

27

FL001

FEM3203_ES6D

4889729N03

8

ANTENNA

DCS_PCS_TX

13

DCS_RX

18

EGSM_RX

16

EGSM_TX

10nH

10pF

C5

2489711L11

L8DNP

GND2

4

IN

1

OUT

2

9109674L30

DEA321910LT

FL004

3

GND1

C4
10pF

9109674L28

S0467B

FL003

3

GND

1

IN

2

OUT

12

LB_RBIAS

2

VCC

L11

4.7nH

8

GAIN

HB_LNA_E_GND

5

6

HB_LNA_IN

3

HB_LNA_OUT

4

HB_RBIAS

11

LB_LNA_E_GND

10

LB_LNA_IN

1

LB_LNA_OUT

U001

MC13820

5109944C61

9

BAND

13

CTGND

7

ENABLE

L3DNP
10nH

J1

C1

C2

G1

G2

G3

G4

0988612M01

L5DNP

1nH

CF61A4203

FL002

GND1

G1

GND2

G2

IN

1

OUT

2

C1DNP
0.3pF

9109674L25

C8

VRF_RX_2.775V

.01uF

10pF

0

C7

0

R2

2K

R6

R1

39pF

C20

39pF

C21

CONTACT

ANT3

1

22nH

L9

R5

3.9K

39pF

C22

C6

33pF

C10

1pF

39pF

C23

L4

3.9nH

3.3pF

1

POS1

2

POS2

C2DNP

C1

C2

G1

G2

G3

G4

CONTACT

M1

L12

0988612M01

J2

L10

2.2nH

R4

2.2nH

C3

0

R3

4.3pF

WCDMA_RX_ANT_SW

WCDMA_RX_ANT_PAD

0

MB_DCS_OUT

MB_PCS_OUT

MB_GSM_OUT

SW_POS1

SW_POS4

MAIN_ANT_SW

MB_HB_RF_IN

SW_POS2

MAIN_ANT_CLIP

WB_RX_OUT

SW_POS3

WB_TX_IN

MB_LB_RF_IN

MBC_EN2

MBC_EN1

background image

MFG CTRL CHK:

QA CHK:

REV:

Drawing Number:

Page:

TITLE:

Size:

Engineer:

Drawn by:

R&D CHK:

DOC CTRL CHK:

Of:

Changed by:

Time:

Date:

D

C

B

4

3

100 Ohms

100 Ohms

3

20

OneLifeWB_RF_Supply

K04=50 to 200

100 Ohms

200 Ohms

PS_1.8V_Supply

7

6

5

100 Ohms

2

1

E

PS_CP_Supply

PS_TCXO_Supply

200 Ohms

3

4

5

6

BLUE MODULE

Algae_RF_Supply

K06=50 to 100

B

C

D

E

31st May 2005

5:49:12 pm

P4

BLUE MODULE

TARAZED

AAT102

A

1

2

200 Ohms

200 Ohms

OneLife_1.8V_Supply

8

7

8

A

0

R901

0

R910

C930DNP
0.1uF

0

R930

VRF_DIG_1.875V

VRF_DIG_1.875V

4

PORT3

0

R902

T903

HHM1526

CT

2

5

GND1

6 NC

1 PORT1

3

PORT2

C916

C918

39pF

4.7uF

C909

4.7uF

C903

0.1uF

TP915

1

R931

0

4.7uF

C902

.01uF

C915

5

6 NC

1 PORT1

3

PORT2

4

PORT3

T901
HHM1515

2 CT

GND1

4.7uF

C901

C919

VRF_HV_5V

NC

NC

39pF

R907

0

VRF_REF_2.775V

OUTPUT1

6

OUTPUT2

VRF_RX_2.775V

FL900

SAFSD2G14

9109239M38

GND1

1

GND2

3

5

GND3

INPUT

2

4

C931DNP

VRF_RX_2.775V

0

0.1uF

R921

0

R932

D901

4

PORT3

NC

NC

HHM1526

CT

2

5

GND1

6 NC

1 PORT1

3

PORT2

R915

T902

1

NC

NC

10K

R920

TP916

10

10

R904

4.7uF

C904

.01uF

C907

C906
3.6pF

WB_VCC_VCO

F8

WB_VCO_EN

0

R916

WB_SPI_CE

J10

WB_SPI_CLK

J9

WB_SPI_DATA_IN

D11

WB_TEST_1

C11

WB_TEST_2

L10

WB_TRK_CLK

E9

WB_VCC_BB

B7

WB_VCC_RF

G9

WB_DCOC_I_POS

F11

WB_DCOC_Q_NEG

F12

WB_DCOC_Q_POS

B9

WB_LNA_BYP

D6

WB_RX_EN

F7

WB_SF_EN

G7

WB_SF_OUT

G8

WB_SF_REF

F9

WB_AGC_3

B11

WB_AGC_4

K11

WB_BB_I_NEG

K10

WB_BB_I_POS

J12

WB_BB_Q_NEG

J11

WB_BB_Q_POS

F10

WB_CM_IN

G12

WB_DCOC_I_NEG

H12

UMTS_WB_RX_POS_IN

F4

VCC_MB_EXC

E6

VCC_MB_VCO

G10

VCC_SPI_TRK

H5

VCC_SYN

D10

WB_AGC_0

C10

WB_AGC_1

C9

WB_AGC_2

B10

SYN_SPI_MB_DATA

J1

SYN_SPI_WB_CE

J7

SYN_VCC_CP

J5

SYN_VCC_LOGIC

K7

SYN_VCC_REF_BUF

L7

SYN_WB_STBY

K8

TCXO_VCC_OUT

D12

UMTS_WB_RX_NEG_IN

C12

PCS_MB_RX_NEG_IN

A9

PCS_MB_RX_POS_IN

D3

SPI_TRK_VDD

J6

SYN_MB_STBY

L8

SYN_REF_OSC_IN

K6

SYN_RESET

L6

SYN_SPI_MB_CE

K4

SYN_SPI_MB_CLK

K5

MB_SF_REF

C5

MB_TEST_1

C2

MB_TEST_2

E2

MB_TRK_CLK

K2

MB_TX_CLK

J3

MB_TX_RAMP

B6

MB_VCC_RF

H3

MB_VCO_EN

A10

MB_BB_Q_POS

B2

MB_CM_IN

E1

MB_EXC_EN

F1

MB_HB_OUT

D1

MB_LB_OUT

C6

MB_RX_EN

J4

MB_SD_TX

F5

MB_SF_OUT

E5

GND8

B8

GND9

D4

MB_ASPI_CE

E3

MB_ASPI_CLK

D2

MB_ASPI_DATA

B4

MB_BB_I_NEG

B3

MB_BB_I_POS

C4

MB_BB_Q_NEG

C3

GND47

L2

GND48

L9

GND49

A11

GND5

L11

GND50

L12

GND51

A12

GND6

B1

GND7

B5

GND4

H9

GND40

H10

GND41

H11

GND42

J8

GND43

K1

GND44

K9

GND45

K12

GND46

L1

GND32

G11

GND33

H1

GND34

H2

GND35

H4

GND36

H6

GND37

H7

GND38

H8

GND39

A8

GND25

F6

GND26

G1

GND27

G2

GND28

G3

GND29

A5

GND3

G4

GND30

G5

GND31

G6

GND18

E7

GND19

A2

GND2

E8

GND20

E10

GND21

E11

GND22

E12

GND23

F2

GND24

F3

GND10

C1

GND11

C7

GND12

C8

GND13

D5

GND14

D7

GND15

D8

GND16

D9

GND17

E4

CLK_GPS_OUT

K3

CLK_NC_OUT

L5

CLK_OUT

A7

DCS_MB_RX_NEG_IN

A6

DCS_MB_RX_POS_IN

A4

EGSM_MB_RX_NEG_IN

A3

EGSM_MB_RX_POS_IN

A1

GND1

B12

U900

4889717N03

L3

CLK_BT_OUT

J2

CLK_EN

L4

0.1uF

C917

0.1uF

39pF

C908

C910DNP

R922

0

.01uF

C911DNP

MB_GSM900_IN

WB_TRK_CLK

WB_VCO_SF_EN

BLUETOOTHCLK

MB_RX_VCO_EN

WB_QX

PS_CLK_OUT

MB_ASPI_CE

MB_LB_RF_OUT

MB_EXC_EN

MB_HB_RF_OUT

MB_ASPI_CLK

SER_TX_CLK

DMCS

MB_TRK_CLK

SER_TX_DATA

PS_CLK_ALT

WB_SPIWB_CE

MB_PCS_IN

MB_QX

MB_Q

MB_IX

MB_I

STBY_MB

WB_DCOC_IX

WB_DCOC_I

WB_DCOC_QX

WB_DCOC_Q

WB_Q

WB_CMODE

SPIWB_DW

MB_CM_IN

WB_LNA_BYP

WB_AGC4

WB_AGC3

WB_AGC2

WB_AGC1

WB_AGC0

MB_ASPI_DATA

WB_I

WB_IX

WB_RX_EN

SPIWB_CLK

PS_CLK_MM

PS_CLK_EN

SPIMB_DW

PS_SPIMB_CE

SPIMB_CLK

RESETB

TCXO_IN

TCXO_EN

MB_RX_EN

PS_SPIWB_CE

STBY_WB

MB_DCS_IN

WB_UMTS_IN

SW_POS3

background image

MFG CTRL CHK:

QA CHK:

REV:

Drawing Number:

Page:

TITLE:

Size:

Engineer:

Drawn by:

R&D CHK:

DOC CTRL CHK:

Of:

Changed by:

Time:

Date:

5

Dif.

UR_ANCH

8

A

A

Dif.

1

4

HARMONY

ALL CAPACITORS CLOSE TO HARMONY

ALL CAPACITORS CLOSE TO HARMONY

UL_ANCH

4

70 ohm

1

3

4

7

BB_GND

E

E

7

3

SUPPLIES INTERCONNECTIONS FAR FROM HARMONY

LL_ANCH

SYNTHESIS CAPACITORS CLOSE TO HARMONY

Dif.

1

C

6

2

TX_RF_GND

LR_ANCH

Dif.

TP placeholders for pins with NC

Dif.

5

HARMONY

TARAZED

P4

3:07:49 pm

30th May 2005

ARC127

Dif.

D

SYN_GND

B

C

8

D

Dif.

6

Dif.

RX_SD_GND

2

TX_SD_GND

B

Dif.

70 ohm

6

20

NC

NC

NC

NC

NC

NC

TP547

1

C112

A5

A5

B1

B1

B2

B2

B3GND

B3

B4

B4

B5

B5

1500pF

FL100

9188695K05

A1

A1

A2

A2

A4

A4

TP548

1

NC

NC

NC

VHVIO_2.775V

NC

VLVIO_1.875V

C106

1.0uF

NC

VRF_TX_2.775V

NC

NC

NC

C102

NC

NC

NC

33pF

NC

NC

100pF

C110

R104
0

NC

4.7uF

C101

R103
0

NC

NC

NC

.01uF

C113

NC

NC

NC

NC

4.7uF

C100

NC

NC

NC

NC

VRF_RX_2.775V

NC

NC

NC

NC

R111
1.5K

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

1

TP536
TEST_POINT

1

TEST_POINT

TP560

NC

C111
.01uF

1.5K

NC

NC

NC

R113

R105
0

NC

NC

NC

NC

NC

NC

C104

1.0uF

C105

1.0uF

G13

H17

TX_SLOT_IN

G15

TX_START_IN

E5

TX_VAG_VCC

A13

TX_VDD

A9

TX_SD_GND_6

F3

TX_SD_I_M_IN

F4

TX_SD_I_P_IN

E3

TX_SD_Q_M_IN

E4

TX_SD_Q_P_IN

D7

TX_SD_VCC

H13

TX_SER_CLK_OUT

J18

TX_SER_DATA_IN

TX_SER_FRAME_OUT

G3

TX_Q_M_OUT

G4

TX_Q_P_OUT

G14

TX_RAMP_IN

TX_SD_GND_1

A4

A5

TX_SD_GND_2

A6

TX_SD_GND_3

A7

TX_SD_GND_4

A8

TX_SD_GND_5

L17

H14

TX_PAR_DATA_IN_3

H15

TX_PAR_DATA_IN_4

K18

TX_PAR_DATA_IN_5

J16

TX_PAR_DATA_IN_6

K17

TX_PAR_DATA_IN_7

H16

TX_PAR_FRAME_IN

H18

TX_PREKEY_IN

F11

TX_AOC_VCC

D8

TX_DAC_GND

D9

TX_DAC_VCC

A14

TX_GND

H4

TX_I_M_OUT

H3

TX_I_P_OUT

K16

TX_PAR_DATA_IN_0

L18

TX_PAR_DATA_IN_1

TX_PAR_DATA_IN_2

D13

TX_AOC_DRVR_GND

D10

TX_AOC_GND

E12

TX_AOC_OUT_0

E13

TX_AOC_OUT_1

D12

TX_AOC_OUT_2

F12

TX_AOC_OUT_3

B11

TX_AOC_REF_IN

J17

TX_AOC_UPDWN_IN

L4

SYN_VDD

L13

SYN_WB_CLK_OUT

TEST_MODE_IN

J4

C1

TX_AMP_GND_1

D1

TX_AMP_GND_2

E1

TX_AMP_GND_3

J1

TX_AMP_VCC

B10

TX_AOC_DET_IN

L8

SYN_SF_REF

L6

SYN_SF_SENS

L7

L3

SYN_SF_VCC

SYN_STANDBY_IN_0

J9

J8

SYN_STANDBY_IN_1

SYN_TIMER_OUT_0

J7

J6

SYN_TIMER_OUT_1

N4

P3

SYN_CP_OUT_1

P2

SYN_CP_VCC

J2

SYN_GND

SYN_MB_CLK_OUT

K12

SYN_PAR_CLK_OUT

L12

SYN_REF_IN

L5

L2

SYN_SF_GND

SYN_SF_OUT

J15

SPI_CLK_IN_0

J13

SPI_CLK_IN_1

K15

SPI_DATA_IN_0

N19

SPI_DATA_IN_1

L16

SPI_DATA_OUT_0

K13

SPI_DATA_OUT_1

J14

P1

SYN_CP_GND

SYN_CP_OUT_0

SM_OUT_3

A17

SM_OUT_4

F17

D14

SM_OUT_5

E14

SM_OUT_6

SM_OUT_7

D15

SM_OUT_8

C16

SM_OUT_9

B18

SPI_CE_IN_0

K14

SPI_CE_IN_1

D19

SM_OUT_18

E16

SM_OUT_19

E19

SM_OUT_2

B17

F15

SM_OUT_20

F14

SM_OUT_21

SM_OUT_22

F13

SM_OUT_23

G16

SM_OUT_1

A16

SM_OUT_10

C17

SM_OUT_11

C18

SM_OUT_12

D18

C19

SM_OUT_13

SM_OUT_14

D17

D16

SM_OUT_15

SM_OUT_16

E17

SM_OUT_17

RX_SER_DATA_OUT

T16

RX_SER_FRAME_OUT

P15

W16

RX_VDD

RX_WB_ACQ_IN

P14

RX_WB_ON_IN

U19

RX_WB_SLOT_IN

R13

M11

RX_WB_TRK_CLK_OUT

SM_OUT_0

B16

RX_SD_Q_M_IN_2

T9

RX_SD_Q_P_IN_1

T8

RX_SD_Q_P_IN_2

R9

N9

RX_SD_VAGI_1

RX_SD_VAGI_2

M10

N8

RX_SD_VCC_1

N10

RX_SD_VCC_2

RX_SER_CLK_OUT

R17

W13

RX_SD_GND_2_2

W14

RX_SD_GND_2_3

W15

RX_SD_GND_2_4

RX_SD_I_M_IN_1

T7

RX_SD_I_M_IN_2

T10

RX_SD_I_P_IN_1

R7

RX_SD_I_P_IN_2

R10

RX_SD_Q_M_IN_1

R8

N16

RX_PAR_FRAME_OUT

W3

RX_SD_GND_1_1

W4

RX_SD_GND_1_2

W5

RX_SD_GND_1_3

W6

RX_SD_GND_1_4

W7

RX_SD_GND_1_5

W8

RX_SD_GND_1_6

W12

RX_SD_GND_2_1

U18

RX_MB_TRK_CLK_OUT

P6

RX_PAR_DATA_OUT_2

T17

RX_PAR_DATA_OUT_3

N13

RX_PAR_DATA_OUT_4

N15

RX_PAR_DATA_OUT_5

T19

RX_PAR_DATA_OUT_6

N14

RX_PAR_DATA_OUT_7

P19

R3

P4

RX_DCOC_VCC

U17

RX_GND

R5

RX_IO_GND

M9

RX_IO_VCC

L9

RX_IO_VDD

N12

RX_MB_ACQ_IN

RX_MB_ON_IN

T18

RX_MB_SLOT_IN

RX_AGC_STEP_OUT

R12

N6

RX_ASPI_CE_OUT

N7

RX_ASPI_CLK_OUT

M7

RX_ASPI_DATA_OUT

U1

RX_DCOC_GND

RX_DCOC_I_M_OUT

T2

RX_DCOC_I_P_OUT

R2

RX_DCOC_Q_M_OUT

T3

RX_DCOC_Q_P_OUT

N11

RX_AGC_SOS_IN_1

P11

RX_AGC_STEPA_OUT_0

U4

RX_AGC_STEPA_OUT_1

T5

RX_AGC_STEPB_OUT_0

V2

RX_AGC_STEPB_OUT_1

P5

RX_AGC_STEPC_OUT_0

V1

RX_AGC_STEPC_OUT_1

N5

V19

OPEN_8

W1

OPEN_9

RST_B_IN

J5

J11

RX_AGC_OUT_0

RX_AGC_OUT_1

K11

RX_AGC_OUT_2

L11

RX_AGC_OUT_3

K9

RX_AGC_OUT_4

L10

RX_AGC_SOS_IN_0

W18

OPEN_11

W19

OPEN_12

A2

OPEN_2

A18

OPEN_3

A19

OPEN_4

B1

OPEN_5

B19

OPEN_6

V18

OPEN_7

C14

NC_4

C15

NC_5

E7

NC_6

E9

NC_7

F5

NC_8

F6

NC_9

A1

OPEN_1

W2

OPEN_10

U5

NC_32

U6

NC_33

U13

NC_34

U14

NC_35

U15

NC_36

U16

NC_37

W11

NC_38

NC_39

E18

NC_25

NC_26

H11

H12

NC_27

N18

NC_28

T13

NC_29

C8

NC_3

T14

NC_30

T15

NC_31

G12

G17

NC_19

C7

NC_2

G18

NC_20

H5

NC_21

H6

NC_22

H7

NC_23

H8

NC_24

H9

F7

NC_10

F8

NC_11

F9

NC_12

G6

NC_13

G7

NC_14

G8

NC_15

G9

NC_16

G11

NC_17

NC_18

D5

INF_ASPI_IO_VDD

J12

INF_IO_GND_A

F16

INF_IO_GND_B

N17

INF_IO_VDD_A

INF_IO_VDD_B

F19

A15

INF_SM_VCC

B14

INF_VDD

NC_1

C6

D4

INF_ASPI_CE_OUT

C3

INF_ASPI_CLK_OUT

E6

INF_ASPI_DATA_OUT

D3

INF_ASPI_IO_GND

D6

INF_ASPI_IO_OVDD

NC

5188450M23

U100

39pF

C123DNP

39pF

C124DNP

39pF

NC

NC

C125DNP

TP532

TEST_POINT

1

NC

C103

1.0uF

SW_VCO_EN

MB_EXC_EN

MB_RX_EN

WB_RX_EN

SW_POS4

TEMP_SENSE_EN

SW_POS3

SW_POS2

MB_CKIH

WB_CKIH

9E_VDET

SW_VCA_AOC

GSM_PA_VBA

PA_VBA1

PA_VBA2

9E_VREFDET

SW_IX

SW_I

SW_QX

SW_Q

SW_ASPI_CE

SW_ASPI_CLK

MB_ASPI_CLK

MB_ASPI_DATA

WB_DCOC_IX

WB_DCOC_I

WB_DCOC_QX

WB_DCOC_Q

MB_TRK_CLK

MB_IX

WB_IX

MB_I

WB_I

MB_QX

WB_QX

MB_Q

WB_Q

MB_CM_IN

WB_CMODE

WB_TRK_CLK

SW_POS1

TX_EN_2V7

9E_VMODE

5W_VLD

HB_EN

LB_EN

TX_WB_EN

TX_EN

SPIWB_CLK

SPIWB_DW

SPIMB_DW

SPIMB_CLK

STBY_WB

SW_ASPI_DW

WB_AGC0

WB_AGC1

WB_AGC2

WB_AGC3

WB_AGC4

MBC_EN2

MBC_EN1

WB_LNA_BYP

MB_ASPI_CE

PAR_RX_DATA(6)

PAR_RX_DATA(7)

PAR_RX_FRAME

HAR_SPIMB_CE

SPIMB_DR

SPIWB_DR

PAR_TRX_CLK

PS_CLK_OUT

PAR_TX_FRAME

PAR_TX_DATA(0)

PAR_TX_DATA(7)

PAR_TX_DATA(6)

PAR_TX_DATA(5)

PAR_TX_DATA(4)

PAR_TX_DATA(3)

PAR_TX_DATA(2)

PAR_TX_DATA(1)

PAR_TX_DATA[7:0]

HAR_MB_RX_ACQ

STBY_MB

HAR_SPIWB_CE

PAR_RX_DATA[7:2]

HAR_MB_RX_SLOT

HAR_WB_RX_SLOT

HAR_MB_RX_ON

HAR_WB_RX_ACQ

HAR_WB_RX_ON

AOC_PWR_UP_DN

HAR_TX_PREKEY

HAR_TX_RAMP

HAR_TX_SLOT

SER_RX_DATA

SER_RX_CLK

SER_RX_FRAME

RESETB

PAR_RX_DATA(2)

PAR_RX_DATA(3)

PAR_RX_DATA(4)

PAR_RX_DATA(5)

background image

MFG CTRL CHK:

QA CHK:

REV:

Drawing Number:

Page:

TITLE:

Size:

Engineer:

Drawn by:

R&D CHK:

DOC CTRL CHK:

Of:

Changed by:

Time:

Date:

TX_RATTLER _MODULE

C

5

GSM/DCS/PCS and WCDMA Transmitters

4

C

50 Ohms

50 Ohms

GSM TX

B

WCDMA PA REF # (400 - 499)

A

4

E

A

50 Ohms

50 Ohms

50 Ohms

Temp Sensor REF # (880 - 889)

8

2

3

20

7

6

6

B

3

5

2

50 Ohms

50 Ohms

E

CLOSE TO MMM5092

DCS/PCS TX

D

1

D

20th July 2005

TRANSMITTER

TARAZED

P4

1:30:22 pm

AAT102

RATTLER

50 Ohms

4

50 Ohms

1

8

7

GSM/DCS/PCS PA REF# ( 800 - 829)

50 Ohms

C831
100pF

0

R202

0

R201

R212
330

10pF

C833

C410

1.5pF

B+

12pF

3.3nH

VRF_TX_2.775V

C221

5.6nH

L408

12pF

L409

.01uF

C415DNP

C834
10pF

C882

C881
.01uF

C406

10pF

C808

39pF

0

R406

10pF

C811

.01uF

BATT_I

C821

0.3pF

C403

C809
10uF

C822
2.0pF

L810

3.3nH

10pF

C816DNP

R200

39

0

R215

0

R830DNP

4.7uF

C200

L804

1nH

1

C807

10pF

TP205

TEST_POINT

C823
2.0pF

15pF

100

R807

C832

L212

82nH

C806
1.0uF

L213
82nH

10pF

C805
1.0uF

C201DNP

BATT_I

4.7uF

C400

C202

.01uF

.01uF

C204

VBA1

3

VBA2

4

VCC1

17

VCC2

15

VIB

18

VREF

1

GND7

16

GND_FLAG

22

LOADSW

6

NC1

5

NC2

8

NC3

12

RFIN

20

RFOUT

10

CP_OUT

14

ENABLE

2

GND1

19

GND2

21

GND3

7

GND4

9

GND5

11

GND6

13

U400

MMM5092

5189552N01

VPOS

4

10pF

C404

LM20BIM

5109768D12

2

GND0

5

GND1

1

NC

3

VOUT

1.0uF

C407

U880

0

R204

R803DNP

4.7uF

0

0.1uF

C802

C803

C420
4.7uF

1.0uF

C402

1.0uF

C401

0

R812

10uF

C801

10uF

C830

NC

C820
1000pF

R882

470

0

R802

0

VCC_VCO

32

VCO_EN

23

VGC

16

R217

Q_P_POS

19

REF

24

RF_OUT

6

SCK

1

SDI

2

TX_EN

15

VCC_DIG

26

VCC_MAIN

4

GND5

10

GND6

11

GND7

12

GND8

13

GND9

14

I_M_NEG

20

I_P_POS

21

Q_M_NEG

18

GND12

27

GND13

28

GND14

29

GND15

30

GND16

31

GND2

7

GND3

8

GND4

9

5188450M21

BIAS_STATE

25

CEB

3

CTGND

33

GND1

5

GND10

17

GND11

22

4.7uF

U200

BATT_I

C800

C203

8.2nH

L802DNP

31

VREF

.01uF

22

VCC3_4

27

VCCBIAS

VDET

14

13

VDETREF

15

VEND

VENH

28

34

VENL

3

VMODE

36

SIG_GND2

1

VBA1

VBA2

2

5

VCC1_2_1

24

VCC1_2_2

7

VCC3_1

8

VCC3_2

21

VCC3_3

19

GND7

20

GND8

GND9

23

RFIN1

33

29

RFIN2

11

RFOUT1

17

RFOUT2

35

SIG_GND1

26

GND11

30

GND12

32

GND13

6

GND2

9

GND3

12

GND4

16

GND5

18

GND6

U800

5188220Y02

10

CPIN

4

GND1

25

GND10

NC

VRF_TX_2.775V

VRF_TX_2.775V

0

R203

C815DNP

10pF

39pF

RF_IN_DCS_PCS

VCO_EN

C804

VGC

VENL

VENH

VEND

VMODE

REF

BB_QX

BB_Q

BB_IX

BB_I

9E_VREFDET

9E_VDET

TX_EN

WB_PA_VBA1

GSM_PA_VBA

WB_TX_OUT

WB_PA_VBA2

TEMP_SENSE_EN

SPI_ASPI_CLK

SPI_ASPI_DW

SPI_ASPI_CE

GSM_TX_OUT

DCS_PCS_TX_OUT

RF_IN_GSM

WB_PA_ENABLE

WB_PA_LOAD_SW

TEMP_SENSE


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