PLC
" Together with controllers standarisation also programming software
have been standarised.
" The standarisation requirements are only in form recomendations,
which collected in a norm IEC 1131  Programmable Controllers",
published in 1993.
" The most important is part 3 (IEC 1131-3 Programming Languages),
in which have been defined:
" Tekst languages:
 Instruction List (IL)  language similar to assembler,
 Structured Text (ST) similar to FORTRAN, PASCAL,
" Graphical languages:
 Ladder Diagram (LD)  modelled on switching schemes for relay circuis,
 Function Block Diagram (FBD),  modelled on switching schemes for
gates (AND, NAND, NOR, OR, NOT) circuis,,
 Sequential Function Chart (SFC)  designed for creation of programe
structure, in which other languages can be used.
Ladder Logic Program (LD)
" A ladder diagram consists of one line running down
the left side with lines branching off to the right.
" The line on the left is called the bus bar; the
branching lines, instruction lines or rungs.
" Along the instruction lines are placed conditions that
lead to other instructions on the right side.
" The logical combinations of these conditions
determine when and how the instructions at the right
are executed.
Ladder Logic Program (LD)
" Logical continuity  continuous path of TRUE condition
instructions is required to make the output instruction TRUE
" Program instructions are stored in part of the PLC memory
" Status of input devices & outputs is stored in data table of the
PLC memory
PLC - LD
" I I - normally oppened  connecter current when the variable is
Truth = 1,
" I/I - normally closed  connecter current when the variable is
False = 0,
" IPI - connecter current when the variable is changing from
False to Truth (from 0 to 1),
" INI- connecter current when the variable is changing from Truth
to False (from 1 to 0),
PLC - LD
" ( ) coil - output is equal to 1 when the current is
crossing it
" (/) negate coil is equal to 1 when the current is not
crossing it,
" (S) memory coil (SET)  the associate variable is
(stored) 1 and memorised when the current is
crossing it
" (R) reset coil (RESET) - the associate variable is
(reseted) 0 when the current is crossing the R coil
Funkcje
X -> 000.01
Y -> 010.01
X -> 000.01
Y -> 000.02
Z -> 010.01
BRAMKA XOR
X -> 000.01
Y -> 000.02
Z -> 010.01
PLC  LD (AND)
Instruction is executed
when IR bit 00000 is ON.
Instruction is executed
when IR bit 00000 is OFF.
PLC  LD (OR)
The instruction would have an ON execution condition when any
one of the three conditions was ON, i.e., when IR 00000 was OFF,
when IR 00100 was OFF, or when LR 0000 was ON.
PLC  LD (OR-AND)
Here, an AND is taken between the status of IR 00000 and that of IR 00001 to
determine the execution condition for an OR with the status of IR 00200. The
result of this operation determines the execution condition for an AND with the
status of IR 00002, which in turn determines the execution condition for an AND
with the inverse (i.e., and AND NOT) of the status of IR 00003.
PLC  LD (OUTPUT)
In the above examples, IR 01000 will be ON as long as IR 00000 is ON and
IR 01001 will be OFF as long as IR 00001 is ON. Here, IR 00000 and IR 00001
would be input bits and IR 01000 and IR 01001 output bits assigned to the Units
controlled by the PC, i.e., the signals coming in through the input points assigned
IR 00000 and IR 00001 are controlling the output points assigned IR 01000 and
IR 01001, respectively.
PLC  LD (AND-LD)
The two logic blocks are indicated by dotted lines. Studying this example shows
that an ON execution condition will be produced when: either of the conditions in
the left logic block is ON (i.e., when either IR 00000 or IR 00001 is ON), and
when either of the conditions in the right logic block is ON (i.e., when either IR
00002 is ON or IR 00003 is OFF).
PLC  LD (OR-LD)
To code diagrams with logic block instructions in series, the diagram must be
divided into logic blocks. Each block is coded using a LOAD instruction to code
the first condition, and then AND LOAD or OR LOAD is used to logically combine
the blocks.
Basics
Basics
SET will turn ON the operand bit when the execution condition goes ON, but unlike
the OUTPUT instruction, SET will not turn OFF the operand bit when the
execution condition goes OFF.
RESET will turn OFF the operand bit when the execution condition goes OFF, but
unlike OUTPUT NOT, RESET will not turn ON the operand bit when the execution
condition goes OFF.
In the following example, IR 20000 will be turned ON when IR 00100 goes ON
and will remain ON until IR 00101 goes ON, regardless of the status of IR 00100.
When IR 00101 goes ON, RESET will turn IR 20000 OFF.
Basics
The KEEP instruction is used to maintain the status of the operand bit based on
two execution conditions.
To do this, the KEEP instruction is connected to two instruction lines.
When the execution condition at the end of the first instruction line is ON, the operand
bit of the KEEP instruction is turned ON.
When the execution condition at the end of the second instruction line is ON, the
operand bit of the KEEP instruction is turned OFF.
On-delay Timer
Off-delay Timer
Counter (Up-Counter)
Sequence
In the erasing step sequence there is always only one active step. This sequence require an
additional contact. A setting impulse is required for each switching on of the sequence. Since the
contacts of relays have different switching periods, the erasing step sequence can be paused.
Therefore, erasing step sequences are used for the PLC-programming first of all.
In the continuous step sequence all steps are switched on sequentially. The last step erases the
self locking of the first relay, switching the whole sequence to the starting position. No setting
impulse is required. This step sequence type should be always used in circuits with relays.
Segregacja belek na podstawie długości
Segregacja belek na podstawie długości
0010.01  ruch taśmy
000.01,000.02,000.03 
czujniki
000.04  sygnał otwierający
drugi taśmociąg
Cylinder
02 03
500
03 510
10
02 506
10
" 0000 LD 0010
500
" 0001 OR 0500
" 0002 AND NOT 0011
500
10
" 0003 OUT 0500
" 0004 LD 0002
" 0005 OR 0506
11 03
506 510
02
" 0006 AND 0500
" 0007 AND NOT 0003
10 - START 11 - STOP
" 0008 OUT 0506
" 0009 LD 0003
" 0010 AND NOT 0002
500 506 510
" 0011 OR 0510
" 500 - PRACA AND 0500
0012
" 0012 AND NOT 0002
" 0013 OUT 0510
" 0014 END (01)
Cylinder should move all the time: from left to right
Start should initiate the movement: 500
NOTE:
What will happen if you press stopp when the drive is on one of end points (02, 03)
What will happen if you press start when the piston moves: 510
PLC - FBD
Uses a blocs which coresponds to logical gates
Inputs and outputs of the blocks are wired together with
connection lines, or links.
Single lines may be used to connect two logical points of
the diagram:
- An input variable and an input of a block
- An output of a block and an input of another block
- An output of a block and an output variable
The connection is oriented, meaning that the line carries
associated data from the left end to the right end.
The left and right ends of the connection line must be of
the same type.
PLC - FBD
>=1 : OR Logic Operation
Output Q4.0 is set (assign 1) when the
signal state is 1 at input I0.0 OR at input
I0.1.
PLC - FBD
& : AND Logic Operation
Output Q4.0 is set when the signal state
is 1 at input I0.0 AND I0.1.
PLC - FBD
The signal state is 1 at output Q3.1 when at
least one AND logic operation is
satisfied.
The signal state is 0 at output Q3.1 when no
AND logic operation is satisfied.
The signal state is 1 at output Q3.1 when
both OR logic operations are satisfied.
The signal state is 0 at output Q3.1 when
at least one OR logic operation is not
satisfied.
PLC - FBD
Negate Binary Input
Output Q4.0 is 1 when:
" the signal state at I1.0 AND I1.1 is NOT 1
" AND the signal state at I1.2 AND I1.3 is
NOT 1
" OR the signal state at I1.4 is NOT 1.
PLC - FBD
S : Set Output
R : Reset Output
Structural
Text (ST)
Structural Text (ST)
" IF condition
THEN execution1 (instruction)
" ELSE execution2
" CASE choice-condition
OF list of executions
& ..
& ..
ELSE other executions
PLC
Structural Text (ST)
" FOR starting value TO ending value BY step DO executions
& &
" WHILE condition DO
executions
" REPEAT
executions
& & & & & .
UNTIL condition
Sequention graph - Grafcet
" Grafcet consists of a number of steps, and to each
step one or more orders are connected, which will
be executed when the step is active.
" In order to move from one step to another, a
transition is used.
" For each transition there are transition conditions,
and the move can only take place when the
transition conditions have been fulfilled.
Sequention graph - Grafcet
" Every step (Step)  rectangle with a name
" At a beginning: Initial Step
" With every step set of activities are connected
" Transition between steps when conditions (in
LD, ST, IL or FBD) are fulfield (symbol:    )
Sequention graph - Grafcet
" A Step is used to describe a state in the process. The following applies
to a step:
 A step can be active or inactive.
 An attribute, Order , indicates whether the step is active or not.
 You can connect one or more orders to a step.
 The step can be allocated a name at your own discretion.
" In each sequence you must have an initial step (InitStep) which differs
from a usual step at the following points:
 You should only have one initial step in a sequence.
 When the program starts its execution, the initial step is active.
 You can always make the initial step active by setting
the reset signal.
" Transition (Trans) is used to start a transition
between an active and an inactive step.
" A logical condition, for instance a digital signal,
is connected to a transition, and determines
when the transition is taken place.
A Simple Straight Grafcet
Sequence
" A straight sequence is the most
simple variant of sequences.
" Sometimes you may require
alternative branches in your
program, for instance when you
have a machine, which can
manufacture three different
products.
" At the points where the production
differs, you introduce alternative
branches.
Sequece Selection
" The example in the figure shows the sequence
for a machine which can manufacture the three
products, Red, Green, and Blue.
" At the point of divergence, point 1 in the figure,
you choose the disired branch depending on
the product to produce.
" The alternative branches diverge from a step,
that is followed by one transition condition in
each branch.
" It is the constructors task to see that only one
of the transition conditions is fullfilled. If several
are fullfilled, which one that is selected is
undefined.
" At point 2 in the figure, the branches are
converging to a common step.
Parallel Sequences
" The example in the figure illustrates
the sequence for two machines,
which are drilling two holes at the
same time and independent of each
other.
" When the transition condition before
the parallel divergence (point 1 in the
figure), is fullfilled, the activity is
moved to both branches, and the
machines start drilling.
" The drilling is preformed
independent of each other.
PLC graf sekwencji