Block Diagram


Supports:
V_BR
VCC for GSM 1800 LNA - 13
CALIBRATION 47, 51, 46 13, 15, 23
VCC for OPLL & Phase detector - 15
6 1
U73
ANT 1 RF PORT GSM_T/R GSM TX VCC for IQ Modulator - 23
VCC for BaseBand - 46
RF Switch
(Both Low For RX)
V_BR (VCC)
Control RF VCC for RF Local Buffer & Divider - 47
VCC for Direct Conversion Mixers - 51
3 DCS_T/R DCS TX PSU
4
25
4
RXQN
1 8
2 90o 12
11 925-960MHz
5
U66
10
GSM_RX
7 RXQP
2
26
DIPLEXER
DCS_RX
1
Control Logic
1805-1880MHz R632
U72 8
6
9
27
6 RXIN
3
CONTROL
5
U75
FUNCTION
U67 10 90o 12
4, 7
RF ANTENNA
4 5 RXIP
5 3 28
TX / RX Switch EGSM RX GSM 1800 RX
Low Channel - 975 = 925.2Mhz Low Channel - 512 = 1805.2Mhz 41
35
Mid Channel - 37 = 942.4Mhz Mid Channel - 700 = 1842.8Mhz
IF 30
High Channel - 124 = 959.8Mhz High Channel - 885 = 1879.8Mhz RF VCO
V_SYN
PSU
Supports:
GSM 900 - 3700.8 Mhz - 3839.2 Mhz
1
VCC for IFVCO & Divider
GSM 1800 - 3604.4 Mhz - 3753.6 Mhz
VCC for IF Synth & TCXO Divider (!3Mhz)
2
VCC for RF Synth & TCXO I/P Buffer (13Mhz)
49
(SPI BUS) DATA
38
3
CLK
39
U64
RF BALUN
4 U843 4 VR3
1
50
2
TCXOEN
EGSM TX GSM 1800 TX
Low Channel - 975 = 880.2Mhz Low Channel - 512 = 1710.2Mhz
Mid Channel - 37 = 897.4.4Mhz Mid Channel - 700 = 1747.8Mhz
1
High Channel - 124 = 914.8Mhz High Channel - 885 = 1784.8Mhz 2 V_RX
U63 Phase Det 4
40
44
AFC
3 1
U85
RF VCO
Charge Pump
N
3 45
BS1
VBAT 1
37
13Mhz
2
U71
N
R616
PA
1
Attn
16
6
8
2
DCSPA
TX_DCS
4
12
IF SYNTH
CMOS
360Mhz
2 TX_GSM
10 1
GSMPA
BS
14
2
1
2
EGSM
DCS
2 BS1
5
U65
TX_ON
DCS
TX VCO
APC
110 8
4 BS2
VBAT
1
TX_ON_N
14 90o
R702
2
(I-Sense Resistor)
1
VBAT
U86
R706 R703 2
V_TX
8 1 2
RAMP
4
Buffer
+
(From Omega) EGSM
Phase Det
TX LOOP
17
7
Charge Pump
PAC IC
V_SYN FILTER
V to I
19, 20
Converter TXI
U74
Error
+
R624
Amp IQ MOD
TXQ
21, 22
V_RX
PC
Q700 - 2
5 6
(Enable)
U61
R705
(Limits O/P Pwr)
DUAL-BAND TRANCEIVER IC
RX_ON_N
VBAT
U90
GSM SERVICE SUPPORT GROUP 01.11.13
TX_ON_N RX SIGNAL PATH REFERENCE CLOCK
Dual Regulator
TCXOEN
LEVEL 3 RF Block Diagram Rev. 1.2
Orderable Part
TX SIGNAL PATH
Dual Band Amethyst
V_BR
Q700 - 1 V_TX
MAIN VCO SIGNAL PATH Non - Orderable Part
Michael Hansen, Ray Collins, Ralf Lorenzen-Scheil Page 1 of 2
TUNING VOLTAGES
DCSPA
GSMPA
Dual Band T191
E11
To U84 / U90 TCXOEN
U13
HERCULES U1
RTCINT
X1
From Omega ON_OFF D6 VBAT
RTC J2
POWER E10 ALERT
RX_ON
C6
LCD Connector
c
TX_ON
A11
E6
BU b 1
VLCD
PWT VBATBB
C2 BQ3
DCS_T/R E9 C34
2
BL GND
PWL B1 e
ACT
GSM_T/R B11
LCD
To RF Side
D2
TXDO
e 3
BS2 UART (To Headset Jack) Backlights
GND
D11
D3 RXDO
c b
b
B12
BQ2
PC IIC BL U7 c 4
F4 SCL SCL
ARM 7
Inter IC
C4 SDA
B13
BS1 e
5
Cntl. SDA
NRSTOUT
K11
LE H10
6
NRSTOUT
Keypad
IO0VIBRATOR b e
J1
Test Points 1 to 8 JTAG BQ4 Backlights
7
VR2
GPIO
IO1BATID_DET
J3
c
8
VR2
S_IO J13
M6 IO3DATA_HP_SEL
To / From Omega S_RST K14
SIM A7
IO13ACCIN 9
N/C
VBAT
S_CLK J14
NRAMCS
P7
B5 N/C 10
VIBRATOR
NRESET NBLE
G3
U6
K8
A1 M1
(To Omega)
NBHE DATA BUS
SRAM
From U61 13Mhz
G14 2M RAM K7 B2 VCHG
TIMER
G5 1Mbit
J1
ADD BUS
To Omega 13MOUT H14
MEM
POWER JACK
A2
U6
VR2
I/FACE
1
2 3 4
RNW
N8 B3
NFOE
L8 D8 F1
VCLKRX
G11 U5
NROMCS1
C48
D7
P6 HWID
VDX H12 VOICEBAND
FLASH
(To Omega)
FDP
H13
M9 B4
VDR MEMORY
Interface
H11
DATA BUS R77
32Mbit
VFSRX S1
COL 0 - COL 4
(Decides if unit is for
DAI ADD BUS EMEA or ASIA)
DSP
U17
RST, CLK, DI, DO
U5 VR2
Digt. Aud. Int.
G1
R62
ROW4 S1
D1
S1
Radio
VR3
SPI
COL 0 - COL 4 U18
Int.
G1 U16
S2
ROW 0 - ROW 3
F12, F13, F14, G13 G1
ROW 0 - ROW 3 D1
D1
U17
S2
R65
G2
BDR / BDX / BFSX / BFSR
U18 D2
G2
Hercules / Omega Control SPI BUS DATA
(To From U61) D2
CLK
Normal Charge
Trigger Charge (Phase 1 - Charging)
Trigger Charge (Phase 2 - Complete)
RTC BATTERY
D1 Over Voltage Mode
U4A
G5 H5 J5 K5
VCC1 K3
C9 TXI
BATTERY
VCC2 D2 C10 TXI
From VBATBB
BACKUP To U61
BASEBAND
CONNECTOR
VCC3 G3 BASEBAND SERIAL D8 TXQ
JP1
UPLINK
D9 TXQ
C1 PORT
VR1B VR1B - 2.0V
1
D1
VR2B - 2.0V
VR2B
2
E1
VR2 - 2.9V
VR2
E7 RXI
3
H1
BASEBAND
VR1 - 1.8V
VR1 E8
RXI
VBATBB
4
H10 OMEGA U3
From U61
VR3 - 2.9V DOWNLINK
(To Omega)
VR3 RXQ
E9
E10
RXQ
(RX Downlink)
SPI
RXDO
13MOUT
TSP
RX SIGNAL PATH
ICTL
F8
AFC
AFC
E3
Battery VBAT
To U85
E5
F9
APC Charger. Int
RAMP
U8 IBIC
TX SIGNAL PATH
E4 VCHG
To U74
BUS
H7
CNTL
MAIN VCO SIGNAL PATH
J8
USP H6 VCLKRX
VOICE
X2
IO13ACCIN
U14
J3 UPLINK Micro Proc. K7 VDX
MIC
To / From Hercules
Audio
K8
VFSRX TUNING VOLTAGES
VR2B_SW Ser. Port G7
Jack
H8
LS1
VR3 G6 VDR
H9
VOICE
SPKR REFERENCE CLOCK
U10 J9
DOWNLINK
S_IO
B2 Orderable Part
SIM I/Face
S_RST To / From Hercules
B3
3V / 5V
ADC
S_CLK
C4
LEVEL
Analog/Digital (To Hercules)
CLK Non - Orderable Part
1 ROW4
Converter
SHIFTERS B4
RST
VRPC
TXDO
SIM CONTACTS
3
Volt. Reg. and B5
(TX Downlink)
U2
Power up Ctnl. 2
I/O
D4
A2 4
E6 B5 A5 D6 B10 D10 D7 F6
VSIM
GSM SERVICE SUPPORT GROUP 01.11.13
NRESET
RTCINT
LEVEL 3 AL Block Diagram Rev. 1.2
(To Hercules)
ON_OFF
S19
PWON (To Power Switch - S19) PWON
TR1
TBAT Dual Band Amethyst
HWID
BATID
IO1BATID_DET Michael Hansen, Ray Collins, Ralf Lorenzen-Scheil Page 2 of 2
U15
KEYPAD MATRIX
I03DATA_HP_SEL
Dual Band T191


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