Sharp LM10P10 1024 X 768
<TBODY>Signal |
Pin No. |
PC530 Signal |
J8 |
J9 |
Description |
S |
20 |
OFLM |
17 |
38 |
Frame Signal ( Vsync ) |
CP1 |
21 |
OLP |
19 |
43 |
Data Latch ( Hsync ) |
CP2 |
22 |
XCLK |
21 |
41 |
Data Shift Clock |
VDD |
25 |
+5FUSED |
18 |
26 |
+5V Logic Power |
VSS |
23 |
GND |
14 |
30 |
Logic Gnd |
VSS |
24 |
GND |
10 |
24 |
Logic Gnd |
VSS |
3 |
GND |
8 |
20 |
Logic Gnd |
VSS |
5 |
GND |
6 |
16 |
Logic Gnd |
VSS |
6 |
GND |
4 |
10 |
Logic Gnd |
VEE |
26 |
+VLCD |
46 |
22 |
Positive LCD Bias |
DU0 |
7 |
PNL3 |
7 |
7 |
Upper Data |
DU1 |
8 |
PNL2 |
5 |
5 |
Upper Data |
DU2 |
9 |
PNL1 |
3 |
3 |
Upper Data |
DU3 |
10 |
PNL0 |
1 |
1 |
Upper Data |
DU4 |
11 |
PNL11 |
35 |
23 |
Upper Data |
DU5 |
12 |
PNL10 |
33 |
21 |
Upper Data |
DU6 |
13 |
PNL9 |
31 |
19 |
Upper Data |
DU7 |
14 |
PNL8 |
29 |
17 |
Upper Data MSB |
DL0 |
15 |
PNL7 |
15 |
15 |
Lower Data |
DL1 |
16 |
PNL6 |
13 |
13 |
Lower Data |
DL2 |
17 |
PNL5 |
11 |
11 |
Lower Data |
DL3 |
18 |
PNL4 |
9 |
9 |
Lower Data |
DL4 |
19 |
PNL15 |
43 |
31 |
Lower Data |
DL5 |
20 |
PNL14 |
41 |
29 |
Lower Data |
DL6 |
21 |
PNL13 |
39 |
27 |
Lower Data |
DL7 |
22 |
PNL12 |
37 |
25 |
Lower Data MSB</TBODY> |
Jumper Settings: J5 1-2, J12 1-2, J16 1-2, J6 1-2, J7 2-3, J11 1-2