66716

66716



set up just after the propagation delays of used elements (on contrary to synchronous systems

operating with a speed determined by a clock frequency). However, this speed is occupied by

existence of some requirements that have to be taken into consideration at the design stage, to

assure the desired operation of the Circuit. These requirements are given below

1.    Only one input signal can be changed at a time. Since this requirement is always satisfied in

reality, hence the designer is not allowed to assume the possibility of simultaneous change of two (or morę) inputs.

2.    Each next change of input State can be done after time t needed to make internal State of

automata settled.

3.    It is strongly recommended (not always required, as explained below) to assume at the design

stage that only one internal State signal can change as the result of a change of input State. The

reason is similar to requirement no. 1. If the designer allows at the design stage the simultaneous

change of two internal State signals (what is impossible in reality) the phenomenon called race will

occur. However, the race does not always cause erroneous operation of the Circuit. Therefore it is

possible to design Circuit with a race if it is non-critical or driven one. But it is necessary to avoid

critical race sińce the design with it can make erroneous operation of the Circuit.

The design of the asynchronous sequential logie circuits can be madę with the use of Switching

Sequence Table (SST) or Huffman^ method. Both methods give possibility for implementing the

memory błock with or without flip-flops. The advantage of SST method is that it always designs

circuits without a race. However its drawback is that using this method it is unable to obtained

Meal/s machinę (which is sometimes simpler comparing to Moore's machinę). Huffman^ method

is morę universal, sińce it is possible to design both types of circuits with it.



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