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POLITECHNIKA

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ES software model - initialization procedures

Initialization sequence:

Processor

initialization

• Intterupts disable, cache clearing

"    P rnrpccnr

• Data copy from ROM into RAM memories

•    Cache, interrupt vectors, system hardware initializations

•    Zeroing memory

•    Multitasking environment initialization, interrupt and root qs

stacks creation    loading/booting

•    Initialization of l/O ports, drivers, setup networks _

RTOS and Multi-tasking: tasks divisions and scheduling,

Interrupts services

Architektura Systemów Wbudowanych    17