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CIRCUIT

CELLAR

®

www.circuitcellar.com

T H E M A G A Z I N E F O R C O M P U T E R A P P L I C AT I O N S

$4.95 U.S. ($5.95 Canada)

WIRELESS COMMUNICATIONS

Wireless Data Acquisition

Frequency Synthesizers

Wireless Temperature Sensors

Solution to RF Interference

#149 December 2002

SK-78ST

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The picL is a PIC 16F877

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The EG9013 is a 6.3" monochrome LCD.
With an inventory of over 25,000 pieces,
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ow often do you get to hear of a deal with no

strings attached? I know it seems like never, so this

issue may pleasantly surprise you. We’ve collected a

group of superb articles to aid you in your wireless designs.

And the best part is, the authors’ solutions don’t add any obstacles too difficult to

overcome. So, whether you’re looking for a new wireless sensor, or to clean up

the RF in your system, or to get all of those products from different manufactur-

ers to work together, there’s an article in this issue for you.

Many companies are proceeding into the wireless market. Imagine what kinds

of advances could be accomplished with the coupling of some of these powerhous-

es. Two of the industry’s first-rate manufacturers, Future Electronics and Microchip,

did just that, and the result is impressive. Together, they created the rfPICDEM1

wireless sensor demo board set. You’ve read Fred Eady’s column for six years now,

so you know you’re getting an expert opinion when he backs a product. According

to Fred, with the rfPICDEM1 in hand, wireless sensor applications are “dead easy.”

Another person you trust for quality information and applications is columnist

Jeff Bachiochi. This month, Jeff weighs in on the wireless topic with some valuable

advice about RF designing. He recommends switching to spread spectrum (SS)

transmission for your wireless systems. Jeff provides analysis of the options—

frequency hopping and direct sequence—that will help you determine which

method suits your needs the best. Briefly, FHSS can help you pick up weak sig-

nals, but on the other hand, DSSS can offer higher data rates. The most signifi-

cant perk to SS though is that you can decrease pesky RF interference.

When you’re trying to eliminate troublesome mountainous piles of wires, the

task can tax your patience. Going wireless sometimes means working with fre-

quencies in the ISM bands, which can affect the interoperability among devices

because of various proprietary standards. Mohammed Rana Basheer addresses

this basic problem and offers a much-appreciated solution. He says not to get

too frustrated, because Bluetooth looks like the perfect answer to the short-range

wireless connectivity issue. Looking down the road, one global standard for

short-range wireless communication could lead to endless possibilities.

We hope you find these articles useful in your efforts to eliminate the wires.

Keeping you abreast of technological developments and introducing thought-pro-

voking applications is our goal each month. That’s why we were excited to hear

that one of our readers planned his next project after reading one of our articles.

Inspired by a previous article by Robert Lacoste, “A Tracking Lab Power

Supply” (

Circuit Cellar 139), Brian Millier examined his own workbench. Space had

always been a problem, because the tabletop was littered with tools, parts, and a

PC to program and test MCUs. After reading about Robert’s project, he started

thinking about ways to create a better work environment. Unlike Robert’s needs,

Brian’s applications usually require little power. Thus, he designed a small, low-

capacity power supply to replace its bulky predecessor. So, while you’re making

your life easier by cutting the wire clutter, you might want to take a look at the

clutter on your workbench, too.

4

Issue 149 December 2002

www.circuitcellar.com

CIRCUIT CELLAR

®

EDITORIAL DIRECTOR/FOUNDER
Steve Ciarcia

MANAGING EDITOR
Jennifer Huber

TECHNICAL EDITOR
C.J. Abate

WEST COAST EDITOR
Tom Cantrell

CONTRIBUTING EDITORS

Ingo Cyliax
Fred Eady
George Martin

George Novacek
Jeff Bachiochi

NEW PRODUCTS EDITOR
John Gorsky

PROJECT EDITORS
Steve Bedford
Ken Davidson
David Tweed

ADVERTISING

PUBLISHER

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CIRCUIT CELLAR®, THE MAGAZINE FOR COMPUTER APPLICATIONS (ISSN 1528-0608) and Circuit Cellar Online are pub-

lished monthly by Circuit Cellar Incorporated, 4 Park Street, Suite 20, Vernon, CT 06066 [phone]. Periodical rates paid at

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Circuit Cellar® makes no warranties and assumes no responsibility or liability of any kind for errors in these programs or schematics or for the
consequences of any such errors. Furthermore, because of possible variation in the quality and condition of materials and workmanship of read-
er-assembled projects, Circuit Cellar® disclaims any responsibility for the safe and proper function of reader-assembled projects based upon or
from plans, descriptions, or information published by Circuit Cellar®.

The information provided by Circuit Cellar® is for educational purposes. Circuit Cellar® makes no claims or warrants that readers have a right to
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construct or operate any of the devices described herein under the relevant patent or other intellectual property law of the reader’s jurisdiction.
The reader assumes any risk of infringement liability for constructing or operating such devices.

Entire contents copyright © 2001 by Circuit Cellar Incorporated. All rights reserved. Circuit Cellar and Circuit Cellar INK are registered trademarks
of Circuit Cellar Inc. Reproduction of this publication in whole or in part without written consent from Circuit Cellar Inc. is prohibited.

CHIEF FINANCIAL OFFICER

Jeannette Ciarcia

CUSTOMER SERVICE

Elaine Johnston

ACCOUNTANT

Jeff Yanco

ART DIRECTOR

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GRAPHIC DESIGNER

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Cover photograph Ron Meadows—Meadows Marketing

PRINTED IN THE UNITED STATES

h

No Strings Attached

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See www.abidata.be for details

6

Issue 149 December 2002

CIRCUIT CELLAR

®

www.circuitcellar.com

Wireless Data Acquisition Using Bluetooth
World Without Wires

Mohammed Rana Basheer

Interfacing with Frequency Synthesizers

John Teller

Vector-SoC
A 1-GHz Vectorial Network Analyzer

Robert Lacoste

ARMs to ARMs
Part 2: Delving Deeper into the World of ARM

Robert Martin

Quad Bench Power Supply

Brian Millier

I

APPLIED PCs
A Wireless Temperature Sensor Stew

Fred Eady

I

ABOVE THE GROUND PLANE

HTML Front Panels
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FROM THE BENCH

Smart RF Designing
Don’t Put All of Your Eggs in One Basket

Jeff Bachiochi

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ROBOTICS CORNER
A Low-Power Photoflash

Tom Baraniak

I

SILICON UPDATE
Hot Chips, Cold Sweat

Tom Cantrell

COLUMNS

ISSUE

Task Manager
Jennifer Huber
No Strings Attached

New Product News
edited by John Gorsky

Advertiser’s Index
January Preview

Priority Interrupt
Steve Ciarcia
Why-Fi?

4

8

94

96

149

10

20

36

24

FEA

TURES

40

52

Contest Related Articles

66

72

76

62

Check out AVR today at www.atmel.com/ad/fastavr

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© 2002 Atmel Corporation. Atmel and the Atmel logo are registered trademarks of Atmel Corporation.

R

8

Issue 149 December 2002

CIRCUIT CELLAR

®

www.circuitcellar.com

NEW PRODUCT

NETWORK CAMERA MODULE

The iiCam is a network camera that can be easily

integrated with existing survailence applications like
security cameras, and kiosk systems. It functions as a
small complete camera without a PC and can be directly
connected into the Internet. You can monitor remote
locations by installing a camera anywhere Ethernet con-
nectivity is available. You only need a PC to access all
of the cameras that are hooked into the Ethernet.

The device offers a more

stable and faster network con-
nection compared to cameras
that are designed by S/W
TCP/IP technology running
on an RTOS. Because it is
built on hardwired TCP/IP
technology, it doesn’t need
any RTOS; that guarantees
higher data transmission
speed. Additionally, it sup-
ports UDP, ARP, ICMP,
DHCP so that customers can
easily customize more func-
tions for their own applica-

tions. The iiCam also povide powerful customization
capabilities such as live-image web browsing, Internet
audio functionality, and wide expandability for diverse
survailence applications.

It is designed with a CMOS sensor, i386, and MJPEG

type compression. The device supports four concurrent
channels and dynamic IP allocation (DHCP) with vari-
ous interfaces like a serial device using RS-232C, LAN,

cable modem, and ADSL
with PPPoE STB. It delivers
15 frames per second and
measures only 115 × 60 ×
34 mm. Video modes are 640 ×
480 in VGA and 320 × 240 in
downsized QVGA.

The iiCam is priced at less

than $200. This new product
is available as a module or
stand-alone product.

i

2Chip, Inc.

[phone]
www.i2chip.com

NEWS

Edited by John Gorsky

www.circuitcellar.com

CIRCUIT CELLAR

®

Issue 149 December 2002

9

NEWS

NEW PRODUCT

WIRELESS TRANSCEIVER WITH TRANSPARENT PROTOCOL

The transceiver supports point-to-point, point–to-

multipoint, and multipoint-to-multipoint configura-
tions. To establish a secure communication link, the
AC4424 employs a user-selectable identification num-
ber embedded into the firmware. Only modules with
identical ID numbers will synchronize.

The transceivers are available with output power

ratings of 10 mW, 100 mW, and 200 mW, operating
from a 5-V power supply. Power-saving modes allow
manufacturers to put AC4424s to sleep and conserve

power while still maintaining synchro-
nization—a useful feature for hand-
held devices.

The AC4424 is approved by the FCC,

IC, and ETSI and is available with a
number of antenna styles to suit various
applications. The modules start at $89
(1000-unit price for a 10-mW commer-
cial temperature unit).

Aerocomm
[phone]
www.aerocomm.com

The AC4424 is a powerful yet easy to use 2.4-GHz

FHSS transceiver. Using a unique transparent protocol
(RF-232) simplifies the wireless integration process by
allowing for true plug-and-play installation.

RF-232 guarantees successful communication while

making the process invisible to the OEM. As each
AC4424 transceiver receives raw data, RF-232 manages
over-the-air protocol to gain acknowledgements, send
retries, check errors, and other features unique to RF
that newcomers to the discipline typically forget about.
Headers, data packet length, and CRCs
are not needed.

The AC4424 operates in two RF proto-

col modes: Acknowledgement (ACK) or
Streaming (STRM). In ACK mode, suc-
cessfully transmitted packets are
acknowledged back to the sender. If
unsuccessful, they are resent up to a user-
selectable number of retries. STRM mode
is useful for audio/video or other applica-
tions where occasional missed data is
allowed. STRM enables high-speed con-
tinuous transmission of data without the
delay of waiting for ACK.

10

Issue 149 December 2002

CIRCUIT CELLAR

®

www.circuitcellar.com

ave you ever

wondered about

what keeps your PC,

printer, mouse, key-

board, and web cam glued onto your
favorite desk? The interconnecting
wires, of course! But isn’t the clutter
too much of a price to pay for that?

Some initial solutions to this were

proposed using short-range wireless
connectivity with frequencies in the
industrial, scientific, and medical
(ISM) bands. Though this was some-
what successful in reducing the mess,
there was little scope for interoper-
ability among devices because of their
proprietary standards. For instance, a
printer and laptop could be intercon-
nected only if they were bought from
the same manufacturer.

These and a host of other problems

made such initiatives less feasible. But
this is going to change for the better.
Bluetooth technology was originally
developed by Ericsson, but it’s now
controlled by the Bluetooth Special
Interest Group (SIG)—a consortium
of more than 1000 technology com-
panies. The technology offers the
promise of a global standard for
short-range wireless communication
among an ever-increasing variety of
devices and peripherals.

The fancy name for this short-range

wireless connectivity protocol comes
from the Viking king, Harald
Bluetooth, who united Scandinavia in
the tenth century after years of fight-
ing and destructive competition.
Today, Bluetooth is following the
eponymous path to establish a com-
mon platform for communicating
between disparate types of computing
devices. Beyond the colorful origin of
its name, Bluetooth is a compelling
new radio technology that opens up a
world of opportunity for uniting and
empowering mobile device users.

THE SPECS

Bluetooth includes the following

features: a maximum data rate of 750
kbps; a master-slave communication
model; an operating frequency that’s
globally available within the 2.4- to
2.5-GHz ISM band with spread spec-
trum technology; a frequency hopping,
full-duplex signal at 1600 hops per
second; 79 frequencies with a 1-MHz
interval to provide noise immunity; and
a royalty-free standard. Additionally,
Bluetooth enables devices to be the
master of seven slaves forming a net-
work called a piconet, several of which
can be interconnected to form a larger
network called a scatternet.

ROK 101 007 is a Bluetooth module

developed by Ericsson. In this article, I
will demonstrate how you can inter-
face this module to an 8051 microcon-
troller variant from Cygnal (i.e., the
C8051F022). Because this microcon-
troller comes with a built-in ADC and
DAC, you can use the circuit as a
wireless analog data acquisition and
generation unit.

Wireless Data Acquisition
Using Bluetooth

h

The possibilities for
Bluetooth seem end-
less. In this straight-
forward project,
Mohammed interfaced
an Ericsson ROK 101
007 Bluetooth module
to an 8051 micro. If
you follow his lead,
you’ll soon have your
own wireless analog
data acquisition and
generation unit.

Mohammed Rana Basheer

FEATURE
ARTICLE

World Without Wires

Photo 1—

The data acquisition board is an essential

part of my master’s thesis project. Notice the yellow
wires protruding from beneath the Bluetooth module.

www.circuitcellar.com

CIRCUIT CELLAR

®

Issue 149 December 2002

11

controller includes firmware for the
host controller interface (HCI), which
handles all of the communication
with an external host (e.g., a micro-
controller). The host and baseband
controller communicate with each
other through a UART or USB inter-
face (see Figure 1).

The UART implemented is a stan-

dard 16C450 that supports the follow-
ing data rates: 300, 600, 900, 1200,
1800, 2400, 4800, 9600, 19,200,
38,400, 57,600, 115,200, 230,400, and
460,800 bps. TXD and RXD pins pro-
vide the data flow, while *RTS and
*CTS are used for the flow control.

The USB is a high-speed (12 Mbps)

slave device that’s compliant with
USB specification 1.1. Data transfer
occurs through the bidirectional ports
D+ and D–. Additionally, two side-
band signals, Wake_Up and DETACH,
are also provided for proper interface
with a host such as A laptop or micro-
controller that employs power manage-
ment features. The flexibility in using
either the UART or USB interface
makes this module ideal for interfacing
with a variety of microcontrollers.

Because my objective was to inter-

face the ROK 101 007 to the Cygnal

C8051F022 microcon-
troller, which doesn’t
have a USB interface, I
had no other option but
to go for the UART.
Using a UART, however,
comes with a speed penal-
ty. The maximum data
rate possible through the
UART interface is only
460.8 kbps, which is less
than the theoretical max-
imum data rate of
760 kbps stated in the
Bluetooth specification.

Another practical prob-

lem was that my micro-
controller was not fast
enough to generate a high
data rate of 460.8 kbps.
Therefore, I programmed
the microcontroller’s
UART to send data at the
default data rate for ROK

100 007 (i.e., 57.6 kbps),
further reducing the com-
munication speed.

Currently, I’m using the board

shown in Photo 1 as a smart sensor
for my master’s thesis work. Smart
sensors are nothing but a bunch of
analog sensors connected to a micro-
controller that provides some local
processing of collected data before
sending it to the master unit. A low-
power, short-range wireless network
forming what are called ad-hoc net-
works interconnects these modules.

ROK TO THE RESCUE

Wireless communication was a big

issue when I built my first robot
years ago. I used an AM transmit-
ter/receiver working at 330 MHz as
my short-range wireless data link.
Although it was plagued with a lot
of data transmission errors, it provid-
ed me with an almost reliable half-
duplex point-to-point wireless link.
As the scope of my project grew with
thoughts about building a coopera-
tive network of robots, my tempo-
rary solution became inadequate.
Thus, I started searching for a more
concrete solution.

Essentially, I wanted to have the

ability to network the robots I build
without using wires. At the same
time, I sought a means to
provide a uniform stan-
dard to write my net-
working protocol above
this standard without the
hassle of rewriting it
each time I bought a new
wireless device from a
different vendor.

When I was introduced

to the ROK 101 007
module, I suddenly real-
ized that this tiny beast
was what I had been
looking for. The module
offered me all that I
needed: a reliable full-
duplex communication
link; the ability to form
small networks called
piconets; compliancy
with Bluetooth version
1.0B; low-power con-
sumption; and a range of
10 m (0 dBm). At $70 per
unit, the module is sort
of expensive; however,

the price is expected to come down to
$5 when the technology catches up.

The module itself is compact (3.3 ×

1.7 × 0.365 cm), and its golden metal
covering provides excellent RF shield-
ing. In addition, the module has a
50-

Ω

antenna interface for the best

signal strength performance.

The only problem with this module

is that it’s hard to solder. Because its
leads are beneath the module, sophis-
ticated equipment is required to per-
form this kind of surface-mount sol-
dering. The initial prototype that I
built in the research lab had the
Bluetooth module attached to the PCB
with wires, as shown in Photo 1.

If you’d like to see how the leads

protrude from beneath the module,
you may download a diagram from the
Circuit Cellar

ftp site. Note that the

ftp site also contains the pin layout,
pin description, and helpful notes per-
taining to the module.

ROK 101 007 INTERNALS

Three major sections constitute the

ROK 101 007 module: a baseband con-
troller, flash memory, and a radio that
operates on the globally available 2.4-
to 2.5-GHz ISM band. The baseband

UART

USB

PCM

Baseband

T6

I2C

_

Clk

I2C Data

TXD

C3
B5

*RTS

A5

A6
B6

C1
B4

A1
A2
A3
A4

PCM_IN

PCM_SYNC

PCM_OUT

PCM_CLK

D–

D+

Wake_Up

DETACH

B1
B2

Loop
filter

V

CO

Tank

Radio
ASIC

RX

Balun

TX

Balun

Switch

Antenna

filter

13-MHz

Crystal

C5

T5

T4

R4
R5

R6

T2

RESET#

R3

Voltage

regulation

Flash

memory

POR

Address

Data

Central

C4

C6

C2

B3

R1

R2

T1

T3

ANT

GND

GND

GND

GND

GND

V

CC

_IO

V

CC

ON

Radio module

PBA 313 01/2

NC
NC
NC

NC

NC

NC

*CTS

*RXD

Figure 1—

The two main sections are the baseband controller, represented by the large rec-

tangular block on the top left, and the Bluetooth radio PBA 313 1/2, represented by the
shaded block on the bottom. The baseband controller is a StrongARM processor that pro-
vides three types of input interface: USB, UART, and PCM. The PBA 313 01/2 Bluetooth
radio uses GFSK modulation over a frequency-hopping 100-MHz channel.

need for endian conversion, but the
Keil compiler for the 8051 microcon-
troller uses big-endian format and
needs conversion to little endian
before the parameters can be trans-
ferred to the Bluetooth module.

The opcode (2 bytes) uniquely iden-

tifies different types of commands. It’s
divided into opcode group field (OGF)
and opcode command field (OCF). The
former of the two identifies the differ-

12

Issue 149 December 2002

CIRCUIT CELLAR

®

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The default is the data rate to which

the module’s firmware configures its
UART after a reset. To achieve a high-
er data rate, the module can be config-
ured through software to one of the
supported higher values. These config-
uration settings are sent through the
serial interface to the Bluetooth mod-
ule at the default data rate. Hence,
any microcontroller acting as the host
to the ROK 101 007 module should
support a data rate of 57.6 kbps.

The ROK 101 007 supports two

types of connections: the asynchro-
nous connectionless link (ACL) for
data and the synchronous connection
oriented link (SCO) for voice. Because
I was more interested in transmitting
data than voice, the software that I
wrote supports only ACL links.

CONTROLLING THE ROK

The software included on the

Circuit Cellar

ftp site will enable you

to set up a simple piconet using the
HCI commands. The HCI provides a
uniform command interface to the
baseband controller, link manager, and
hardware status registers. The differ-
ent groups of commands supported by
HCI are: the Link Control and Policy
commands; Host Controller and
Baseband commands; Informational
commands; Status commands; and
Testing commands.

The HCI Link Control and Policy

commands provide the host with the
ability to make connections to other
Bluetooth devices in its vicinity. The
Host Controller and Baseband com-
mands, in addition to the Informational
and Status commands, provide the
host access to various registers in the
baseband controller. As the name sug-
gests, Testing commands provide the
ability to test various functionalities
of the Bluetooth hardware.

The structure of an HCI command

packet is depicted in Figure 2a. The
maximum size of an HCI command
packet is 255 bytes. According to the
Bluetooth specifications, all parame-
ters have to be sent or received in lit-
tle-endian format. This means a hex
word like 0x1234 is sent/received as
0x34 0x12. If you are writing the
Bluetooth-controlling software in a
Windows environment, there is no

ent groups of command as mentioned
above, while the latter identifies a
command within a group. The para-
meter’s total length (1 byte), as shown
in Figure 2a, is the length of all of the
parameters contained in the packet
measured in bytes.

In addition, note that each com-

mand has a specific number of parame-
ters (i.e., event parameters) associated
with it. Which parameters and the size
of each of the parameters are defined
for each command (see Figure 2a).

Because the HCI commands take

different amounts of time to com-
plete, the result of a command is
reported back asynchronously in the
form of event packets. For example,
most of the commands will return the
Command Complete event with the
necessary return parameters piggy-
backed on it. The maximum size of
such an event packet is up to 255
bytes. The format of an HCI event
packet is shown in Figure 2b.

In Figure 2b, an event code (1 byte)

is used to identify events. The para-
meter’s total length (1 byte) designates
the length of all of the parameters in
the packet (measured in bytes). Again,
each event has a specific number of
parameters associated with it. These
parameters as well as the size of each
parameter are defined for each event.

Most of the HCI commands receive

a Command Complete event after a
command is executed completely.
However, some of the commands (e.g.,
CREATE_CONNECTION, which is
issued for establishing a connection
with a remote Bluetooth device) do not
return the Command Complete event.
Instead, such commands receive the
Command Status event when they
have started executing the command.
When the action associated with the
command is complete—which, in this
case, is the rejection or acceptance of
the connection request by the remote
Bluetooth device—an event (Conn-
ection Complete) associated with the
Send command (CREATE_CONNEC-
TION) is sent to the host.

If the command status event has

returned an error, then the event associ-
ated with the command won’t be sent.
In this case, the command status event
will return an appropriate error code.

Opcode

OCF

OGF

Parmeter 1

Parameter

total length

Parameter 0

Parameter…

Parameter N–1

Parameter N

•
•
•

0

4

8

12

16

20

24

28

31

Event code

Event parameter 1

Parameter

total length

Event parameter 0

Event parameter N–1

Event parameter N

•
•
•

0

4

8

12

16

20

24

28

31

Connection handle

PB

flag

Data total length

0

4

8

12

16

20

24

28

31

Event

parameter 2

Event

parameter 3

Data

BC

flag

Connection handle

Reser

ved

Data total

length

Data

0

4

8

12

16

20

24

28

31

a)

b)

c)

d)

Figure 2a—

HCI commands provide a uniform interface

to the baseband controller. The 12-bit opcode identifies
a unique HCI command, and the 8-bit parameter length
restricts the maximum payload for an HCI command
packet to 255 bytes. b—The HCI event packets are
received asynchronously in response to an HCI com-
mand. HCI event packets are also received to indicate
that a new Bluetooth device is found or a connection
has been successfully established with a remote
device. c—ACL packets are used for data exchange
between Bluetooth devices. The connection handle
identifies the Bluetooth module to which this packet is
being transmitted or the Bluetooth device from which
the packet was received. The PB flag identifies if this is
the starting HCL packet or a continuation of the previ-
ous one. The BC flag indicates whether or not the
packet is sent in a point-to-point communication (i.e.,
when the master wants to communicate with a specific
client or the master is broadcasting this message to all
clients). d—The SCO packets are used for transmitting
voice packets. Currently, the software doesn’t support
the transmission of voice packets.

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CIRCUIT CELLAR

®

Issue 149 December 2002

13

or SCO_DATA state, the data pack-
ets are read and stored on a buffer.
When in the EVT_DATA state, the
event parameters are read and action
is taken on them.

Currently, the software does not

handle SCO data packets. Hence, after
a SCO packet indicator is received,
the data and header that follow the
SCO packet indicator are simply
dropped. The ACL data is stored on a
255-byte ACL data buffer. When the
buffer overflows, the HCI flow control
mechanism prevents additional data
from being sent to this Bluetooth
device until the application program
starts emptying the data from the
ACL data buffer.

HOW THE CODE WORKS

The entire source code was written

in C and compiled using the Keil
8051 compiler. The most important
component of the software is the
implementation of the HCI finite
state machine. You may download
the complete implementation of the
HCI state machine from the Circuit

Cellar

ftp site.

The

HCI_event_handler

function is the entry point for
this state machine. The global
variable

hci_current_state

holds the current state of the
state machine.

The

HCI_event_handler

function is periodically called
from a timer interrupt service
routine that is set to a moderate
period of 2 ms. This ensures
that the HCI state machine will
work in the background, while
the application program can

work in the foreground.

All of the HCI events are han-

dled by the state machine with
the

process_event function.

Because this is a minimal

The third type of packet that the

HCI layer handles is the data packet
that’s used to exchange data between
Bluetooth modules. Data packets are
associated with both ACL and SCO
data types. There can be only one
ACL connection between two
Bluetooth modules, although three
simultaneous 64-kbps SCO links
could be set up between any two
Bluetooth modules.

The format of the HCI ACL data

packet is depicted in Figure 2c. The
connection handle (12 bits) identifies
an ACL connection with any remote
Bluetooth module. This handle is
received in the ConnectionComplete
event after a CREATE_CONNECTION
command or AcceptConnection com-
mand has been issued and the connec-
tion was successfully completed.

The packet boundary flag (2 bits)

identifies whether the packet is a frag-
mented packet of a higher layer or is
the first packet of a higher layer. A
value of 00 is reserved for future use;
01 is a continuing fragment packet of
Higher Layer Message; 10 is the first
packet of Higher Layer Message (i.e.,
the start of an L2CAP packet); and 11
is reserved for future use.

The broadcast flag (2 bits) identifies

whether the packet is broadcast to all
of the active slaves, broadcast to all of
the slaves during Parked mode (low-
power mode), or just a point-to-point
transmission. The data total length
(2 bytes) is the length of the data
measured in bytes.

SCO packets are used for

transmitting voice data. As I
mentioned before, ROK 101 007
can support three 64-kbps voice
channels simultaneously. The
format of an HCI SCO connec-
tion is shown in Figure 2d.

In short, the four kinds of HCI

packets that can be sent via the
UART are: HCI command pack-
et, HCI event packet, HCI ACL
data packet, and HCI SCO data
packet. Command packets can
be sent only to the Bluetooth
module while HCI events are
received from the Bluetooth
module. The HCI ACL and SCO
data packets can be sent in both
the directions.

Because all of these packets are

sent via a common physical inter-
face, which is the UART in this case,
a packet indicator is used to identify
the packet type. The packet indicator
is the first character that will be sent
through the serial interface before
the data corresponding to that packet
is transmitted (see Table 1). This
helps the receiver to identify the for-
mat of the subsequent data arriving
via the UART.

HCI STATE MACHINE

Like most protocol, communica-

tion with the HCI layer can be
implemented effectively with a finite
state machine. Figure 3 shows the
HCI state machine I implemented.
Here, circles represent the states and
arrows represent the transitions
between them. The label on each
transition shows what HCI receives to
cause the transition.

The software starts in Idle state.

When an appropriate packet identifier
is received, the state machine switch-
es to the ACL_HDR, SCO_HDR, or
EVT_HDR state. In this state, the HCI
state machine receives the packet
header. The header contains informa-
tion about the size of the data packet
following it or the size of the parame-
ters in case of events.

After reading this information, the

state machine switches to the
ACL_DATA, SCO_DATA, or
EVT_DATA state. In the ACL_DATA

Figure 3—

The state machine starts in the Idle state and transitions to

one of the HDR states, depending on the packet identifier received
through the serial interface. During this stage, the packet header is
read and identifies the size of the payload that it’s carrying. The pay-
load is read in the subsequent data stage. The state machine then
returns to the original Idle state and waits for a packet identifier.

Idle

ACL

header

SCO

header

EVT

header

ACL
data

SCO

data

EVT
data

Begin

Read ACL

data

ACL_PKT

SCO_PKT

EVT_PKT

Read ACL

header

Read SCO

header

Read EVT

header

Read EVT

data

Read SCO

Anything

HCI Packet type

HCI Packet indicator

Command

0x01

ACL Data

0x02

SCO Data

0x03

Event

0x04

Table 1—

The HCI packet indicator is the first byte to

be sent/received through the UART. This byte identifies
the packet format that’s about to be sent/received from
the Bluetooth module through the UART.

14

Issue 149 December 2002

CIRCUIT CELLAR

®

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respectively. The INQUIRY command
results in the Bluetooth device becom-
ing a master, searching for another
Bluetooth device in its vicinity to con-
nect. The

write_scan_enable com-

mand results in the Bluetooth device
periodically scanning for masters that
are trying to connect to it. The slave
Bluetooth device should not issue the
Inquire command; it should stop after
the

write_scan_enable command.

The master Bluetooth device should
issue both of the commands.

The moment a master finds a slave

Bluetooth module in its vicinity, the
process_inquiry event handler is
called. One of the module’s draw-
backs is that the devices have to be
in Complimentary mode before a
connection can be established. More
specifically, one module has to be
the master and the other has to be
the slave before a connection can be
established. This is particularly diffi-
cult when you’re trying to build a
dynamically configured network in
which all modules are equal and
have to automatically configure to
form a network.

As you now know, the Inquiry HCI

command issued by the master will
result in all Bluetooth devices in its
vicinity being reported to it through
the

process_inquire event. The

default implementation for the
process_inquire event is to issue the
CREATE_CONNECTION command
to establish a connection with the
Bluetooth device that it found. You
can provide some additional value to
this event handler by checking for
the class of the slave device before
allowing the connection to be estab-
lished. The slave will receive the
process_connection_request
event when the master issues the
CREATE_CONNECTION command.
The slave has the option to reject the
connection request or accept it.

Again, I wrote the default imple-

mentation to accept the connection.
Remember that you can check for
the class of the master device before
accepting the connection. The
reject_connection_request com-
mand rejects the connection request,
and the

accept_connection_request

command will accept the incoming

Bluetooth implementation, only
some of the HCI event handlers are
implemented.

It’s interesting to study the

sequence of events that result when a
connection is established with anoth-
er Bluetooth device. After hard reset,
the microcontroller sets up its UART
for a 57.6-kbps data rate and starts a
periodic timer. The timer interrupt
service routine calls the state machine
entry point

HCI_event_handler

function periodically.

The ROK 101 007 Bluetooth mod-

ule’s firmware is written to configure
its UART to a 57.6-kbps data rate after
hard reset. Because both devices are
configured at the same data rate, they
are then ready to talk.

In order to initialize the Bluetooth

module’s buffers, the microcontroller
issues a soft reset command to the
Bluetooth module by sending the reset
HCI command through the UART.
After the Bluetooth module has been
reset, the most immediate task is to
set up a flow control between the two
devices. Without the flow control,
there is a high probability of over-
whelming the data buffers of the
receiver by sending data to it at a rate
faster than it can consume.

The flow control implemented in

the Bluetooth module is simple: just
notify the other one about your mem-
ory limitation. First, the microcon-

troller learns about the Bluetooth
module’s buffer limitation, and then
it advertises the buffer limitation to
the Bluetooth module. The microcon-
troller issues the

read_buffer_size

HCI command to read the maximum
size of the ACL or SCO packet that
can be sent from the microcontroller
to the Bluetooth module. Next, the
microcontroller issues the

Host_

buffer_size command to notify the
Bluetooth module about the maxi-
mum size of the ACL or SCO packet
that can be sent to it. Now, the
devices know about each other’s
buffer space limits; hence, it should
segment the data according to these
sizes before sending to the other.

After the flow control has been set

up, the Bluetooth devices can enable
authentication or set up the encryp-
tion to have a more secure communi-
cation. The minimal Bluetooth imple-
mentation that I wrote does not use
any of these. Before the Bluetooth
modules can start searching for neigh-
bors to connect, a few timeout param-
eters have to be set up. These timeout
parameters are analogous to the TCP
connection timeout parameters.

The final two commands that con-

figure the Bluetooth module to
either search for neighbors or do
nothing but wait for a master to con-
nect are the INQUIRY command and
write_scan_enable command

Figure 4—

This simple circuit interfaces the Bluetooth module with the Cygnal 8051 microcontroller. The only tricky

part is the antenna. Make sure you avoid any ground planes going beneath the antenna strip in the PCB. The
22-MHz crystal is used to generate the required data rate of 57.6 kbps. The JTAG connector provides in-system
programmability and debugging. Apart from these components the entire circuit is simple and pretty easy to build.

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18

Issue 149 December 2002

CIRCUIT CELLAR

®

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connection. But if the slave
accepts the connection, then
both the master and the slave
will receive the

process_

connection_complete event
signaling the end of the con-
nection establishment proce-
dure. The two Bluetooth
devices are now ready to trans-
fer data packets between them.

As soon as a connection has

been established, the applica-
tion program can call the
HCI_receive_data function
to read the ACL data packets
and use the

HCI_send_to_bd

_addr or HCI_send_to_han-
dle function for sending ACL
data to a Bluetooth device.
The

HCI_broadcast command is also

provided to send the data to all of the
connected Bluetooth devices.

The software included on the

Circuit Cellar

ftp site contains a

visual C++-based program for the
real-time plotting of the analog data
on a PC (see Photo 2). This is in addi-
tion to the entire 8051 program for

controlling the Bluetooth module
written in C. I used the Keil compiler
for compiling the C code.

The best part about the source

code is that with minor changes on
the supporting files, UART.C and
timer.C, you can run it on almost
any microcontroller. The only
requirement is that the microcon-

troller be fast enough to
generate the required data
rate of 57.6 kbps.

THE CONTROLLER

The C8051F022 microcon-

troller is a fully integrated,
mixed-signal, system-on-a-
chip unit with 64 digital I/O
pins. It has a high-speed,
pipelined, 8051-compatible
microcontroller core that can
provide up to 25 MIPS.

With a JTAG (IEEE 1149.1)

serial adapter you can have
the flexibility of an in-sys-

tem, non-intrusive debug
interface. Additionally,
64 KB of in-system program-

mable flash memory and 4 KB of on-
chip RAM provides enough code and
data space for a medium-sized pro-
gram to completely reside within the
microcontroller and work without
additional hardware.

The C8051F022 has a 12-bit, 8-

channel ADC and two 12-bit DACs.
By adding an external 22-MHz crystal,

Photo 2—

Take a look at the Windows program for the real-time plotting of the

analog data transmitted by the wireless Bluetooth device. The ADC input is con-
nected to a signal generator. The result, as you can see, is a sine wave.

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19

it’s not capable of generating the
required data rate of 57.6 kbps, so an
external 22.1184-MHz crystal is used
for generating the required data rate.
You may download descriptions of
the circuit’s pins from the Circuit
Cellar

ftp site.

I used a 5000-mAH, 3-V non-

rechargeable lithium battery as the
power supply source. You could use
two AA batteries to generate the
required voltage. I chose the lithium
battery because of its longer life. With
a lithium battery, the entire module is
expected to work continuously for at
least a week.

One important thing to be taken

care of is the antenna. You could use a
traditional whip antenna, but they
tend to be large and obtrusive. I devel-
oped a prototype that incorporated an
integrated inverted F antenna (IIFA) so
that it could be printed on top of the
PCB. Figure 5 shows the IIFA geome-
try, the feed point, and the ground
connection for the antenna.

BUILD THE PROTOTYPE

There aren’t too many components

to be soldered. I designed and fabricat-
ed a multilayered PCB. Care should be
taken during PCB layout design to
avoid any ground or power lines run-
ning beneath the antenna.

The first prototype I built had

numerous routing mistakes. Tracks
were missing and unnecessary pins
were connected together—the over-
all result of bad layout design.
Temporarily, I corrected them by
breaking a few tracks that were not
needed and soldering wires where
tracks were missing. I hope you will
do a better job than I did.

The finished board wasn’t particu-

larly clean, but it looked cute. I also
included a memory expansion slot for
adding additional memory in case I
become ambitious in the future. A
10-pin standard JTAG male connector
was also provided for in-system pro-
gramming and debugging facility.

After all of the components are

placed and double checked for missing
tracks and connections, you can
download the software onto the
microcontroller. First, reset the
Bluetooth module and then start the

the microcontroller can generate the
required data rate of 57.6 kbps. The
operating voltage range for this micro-
controller is 2.7 to 3.6 V, which is
entirely within the operating voltage
range for the Bluetooth module.

Perhaps the most unique enhance-

ment over other 8051 microcon-
trollers is the digital crossbar. This is
essentially a large digital switching
network that allows the mapping of
internal digital system resources to
port I/O pins on P0, P1, P2, and P3.
The on-chip counter/timers, serial
buses, HW interrupts, ADC start-of-
conversion input, comparator out-
puts, and other digital signals in the
controller can be configured to
appear on the port I/O pins specified
in the Crossbar Control registers.
This allows you to select the exact
mix of general-purpose port I/O and
digital resources needed for the par-
ticular application.

Before you start working with this

microcontroller, I suggest you acquire
a few basic development tools. First,
it would be better to download the
latest IDE from the Cygnal web site
because it provides excellent debug-
ging facilities. You’ll also need the
JTAG EC2 serial adapter and the stan-
dard JTAG cable for exploiting the full
potential of the in-system debugging
facility. The cable and serial adapter
are available on the Cygnal web site
for a nominal price.

THE CIRCUIT

As you can see in Figure 4, the

entire circuit is simple. The Bluetooth
module and the microcontroller are
the major components in it. Although
the C8051F022 has an internal clock,

Mohammed Rana Basheer is a gradu-
ate research assistant in the Intelligent
Systems Center at the University of
Missouri-Rolla. Currently, he is work-
ing on implementing a wireless sensor
network using Bluetooth. He may be
reached at [e-mail].

PROJECT FILES

To download the code and pinout
diagram, go to ftp.circuitcellar.com/
pub/Circuit_Cellar/2002/149/.

SOURCES

C8051F022 Microcontroller
Cygnal Integrated Products, Inc.
[phone]
www.cygnal.com

ROK 101 007 Bluetooth module
Ericsson Microelectronics
[phone]
www.ericsson.com

8051 Compiler
Keil Software, Inc.
[phone]
www.keil.com

MAX233
Maxim Integrated Products, Inc.
[phone]
www.maxim-ic.com

Ground

Feed

l

s

h

w

Ground plane

s (cm) 0.54
h (cm) 0.6
w (cm) 0.1
l (cm) 2.5

Figure 5—

An integrated inverted F antenna (IIFA) is

used to avoid the normal whip antennas, which tend to
be obstructive and large. They’re nothing but a different
configuration of the quarter-wave dipole. The values
given in this diagram have been chosen for the best
voltage standing wave ratio (VSWR) in the frequency
range of 2.42 to 2.48 GHz.

software. At that point, your
Bluetooth module will be ready to
start sending the data. If you want the
data to be displayed in real time on
your PC, the only thing you need to
do is remove the microcontroller from
the circuit and connect the UART
pins from the Bluetooth module to the
RS-232 serial port of your PC through
a MAX233 chip. Make sure that you
interconnect the UART/RS-232 pins
in the null-modem fashion.

FUTURE CONSIDERATIONS

Perhaps in a future article, I will

explain how this wireless data acquisi-
tion unit can be used to form an ad-
hoc network. Ad-hoc networks that
use Bluetooth will find application in
military, chemical, and other indus-
tries where a rapidly deployable wire-
less network is needed. Updates on
the article will be posted on my home
page (www.umr.edu/~mrbxcf).

I

20

Issue 149 December 2002

CIRCUIT CELLAR

®

www.circuitcellar.com

ecently, I was

given the task of

writing the interface

to a new radio. The radio

was a fully synthesized design with a
received signal strength indicator (RSSI)
line, which was to be monitored and
used for fine-tuning. The interface to
the radio synthesizer (also known by
one of its constituent parts, the phase-
locked loop) was through the microcon-
troller’s SPI port, and the RSSI was read
through one of the A/D channels.

I figured this would be a straightfor-

ward exercise in datasheet study along
with the perusal of example code that
I would find on the Internet. Well, it
didn’t turn out that way at all! I ended
up doing a lot more research into the
details of what makes a synthesizer
and how it relates to the rest of the
circuitry in a radio.

This article is a condensation of

the bits and pieces of knowledge that
I acquired in order to understand and
program the synthesizer (and, hope-
fully, the other synthesizers I will
run into). Because most of my exper-
imentation took place on the VHF
and higher amateur radio bands, I
will concentrate my attention on
those bands.

BASIC RECEIVER DESIGN

In the VHF and higher amateur

radio bands, frequency modulation
(FM) traditionally has been the most
common modulation. An FM signal is
produced by shifting the transmission
frequency up or down in accordance
with the input signal.

“Deviation” is the term used to

describe the change in frequency; it’s
the amount the frequency swings
from the center in one direction. For
communications-grade voice trans-
missions, a 5-kHz deviation amount
is sufficient. The first packet radio
systems were designed with this
constraint, and they were limited to
running 1200 bps using audio fre-
quency-shift keying (AFSK). These
days, there are many more advanced
schemes—such as Gausian minimum
shift keying (GMSK)—that fit 9600 bps
into the same bandwidth as the old
1200-bps systems.

Many FM receivers are of the single-

conversion, superheterodyne design
(see Figure 1). Single-conversion means
the signal is converted from one fre-
quency to another one time before it’s
fed into the detector, where it’s con-
verted to a base-band signal. The base-
band signal can be audio to a speaker
or demodulator for conversion into a
bitstream. In the case of a synthesized
or frequency-agile receiver, a synthe-
sizer replaces the local oscillator (LO).

Interfacing with Frequency
Synthesizers

r

Designing an RF cir-
cuit can be a difficult,
time-consuming
endeavor. Interfacing
to the hardware, on
the other hand, should
be a breeze after you
peruse this guide to
programming a syn-
thesizer. John’s real-
world application will
prepare you for a proj-
ect of your own.

John Teller

FEATURE
ARTICLE

Figure 1—

This is a simple way to analyze the single-conversion superheterodyne receiver. By “single-conversion”

I mean that the receiver is converted from its original frequency to an intermediate frequency one time before the
detector singles out the data.

Band-pass filter

Band-pass filter

F

Amplifier

Detector

BB

Amplifier

To

demodulator

Local

oscillator

www.circuitcellar.com

CIRCUIT CELLAR

®

Issue 149 December 2002

21

The phase detector takes the two

inputs and adjusts its output up or
down until the divided VCO frequen-
cy is not only at the same frequency
as is the divided reference frequency,
but also follows along in the same
phase (i.e., phase locked).

Let’s use the previous example

again. Say you have a 12.8-MHz refer-
ence and you want a 5-kHz step size.
That means you’ll need a reference
divide ratio of 2560. Now, to divide
the desired VCO frequency of 157.2
MHz down to 5 kHz, you’ll need a
divide ratio of 31,440. As you can see,
there’s nothing too hard here; it’s
more like sixth-grade arithmetic!

But things do get tricky. Because

low-power direct dividers are practi-
cally unavailable for frequencies above
50 MHz, synthesizer designers use
high-speed prescalers that are designed
specifically to divide by a specified
amount. Fixed prescalers present a
problem, because the synthesizer step
size ends up being some multiple of
the prescaler value. Modern design
techniques use what is called a dual
modulus, or pulse swallow, prescaler.
Figure 3 illustrates how the dual mod-
ulus prescaler works.

The frequency of interest arrives at

the antenna along with just about
every other signal in the area. The
antenna will filter out a lot of the
undesired signals; however, because its
main function is to gather the desired
signal, a band-pass filter performs
most of the filtering. The band-pass fil-
ter is designed to accept the frequency
range of interest with little attenua-
tion, at the same time removing any
signals and noise outside that range.

Sometimes, a preamplifier precedes

the first filter for better weak-signal
performance. The filtered signal is
then fed into a mixer, along with a
clean sine wave that’s generated by a
local oscillator or synthesizer. The
mixer converts the input frequency
into an intermediate frequency (IF),
which is then filtered to remove
everything except the desired signal.
Next, the signal is amplified by the IF
amplifier and fed into the detector. In
an FM receiver, the detector is a dis-
criminator that converts the changes
in frequency into voltage levels.

LO FREQUENCY SELECTION

In order to determine the frequency

to which the LO should be set, you
have to understand the basic function-
ality of the mixer. It’s a basic building
block sporting two inputs and one
output. Into one input goes the incom-
ing signal at its original frequency, and
into the other goes the output from
the LO. The output consists of the
sum and difference of the two inputs,

as well as the inputs themselves. You
choose whether to use the sum or
difference during the design or selec-
tion of the LO.

An example would be a desired

input frequency of 146.50 MHz,
which would be converted down to
10.7 MHz (a common IF) with high-
side injection. High-side injection
means the LO output is higher than the
input frequency. Note that injecting a
frequency that’s lower than the input
frequency is termed low-side injection.

The desired LO frequency is just

the sum of the input frequency and
the IF, or 157.2 MHz. In this case,
the output of the mixer would be
146.50, 157.2, 303.7, and 10.7 MHz,
and the IF filter removes everything
except the 10.7-MHz output. If you
had specified a low-side injection, the
desired LO frequency would be the
difference, or 135.8 MHz.

THE SYNTHESIZER

Instead of a fixed LO, a frequency-

agile receiver uses a synthesizer to
generate an equivalent frequency. As
you can see in Figure 2, a synthesiz-
er consists of several simple build-
ing blocks.

A voltage-controlled oscillator

(VCO) generates the synthesizer’s out-
put. VCOs are oscillators that can be
made to change their operating fre-
quency by varying the voltage on their
control input. The other oscillator is a
reference that’s divided down to the
desired frequency step size by the refer-
ence divider. The output from the VCO
is fed into a variable divider set so
that the desired VCO frequency divid-
ed by the value it contains will equal
the output of the reference divider.

Divider

Phase detector

Reference

oscillator

DC

amplifier
and filter

VCO

Reference

divider

To mixer

Figure 2—

The VCO is controlled by the phase detec-

tor, which phase locks the VCO output to the reference
oscillator. The synthesizer setup is simple.

÷N/÷(N+1)

Prescaler

A Counter

To phase

detector

From

VCO

M Counter

Prescaler control

Programmable values

Figure 3—

The prescaler is set to divide by a value N

or N + 1. The M and A counters are decremented while
the prescaler divides by N + 1. The M counter alone is
decremented when the prescaler divides by N.

Audio

amplifier

Modulator

VCO

Multiplier

Multiplier

Microphone

Antenna

Multiplier

Power

amplifier

Figure 4—

In the example I’m explaining, the VCO has to be quite stable; its output is multiplied in frequency by

the multiplier stages until the desired output frequency is reached. Modulation is achieved by swinging the VCO
around its center frequency.

REAL-LIFE APPLICATION

Now let’s get into an example

application. In this example, you
have a radio capable of covering the
entire amateur VHF band between
144 and 148 MHz. The specifications
are listed in Table 1.

The National PLLatinum frequency

synthesizers are a good choice for
this application because of their low
cost and low-power features. The
chip is controlled through a
Microwire serial interface, which is
similar to the Motorola serial periph-
eral interface (SPI).

Basically, the interface is a shift reg-

ister into which you shift the config-
uration data most significant bit
first, with each bit shifted in on the
rising edge of the clock. The timing
is not particularly critical; in fact, a
PC parallel port can serve quite well
as a controller.

I wrote my example code in C; it

runs nicely on a venerable XT under
DOS 3.3. In addition, I used the
Borland C++ 3.1 compiler, another
fine archeological specimen. You can
download the program from my web
site at www.spottydog.us.

If you were to look at the LMX2306

datasheet, you’d see that there
are three configuration streams
to be programmed into the
chip. [1] Each stream ends with
two control bits that differen-
tiate the streams one from
another. The A and M
(National calls it B) counters
are shifted in one after the
other; they’re followed by their
two control bits. The R divider
is shifted in by itself, along
with its control bits. Finally,
there are some set-up bits
(determined by the synthesizer
designer) to be shifted in along
with their control bits. These
set-up bits, along with the ref-
erence (R) bits are written only
one time during synthesizer
initialization. Only the stream
containing the A and B counter
values need to be shifted in for

a frequency change.

In this example, you would

shift in the numbers provided
in Figure 6. The same calcula-

The disadvantages of this design

are myriad. First of all, the design is
rather complex. Secondly, each stage
requires numerous variable compo-
nents that have to be tweaked on a
regular basis because they can age.
Finally, each stage must be physical-
ly shielded from its neighbors, or
parasitic oscillations and other
garbage will manifest themselves on
the transmitted signal.

Modern FM transmitters are basi-

cally synthesizers that are set up to
directly produce the desired output
frequency (see Figure 5). To modulate
the output, the reference oscillator is
configured to be a VCO with a limited
swing. To modulate the transmitter,
the base band signal is applied to the
reference, which then swings the out-
put of the synthesizer. The synthesiz-
er’s output is amplified to the desired
power level and fed to an antenna.

22

Issue 149 December 2002

CIRCUIT CELLAR

®

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A dual-modulus prescaler just

means that it divides its input by a
number (N) part of the time (usually
by a power of two such as 8, 16, 32,
64, or 128), and by N + 1 the rest of
the time (e.g., 9, 17, 33, 65, or 129).
The A counter is set up to count
down the N + 1 prescaler output,
while the M counter—also referred
to as the B counter—works with the
N

count. When the M counter counts

down to zero, it resets itself and the
A counter, and the process restarts.
The end result is a total division
ratio of MN + A.

Working with the previous example

again and assuming a

÷

64/65 prescaler,

the total division ratio would be
31,440. To set the values of the A and
M counters, simply divide 31,440 by
64 and get 491 with 16 remaining.
That means you set A to count for
16 cycles and M to count for 491. It’s
kind of quirky, but if you look at
M as counting off the whole
prescaler output counts, and A
as “swallowing” the remainder,
it is a little easier to work with.

TRANSMITTERS

Prior to the 1970s, an FM

transmitter consisted of a low-
frequency VCO (i.e., less than
10 MHz) that was modulated
directly by the audio source.
This was then fed through a
series of frequency doublers
until the required frequency
was reached. Finally, the multi-
plier output was amplified to
whatever power was required
(see Figure 4).

The advantage of this system

was that the VCO did not have
to swing particularly far in order
to produce decent deviation and
be designed to be stable. The
multipliers affected not only the
VCO output frequency, but also
multiplied the frequency swing.

Figure 5—

The synthesizer con-

tains a VCO, which does not
have to be particularly stable;
instead, it relies on a reference
frequency for its stability. Slightly
swinging the reference modu-
lates the transmitter.

Tuned frequency:

= 146.50 MHz

IF:

= 10.7 MHz

Channel step size:

= 5 kHz

Receive VCO

= 157.2 MHz

Frequency:
R:

12.8

× 10

6

÷ 5000

= 2560

M:

(157.2

× 10

6

÷ 5000) ÷ 8

= 3930

A:

(157.2

× 10

6

÷ 5000) Modulo 8 = 0

Transmit VCO

= 146.50 MHz

Frequency:
M:

(146.5

× 10

6

÷ 5000) ÷ 8

= 3662

A: (146.5 × 10

6

÷ 5000) Modulo 8 = 4

Figure 6a—

Take a look at the calculations for determining the divisor

values required to tune a VHF frequency. Modular arithmetic means
you’re looking for the remainder of a division. b—For a better under-
standing, here’s yet another example of the divisor calculations. In this
instance, notice that the transmit and receive frequencies are not the
same; this is a common occurrence.

Receive frequency:

= 147.21 MHz

Transmit frequency:

= 147.81 MHz

IF :

= 10.7 MHz

Channel step size:

= 5 kHz

Receive VCO

= 157.91 MHz

Frequency:

R: 12.8 × 10

6

÷ 5000

= 2560

M: (157.91 × 10

6

÷ 5000) ÷ 8

= 3947

A: (157.91 × 10

6

÷ 5000) Modulo 8

= 6

Transmit VCO

= 147.81 MHz

Frequency:

M: (147.81 × 10

6

÷ 5000) ÷ 8

= 3695

A: (147.81 × 10

6

÷ 5000) Modulo 8

= 2

Audio

amplifier

Modulator

Reference

Synthesizer

Power

amplifier

Microphone

Antenna

a)

b)

including the mathematically gory
stuff, go to Zarlink’s web site and
download application note AN182. RF
circuit design sometimes can be an
occult art, but at least interfacing to
the hardware doesn’t have to be!

I

www.circuitcellar.com

CIRCUIT CELLAR

®

Issue 149 December 2002

23

tions work for a radio receiving on
147.21 MHz and transmitting on
147.81 MHz (see Figure 6b). As you
analyze Figures 6a and b, notice that
the R bits do not change between the
two instances.

EXAMPLE SOFTWARE

The example software that I wrote

is extremely simple. It would never
serve as the user interface for any
radio; however, I think it’s helpful for
understanding how synthesizers work
and checking out a new design.

The program begins by asking you

for the basic information required to
control any synthesizer. It also asks
questions pertinent only to a synthe-
sizer based on a National LMX2306;
this would be an area to change for
other applications. At this point, the
initialization information is written
to the synthesizer.

Finally, the program presents you

with a small menu that allows the
synthesizer to be set to either a
receive or transmit frequency. The
menu also allows you to quit. I com-
mented in the source code to help
point out any oddities, so I hope it
will be simple to follow. You may
download the code for this project
from the Circuit Cellar ftp site.

THIRSTING FOR MORE?

I have attempted to include all of

the information you would need to
program a synthesizer in this article.
However, I didn’t try to teach you
how to actually design one, because
that is a topic several people have
devoted entire books to!

If you’re interested in obtaining

more information on this subject,

Specification

Value

Maximum frequency

148 MHz

Minimum frequency

144 MHz

Channel spacing

5 kHz

Reference oscillator

12.8 MHz

Intermediate frequency

10.7 MHz

Injection

High side

Synthesizer

LMX2306

Table 1—

Specifications for the VHF band coverage

between 144 and 148 MHz outline a transceiver
(transmitter/receiver) capable of covering the Amateur
2 Meter band. National Semiconductor made the syn-
thesizer of choice.

John Teller is an embedded systems
engineer with 15 years of experience.
Currently, he’s a contractor for
SpaceQuest, a Virginia-based manu-
facturer of small satellites. John is as
comfortable with a soldering iron as
he is with a keyboard. Although
satellites are his primary interest, he
admits to having worked on other
embedded applications (and even a
PC application or two). John may be
reached at [e-mail].

SOURCES

C++ 3.1 Compiler
Borland Software Corp.
[phone]
www.borland.com

LMX2306 PLLatinum frequency
synthesizer
National Semiconductor Corp.
[phone]
www.national.com

PROJECT FILES

To download the code, go to
ftp.circuitcellar.com/pub/Circuit_
Cellar/2002/149/.

RESOURCES

The Amateur Radio Relay League,
“The ARLL Handbook for Radio
Amateurs,” 79th ed., 2002,
www.arrl.org.

Zarlink Semiconductor, Inc.,
“Designing Single Loop Frequency
Synthesisers,”AN182, Issue 3.1,
1999.

REFERENCE

[1] National Semiconductor Corp.,
“LMX2306/LMX2316/LMX2326
PLLatinum Low Power Frequency
Synthesizer for RF Personal
Communications,” DS100127, 2002.

24

Issue 149 December 2002

CIRCUIT CELLAR

®

www.circuitcellar.com

igital stuff is fun.

If you’re an elec-

tronics-addicted guy

like me, someday you’ll

have the urge to investigate the high-
frequency radio field, full of its strange
circuit behavior and magic black boxes
such as frequency converters and mix-
ers. This can be fun, too, but it can
become a real nightmare without the
basic test instruments adapted to the
frequency range you’re using.

Unfortunately, RF test equipment is

extremely expensive, even on the used
market, because it’s more than useful!
One of the most useful pieces of
equipment—just after the ubiquitous
spectrum analyzer—is the RF network
analyzer and, more specifically, the
vectorial network analyzer (VNA).

In principle, a VNA is quite simple.

It’s designed to apply a frequency ramp
to the device you’re testing, measure
the signal at the output of the device,
and plot the corresponding gain and
phase transfer curves over frequency.
Hewlett Packard (now Agilent) pro-
vides some excellent VNAs, but
they’re still extremely expensive, even
for equipment that’s 10 or 20 years old.
By the way, you’ll find some interest-
ing documentation concerning VNA
basics on the Agilent web site.

I’ve spent plenty of time looking at

ads and going to auctions, trying to
convince myself that I really needed
to buy a full-featured VNA. Two issues,
however, kept me from closing the
deal: the lack of space in my basement
and absence of a legitimate business-
related reason! But then came along the
PSoC Design Challenge 2002 contest—
a good trigger to try the do-it-yourself
approach. The result of my involve-
ment in the contest is the Vector-SoC,
which is a medium-performance, low-
cost VNA that’s built around a Cypress
CY8C26443 chip (see Photo 1).

The Vector-SoC is a PC-based

instrument: it’s connected to a PC
through a high-speed 57.6-Kbps serial
line. In addition, the user interface is
a friendly Windows-based software
with a real-time refresh of all curves
and measurements (2.5 frames per sec-
ond on my PC).

And what about the Vector-SoC’s RF

performance? The Vector-SoC offers full
coverage from 0 to more than 1 GHz in
one band with 50-kHz resolution. It
achieves an accurate measurement of
gains and losses from 5 to –35 dB over
the entire range with a 0.25-dB resolu-
tion (up to –45 dB from 0 to 300 MHz).
Additionally, the phase measurement is
from –90° to 90° with a resolution of 3°
(all with a 100% factory adjustment-
free design). Not too bad for a device
built with less than $200 worth of
components, is it?

These impressive specifications

were achieved mainly because of sim-
ple architecture and the use of the
following highly integrated compo-
nents: Mini-Circuits’s RF modules,
Analog Devices’s AD8302 RF gain
and phase measurement chip, and, last
but not least, Cypress’s CY8C26443

Vector-SoC

d

Touting the use-value
of a vector network
analyzer is an easy
task for any RF enthu-
siast. Coming up with
a convincing reason
to purchase a VNA,
however, is more diffi-
cult, especially
because they can be
expensive and bulky.
So, try Robert’s do-it-
yourself approach.

Robert Lacoste

FEATURE
ARTICLE

A 1-GHz Vectorial Network Analyzer

Photo 1—

The prototype was fitted into a pretty 6

″

×

7

″

× 1

″

plastic enclosure. The front panel is simplistic,

involving only the input and output RF SMA connectors
and a tricolor status LED. This front panel was printed
on a colored transparency and glued onto the alu-
minum plane.

CONTEST WINNER

www.circuitcellar.com

CIRCUIT CELLAR

®

Issue 149 December 2002

25

THE RF GENERATOR

The details of the RF gener-

ator are shown in Figure 2.
This block is mainly built
around Mini-Circuits SMD
components. Because no VCO
can be trimmed down to 0 Hz,
two VCOs are needed.

The first, V1, is an

ROS2160W wide-band VCO
that provides an output signal
from 1160 to 2160 MHz when
the control voltage ramps
from 0.5 to 20 V. The second
VCO, an ROS-1500, generates
a 1000- to 1500-MHz signal;

it’s automatically adjusted by
the firmware to provide a
1160-MHz intermediate fre-
quency. These two signals are

then mixed with a SYM-25DLHW
integrated mixer, providing a 0- to
1000-MHz signal with a –3.5-dBm
level. You may download more infor-
mation concerning this strange unit
from the Circuit Cellar ftp site.

In order to reduce the spurious fre-

quencies as much as possible, all of a
mixer’s inputs and outputs should
always go through filters. In particu-
lar, the filters block signals moving
from the mixer back to the VCOs.
This is important because these sig-
nals may be mixed within the VCOs
by a nonlinear component, producing

PSoC device. If you don’t
remember this Cypress chip,
you should check the Circuit
Cellar

archives.

In this article, I will present

you with the project’s overall
design. Note that I’ve tried to
make the article readable even
for those of you who are
novices when it comes to high-
frequency designs.

OVERALL ARCHITECTURE

Figure 1 provides you with a

clear view of the Vector-SoC’s
global architecture, as well as
the frequency and level of the
main signals. It’s conceptually
and physically split into four
subsystems, all of which are
separated from each other with good
RF shields.

First, an RF generator module gener-

ates the test signal from 0 to 1 GHz.
Two analog voltages—one for each of
its internal voltage-controlled oscilla-
tors (VCOs)—coming from the PSoC
microcontroller drive the module. The
first VCO generates an 1160- to 2160-
MHz signal, while the second is set to
a fixed 1160-MHz signal. The two out-
puts are mixed, filtered, and amplified,
giving 0 to 1 GHz. A mixer multiplies
two RF signals of frequency F1 and F2,
and gives on its output a sum of sig-
nals at frequencies F1 + F2, F1 – F2,
and all other possible linear combina-
tions (e.g., 12 × F1 – 3 × F2). A filter
then selects the required frequency.
Thanks to two RF splitters, this mod-
ule provides three copies of the output
signal: one that goes to the device
being tested; one that’s used as a refer-

ence; and one that goes to a frequency
measurement module.

The second module is the receiver

itself, which gets the reference signal
from the generator, as well as the signal
that went through the device being
tested. It scales them, computes the
gain and phase delta between the two,
and gives them as two analog values
read back by the PSoC microcontroller.

The third module is a simple

prescaler that’s used to measure the
actual frequency. The frequency meas-
urement is performed on the PSoC, but
this chip is not happy with a 1-GHz
signal. Thus, dividing by 256 is helpful.

Lastly, the main module, which is

built around the Cypress PSoC chip,
takes care of everything else by clos-
ing the loop between the generator,
receiver, prescaler, and host PC. It also
includes the power supply.

This architecture is exotic, but sim-

pler than other designs.
Usually, the RF generator is
built around two frequency
synthesizers. This allows for
a precise frequency from the
beginning, but includes added
complexity and cost. I imple-
mented a software-based con-
trol loop using a simple low-
cost frequency measurement
circuitry associated with the
power of the on-board,
mixed-signal Cypress chip.
Now, let’s take a more
detailed look at each module.

Photo 2—

In the RF generator module, the two VCOs are on the left, and the

RF mixer is in the middle. The output section—the MMIC amplifier and the
two power splitters—are on the right. Note that the RF pass-through filters on
the left are used for all of the low-frequency signals and powers.

Photo 4—

The two RF shielded modules are located

directly behind the front panel; they’re interconnected
thanks to two standard SMA jumpers. The main control
module is the only non-shielded module; it includes the
power supply, PSoC chip, an RS-232 driver, and a cou-
ple of low-frequency operational amplifiers. The ampli-
fiers are used to bring the PSoC’s analog signals up to
the RF module’s required levels and back.

Photo 3—

The receiver module is split into two compartments. The

right-hand side is the receiver itself, built around the AD8302 chip.
The left portion is the frequency prescaler, which is used to meas-
ure the actual output frequency.

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®

Issue 149 December 2002

27

main VCO, a 0.9- to 1.5-GHz pass-
band filter after the IF VCO, and a
more selective 1-GHz low-pass filter
after the mixer. All of these filters
were designed thanks to a great on-
line filter calculation tool that I found
on the Internet (www-users.cs.york.ac.
uk/~fisher/lcfilter/).

The output of the mixer is ampli-

fied with a wide-band MMIC integrat-
ed amplifier—a MAV11 (also from
Mini-Circuits)—providing a stronger
8-dBm signal. For those of you who

what resembles a Christmas tree on
the spectrum analyzer rather than the
pure signal you’re looking for.

I have tried to keep things simple,

but I want to block unwanted signals.
The difficulty is the balance between
the selectivity of the filters and the
difficulty in implementing them prop-
erly. At gigahertz frequencies, any par-
asitic capacitance or inductance may
drastically change the filter from what
it was designed for. I decided to use an
800-MHz high-pass filter after the

aren’t familiar with dBm, this is
6.4 mW over 50

Ω

, or 580-mV RMS.

This signal is then split two times

because of two TCP-2-10 miniature
two-way 0° splitters. One output is
provided at 4 dBm, and two outputs
supplied at 0 dBm or 225-mV RMS.
The power levels indicated in Figure 1
should help you to follow this power-
splitting process.

Take a look at my prototype in

Photo 2. As you can see, I built the
entire RF generator module on a dou-

VCO ROS-2160W
1160

–

2160 MHz

5 dBm typical

10 V

–

30mA

High pass

800 MHz

–

1 dB,

–

12 dB/octave

Mixer SYM-25DLHW

Local oscillator:

40 to 2500 MHz +10 dBm,

RF: 40 to 2500 MHz +5 dBm

IF: DC

–

1000 MHz

Loss 6.8 to 8.0 dB at 1160 to 2160

Low pass

1 GHz

–

1 dB,

–

24 dB/octave

MMIC

MSA01104

12.7 to 10.5 dB

17.5 dBm

NF 3.6

Splitter 2 way/0˚

TCP-2-10

5–1000 MHz

Loss –3.3 to –4.4 dB

Ge

nerator

VCO ROS

–

1500

1000 to 1500 MHz
8 dBm typical

Pass band

0.9 to 1.5 GHz

–

1 dB,

–

12 dB/octave

10 V

–

60 mA

21.4 V

–

30 mA

DAC8

I/Os

DAC8

Timer

16

(5 ms)

Counter

16

Full

UART

Counter

8

DAC8

POR

M8C

Microcontroller

core

DELSIG

ADC8

PGA

Ref

PGA

Ref

0

MAX

232

Host

PLL

OSC

SRAM

Flash

memory

V1/V2

SAR

ADC6

Cypress CY8C26443 PSoC

Reference 1.8 V

LEDs

Prescaler

U666 BST

Div 256

30 to 1000 MHz

5 V to 70 mA

5 V

–

2 × 50 mA

50

Ω

5 V to 24 mA

AD 8307

Gain and phase detector

LF

–

2.7 GHZ

–

60 to 0 dB

(reference

–

30 dBm)

Receiver

–

30 dB

–

6 dB

Splitter 2 way/0

˚

TCP-2-10

5

–

1000 MHz

Loss

–

3.3 to

–

4.4 dB

RF2

RF1

RF3

5V to 10 mA

Device under test

(

–

50 to 3 dB)

Ramp

frequency

Start

frequency

Ramp
width

IF setting

Measured
frequency

Gain and phase

1.8 V ± 0.9 V

Gain and phase

0 to 1.8 V

DC

–

1000 MHz

–

59.2 to 0.3 dBm

DC

–

1000 MHz

–

33.2 to 26.7 dbm

typical

–

30 dBm

DC

–

1000 MHz

1.2 to 6.6 dBm

DC

–

1000 MHz

5.6 to 9.9 dBm

DC

–

1000 MHz

–

4.9 to

–

2.8 dBm

DC

–

1160 MHz

–

3.9 to

–

1.8 dBm

0.5 to 20.0 V
(7.0 V typical)

1160 MHz fixed

7.7 dBm

1160 MHz fixed

8.7 dBm

DC

–

1000 MHz

–

3.2 to 3.3 Dbm

1160 to 2160 MHz

5.1 to 6.0 dBm

1160 to 2160 MHz

4.1 to 5.0 dBm

0.5 to 20.0 V

1.8 V ± 0.9 V

1.8 V ± 0.9 V

Power supply

10 V at 150 mA

21.4 V at 50 mA

5 V at 250 mA

Figure 1—

Take some time to analyze the global architecture of my Vector-SoC project. The PSoC chip generates two VCO control values, and the VCO output are mixed to

give a 0- to 1-GHz signal that

’

s amplified and split into three branches. One branch is used to measure the actual frequency, and the other two are routed to the AD8307 detec-

tor ship (one directly and one through the device that

’

s being tested). The chip

’

s outputs are read by the PSoC and sent to the host through the RS-232.

28

Issue 149 December 2002

CIRCUIT CELLAR

®

www.circuitcellar.com

small shielded enclosure with SMA
connectors for all of the RF signals
and good pass-through capacitors for
the power supplies and control sig-
nals. Having a high-quality shielded
construction is key in the gigahertz
range. Forgetting to filter a single con-
nection will make all shields useless.

ble-sided PCB. As usual in RF designs,
the bottom side is nearly 100% ground
plane and all of the components are
surface mounted. Whenever possible,
the widths of the PCB tracks are calcu-
lated for an impedance of 50

Ω

(around

1.3-mm wide with an FR4 substrate).

The generator PCB was fitted into a

AN ON-BOARD AD8302

Now, let’s take a look at the receiv-

er circuit. This circuit receives one of
the 0-dBm outputs from the generator
(reference signal) and the same 0-dBm
signal that went through the device
that’s being tested. Figure 3 shows
that this module was built with one

chip—an Analog Devices AD8302.

The AD8302 was exactly what I was

looking for. It accepts two signals from
0 to 2.7 GHz and 0 to –60 dBm, and it
provides phase and gain signals as two
analog 0- to 1.8-V outputs. Internally,
the chip includes two logarithmic
amplifiers that are then subtracted and
multiplied to calculate phase and gain.

Because the reference signal going

to this chip must be around –30 dBm,
I added a small –30-dB pad to the ref-
erence line (R6 to R8). Moreover, I
added a –6-dB pad to the main input
(R2 to R4), because I wanted my
device to accept devices being tested
with a positive gain up to 5 dB and

the generated signal is already at

Figure 3—

For the RF receiver, two 50-

Ω

attenuation pads were inserted on the two input branches in order to

achieve the adequate signal levels.

Figure 2—

The RF generator module is mainly built around Mini-Circuits RF components. The capacitor and coil values are critical for good performance. Note that a mis-

aligned filter can reduce overall performance.

www.circuitcellar.com

CIRCUIT CELLAR

®

Issue 149 December 2002

29

0 dBm. As for the generator module,
the receiver module was built on a
double-sided, all-SMD circuit board.

FREQUENCY MEASUREMENT

Frequency measurement is also sim-

plistic (see Figure 4). A 4-dBm signal is
applied on a monolithic U666B prescaler
from Telefunken. This chip is hard to
find, but it’s used widely in old TV
tuners. It accepts a 30-MHz to 1-GHz
signal and generates an F/256 differential
signal. I added a TL712 high-speed com-
parator to transform its differential out-
puts into a TTL-like signal that’s com-
patible with the PSoC’s inputs.

This module was supposed to be

uncomplicated, but it took me a long
time to debug it. I don’t know if my
chip was 50% defective or if my PCB
design was inadequate, but its opera-

tion was erratic. Strangely, it worked
well when I inadvertently pulled the
power supply from 5 to 5.6 V!

Well, at least it provides good results

from 50 to 750–800 MHz. I still don’t
understand what’s happening there, but
I derived a 5.6-V power source from the

power supply and closed the box. This
mystery needs to be solved before any
serious industrialization, of course, but
it was adequate for the prototype. As
you’ll see later, this prescaler’s frequen-
cy limitation is circumvented by soft-
ware-based interpolation.

Figure 4—

The RF prescaler was built around a Telefunken U666B chip that divides any signal from 100 to

900 MHz by 256. A Texas Instruments TL712 high-speed comparator converts the prescaler

’

s differential outputs

into a usable TTL signal.

Figure 5—

Here is the main control module, including the power supply, PSoC chip, and some TLE2142 low-noise amplifiers. These amplifiers convert the PSoC signal levels

into levels adequate for the RF modules. A classic MAX232 is also present.

30

Issue 149 December 2002

CIRCUIT CELLAR

®

www.circuitcellar.com

Physically, the prescaler module fits

into the same shielded box as the
receiver module, but they’re located in
separate compartments (see Photo 3).
As for the generator module, all of the
RF connections are SMA connectors;
the power and low-frequency signals
use pass-through capacitors to main-
tain the shielding.

MAIN CONTROLLER BOARD

The main module is the only mod-

ule without a shield, because it isn’t
managing RF signals directly (see
Figure 5). Thanks to the high integra-
tion of the Cypress PSoC chip, this
particular module is straightforward.

Around the CY8C26443 PSoC, I

used two Texas Instruments TLE2142
dual low-noise operational amplifiers.
The amplifiers allowed me to scale
the DAC outputs to the 0- to 20-V
level needed by the VCOs and to con-
vert the 0- to 1.8-V outputs of the
AD8302 chip into the proper levels for
the PSoC inputs. In addition, I used a
MAX232 to implement the RS-232
serial port to the host.

An external 32.768-kHz crystal

clocks the microprocessor; the internal
1% clock reference was not enough to
ensure precise frequency measure-
ments. This crystal is internally multi-
plied to provide the basic 48-MHz
clock source used by the Cypress chip.
Because the same pins are used for both
the crystal connection and in-circuit
programming, make sure you minimize
track lengths and parasitic capacitors

when you’re drawing the PCB. When I
started to debug this project, it was
the root cause of a difficult night!

One note on voltage references: in

order to drastically minimize all of the
drifts in temperature, I configured the
CY8C26443 chip in External AGND/
VREF mode, meaning that all of its ana-
log signals—including ADC/DACs ana-
log values—are centered around the
value of external signal AGND and
have a range from AGND – VREF to
AGND + VREF. Also, I derived AGND
and VREF from the 1.8-V reference built
into the AD8302. This way, even if
there is a drift in the 1.8-V reference,
theoretically, there will be no change in
the ADC readings at all because every-
thing is relative to this 1.8-V reference.

The main board also includes the

power supply, which is not trivial
because several voltages are needed in
this design (e.g., 5 V for the logic, 10 V
for the VCOs, and 21 V for the analog
amplifiers in order to get up to 20 V
on the VCOs inputs). Moreover, the
total power consumption is significant
(around 6 W), nearly exclusively
because of the RF components.

I ended up with a design built around

an external plug-type 12-V, 1-A trans-
former, two linear regulators for the 5-
and 10-V outputs, and a miniature 12-
to 12-V DC/DC converter with its neg-
ative output connected to the 10-V
power supply, providing 22 V on its pos-
itive output. Photo 4 shows the assem-
bled main board integrated with the
two previously described RF modules.

CONFIGURING THE PSoC

Now that you know about the hard-

ware, you still have to learn how I
configured the PSoC chip in order to
do what I needed. Figure 6 provides a
logical view of the different modules
configured inside the PSoC.

First, you should familiarize your-

self with the clocking section. The
two internal counters 24V1 and 24V2
are configured to provide a 300-kHz
clock from the main 24-MHz clock.
This 300-kHz clock is used as the
main clock for all of the capacitor-
switched analog modules within the
PSoC, including DACs and ADCs. It
is also routed to a 16-bit timer module
(TIMER16_1) and configured to pro-
vide a 5-ms timing period used by the
embedded software as a window for
frequency measurements.
Lastly, another 8-bit counter,
COUNTER8_1, divides the 48-MHz
clock to provide a reference clock for
the 57,600-bps UART. Because the
UART module must be clocked at
eight times the UART speed, this
counter is configured to divide the
48-MHz clock by 104:

The UART is the full-duplex 8-bit
UART module provided in the
Cypress library.

To end the digital section, another

16-bit counter, COUNTER16_2, is con-
figured. This counter is used to meas-
ure the output frequency of the RF gen-
erator; it’s clocked by the prescaler out-
put and enabled during a 5-ms window
by the embedded software.

Now, let’s take a look at the DAC

section. Two analog outputs are need-
ed: one to drive the main VCO and
one for the fixed 1160-MHz IF VCO.
For the latter, I could have used a fixed
potentiometer, but I wanted a design
without any manual adjustment.

Because 8-bit resolution was enough

for the IF DAC, I used an 8-bit DAC
from the Cypress library (DAC8_3).
The design for the main VCO driving
is more complicated; it involves two
DACs (DAC8_2 and DAC8_1) and one
programmable gain amplifier (PGA_1).
Here’s the basic principle: one DAC
(DAC8_1) is used to set the lower fre-

48 MHz

104

= 8

×

57,600 ± 0.1%

PLL ( × 732)

32768 Hz

24

MHz

24 V1 (= 5)

24 V2 (= 16)

Counter 8_1

(P = 104)

299.8 kHz

To all analog blocks

48 MHz

UART_1

P1.5
P1.7

Counter16_2

(Q)

DELSIG8_1

(M)

SAR6_1

(N)

P1.4

from prescaler

P2.2

Gain (r = 0.2 dB)

P2.3

Phase (r = 2.8

˚

)

DAC8_2

(V)

DAC8_1

(F)

461.272 kHz
or 8 × 57 659 Hz
for 57.6 Kbps (0.1%)

PSoC

PGA_3
(G = 1)

DAC8_3

(X)

Timer16_1
(P = 1499)

In

Ref

AGND

P0.2

P0.6

P0.4

P0.7

5-ms
timer

P0.5

To IF VCO

P0.3

To main VCO

In

Ref

PGA_1

(G = G)

Figure 6—

Take a look at the internal configuration of the PSoC for this design. A 300-KHz clock is generated to

drive the analog blocks. Two other counter/timers are used to generate the UART clock, and a 5-ms timer is used
by the firmware. Another counter measures the prescaler output frequency. Three DACs and two programmable
amplifiers output the VCO control signals. Finally, two ADCs (one 8-bit and one 6-bit) read the gain and phase.

32

Issue 149 December 2002

CIRCUIT CELLAR

®

www.circuitcellar.com

quency, while the second DAC
(DAC8_2) ramps through the
desired frequency range.

The PGA gain is dynamically

set by the firmware to provide the
required frequency scan width.
With this design, the effective res-
olution of the VCO control volt-
age is 16 bits for narrowband
scans. Only 8-bit DACs are used,
thanks to the highly programma-
ble nature of the PSoC chip!

Lastly, two ADCs are imple-

mented within the PSoC to read
the receiver’s gain and phase sig-
nals. An 8-bit delta-sigma con-
verter (DELSIG8_1) measures the
gain, and a 6-bit successive
approximation converter (SAR6_1)
is used for the phase.

I must admit, this was not the first

design that I drew; instead, it was the
result of an iterative process. I had a
simple goal: to find a design that would
satisfy the requirements of the project
and fit within a single PSoC chip.

Photo 5 shows the PSoC’s internal

design and routing. This step was not

easy, even with the user-friendly
design tools provided by Cypress,
because of the high occupancy rate of
the chip’s resources (more than 90%!).
I finally found a solution with an addi-
tional PGA block configured as a uni-
tary gain buffer (PGA_3); it was used
only as a relay between cells to get a
routable design.

I also had to route some pins

out of and into the chip to satisfy
routing constraints. My conclu-
sion? Route the chip first and then
design your PCB. This way, you
will not need cuts and straps like
the ones present on my prototype.

EMBEDDED FIRMWARE

In order to have a flexible

design, I minimized the features
on the microprocessor itself, and
did the majority of the work on
the PC side. So, the embedded
firmware is simple: The Vector-

SoC device is a slave and simply
executes orders sent by the PC
through the serial port. The com-
mand set includes setting DAC

output values, reading the ADCs,
reading the output frequency value (by
measuring the number of pulses from
the prescaler during a fixed 5-ms win-
dow), setting the PGA gains, and so
on. During the optimization of the
design, a combination command was
added to improve the performances,
enabling the autonomous generation

Photo 5—

All of the PSoC digital blocks are used, as well as 10 out

of the 12 analog blocks! That

’

s a 90% filling rate and some

headaches to find a block placement that was compliant with the
routing constraints of the chip.

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34

Issue 149 December 2002

CIRCUIT CELLAR

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of a 256-step frequency scan in one
command. This command significant-
ly reduced the overall refresh time
from 1 s down to 0.4 s.

Overall, the embedded firmware

requires only a little more than 2 KB
out of the 16 KB of on-board flash
memory. Out of the 2 KB RAM, only
572 bytes were needed for my applica-
tion, and the rest are object images of
the libraries provided by Cypress.

PC-SIDE SOFTWARE

The last part of this design is the

PC-side software. I developed a dedi-
cated Windows-based application
under the MFC framework with the
Visual C++ 6.0 environment.

Refer to Photo 6 and Photo 7 to

learn more about the user interface.
Some of the controls on the right-
hand side allow you to select the
frequency start and width, as well
as the gain scale. Then, a mode
selector allows you to launch one
acquisition or switch to real-time
Refresh mode (around 2.5 refresh-
es per second).

Two graphs show the gain and

phase response over frequency.
The last plot gives a polar view
of the same information (i.e., the
gain and phase graph on the
complex plane), with a polar or
Smith diagram format. Lastly, a
cursor feature allows you to dis-
play the precise gain and phase
at a given frequency.

Although the embedded

software was simple, the PC-
side software was not trivial.
The software automatically
sets the IF frequency in order
to have a minimum frequency
as close to zero as possible.
Then, it enters Calibration
mode and starts performing a
full frequency ramp from 0 to
1 GHz, measuring the actual
frequency each 256 steps.

Because the prescaler chip

does not work under
100 MHz or above 800 MHz,
a cubic interpolation is cal-
culated with the least mean
square method. Two more
RF calibration steps are then
performed, the first of which

is executed with a direct cable
between the RF input and output
(closed-loop calibration is used as a
reference). The second step involves
50-

Ω

loads on both inputs and outputs

(open-loop calibration is used to auto-
matically calculate and display the
noise floor of the Vector-Soc device).
As you can see in Photo 6, the reliabil-
ity of this calibration is excellent.

Next, it executes frequency scans

with the parameters set by the user,
calculates the effective corresponding
frequencies using the frequencies meas-
ured during the scan if they are reason-
able or the interpolated values, corrects
the measured gain and phases using the
closed-loop calibration values, scales
the result, and displays it. This process
is completed 2.5 times per 1 s.

You may download the full code for

this project from the Circuit Cellar ftp
site. It can be used freely for any non-
commercial application.

THE DEVELOPMENT PROCESS

Now, I’ll explain how I developed

and, more importantly, debugged this
project. Developing such a complex
project before a test is never a good
idea, unless you want to spend your
evenings trying to understand what’s
going wrong.

I started by developing and building

the RF generator module, and I vali-
dated it with a good spectrum analyz-
er. The results were satisfying even
without adjustments to the compo-
nent’s values. Then, I developed the
RF receiver circuit as well as the
prescaler module, validating the entire
radio chain, end-to-end, with a ramp
generator to drive the main VCO and
a standard oscilloscope as the output
device. Thus, I built a full-featured,
analog-only network analyzer, which
allowed me to validate the entire RF
side without any digital modules.

Because this step was so encourag-

ing, I went on to develop the main
controller board and the PSoC
firmware. I decided to use only
ASCII characters on the host-to-
Vector-SoC serial link in order to be
able to fully debug the embedded
side without any specific software
on the PC. I used the classic
HyperTerminal and some macros.

The PSoC’s in-circuit programming

feature helped me obtain working

code quickly. The last step was
the development of the PC-side
software, but this was only soft-
ware for proven hardware and
firmware, even if I had to fight
longer than planned with MFC’s
strange behavior (strange, at least,
for an embedded-oriented guy).

FUTURE EVOLUTION

As shown in Photo 7, the

Vector-SoC is a great performer.
In addition to its ability to accu-
rately measure and display fre-
quency responses as narrow as a
SAW filter, the device gives an
accurate and stable display
thanks to the automatic calibra-

Photo 7—

This real-life example shows an analysis of a 153-MHz

SAW filter. The scan width is at its minimum (80-MHz full scale), and
the SAW

’

s frequency response is clear. As expected, the phase shift

is zero degrees at the resonance frequency. The cursor feature is
activated, giving the direct measurement of the gain and phase.

Photo 6—

When the RF output is directly connected to the RF input,

the Vector-SoC output window shows this display. After proper cali-
bration, the measured gain stays close to 0 dB, as well as the
phase, indicating a high stability. The dashed line shows the signal
level that was measured during the open-loop calibration. The
dynamic range is around 40 to 45 dB up to 300 MHz and better than
35 dB up to 1300 MHz.

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®

Issue 149 December 2002

35

tion routines. The real-time Refresh
mode is extremely convenient, too,
giving the Vector-SoC the look and
feel of a $10,000 VNA even though its
RF performance is not in the range of
those expensive models.

The weakest part of the current

design is the prescaler. The design’s
narrow working range is a limiting
factor to the Vector-SoC’s accuracy
in low and high frequencies.
Another chip is needed for directly
measuring the frequency of the two
VCOs before mixing.

On the software side, a useful

improvement would be to implement
automatic S-parameter calculation
(i.e., transmitted and reflected coeffi-
cients on each port of a given device).
Actually, the Vector-SoC is already
able to measure all of the S-parameters
via an external coupler and successive
cabling configurations. You may
download information concerning the
measurement of RF parameters from
the Circuit Cellar ftp site. A new PC-
based application, however, would
help you by drawing a fully transmit-
ted/reflected S-parameters analysis for
the specific device that’s being tested.
A final improvement would be the
addition of a phase group-delay graph.

Well, a project ending with several

ideas for improvement is always a
good project! And, in this case, the
current Vector-SoC prototype is
already a useful piece of testing equip-
ment for all RF enthusiasts. In addi-
tion, it exemplifies the effectiveness of
highly integrated mixed-mode devices
like the Cypress PSoC. I hope you’ve
enjoyed reading about the Vector-SoC
project as much as I have enjoyed
developing it. This project was fun.

I

Robert Lacoste lives in France, not too
far from Paris. He has 12 years of expe-
rience working with real-time soft-

PROJECT FILES

To download the code and additional
figures, go to ftp.circuitcellar.com/
pub/Circuit_Cellar/2002/149/.

RESOURCES

Agilent Technologies,
“Understanding the Fundamental
Principles of Vector Network
Analysis,” AN1287-1, 1997.

Analog Devices, “LF—2.7 GHz
RF/IF Gain and Phase Detector,”
rev. A, July 2002.

Cypress Microsystems,
“CY8C25xxx/26xxx Device
Family Data Sheet,” rev. 3.20,
38-12010, September 2002.

Online Interactive Filter Design,
www-users.cs.york.ac.uk/
~fisher/lcfilter/.

SOURCES

AD8302 Detector
Analog Devices, Inc.
[phone]
www.analog.com

CY8C26443 Microcontroller
Cypress Semiconductor Corp.
[phone]
www.cypress.com

MAV11 Amplifier, ROS-
1500/2160W VCOs, SYM-
25DLHW mixer, TCP-2-10 splitter
Mini-Circuits, Inc.
[phone]
www.minicircuits.com

U666BST Prescaler
Telefunken Electronic
[phone]
www.telefunken-
sendersysteme.de

TLE2142 Low-noise op-amp,
Tl712 high-speed comparator
Texas Instruments, Inc.
[phone]
www.ti.com

Author’s note: I would like to sincere-
ly thank my dear colleague and friend
Roger Jacques, manager of Nortel
Networks’s GSM RF Department, for
his more than useful advice and sup-
port during the development of this
project. With RF more than anything
else, an experienced opinion is better
than a hundred books!

ware, embedded systems, and
telecommunications technology. He
has won many international design
contests, including several

Circuit

Cellar contests. Currently, Robert
works for Nortel Networks. In his free
time, he enjoys building innovative
microcontroller-based devices. You may
reach him at [e-mail].

TERMS:

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36

Issue 149 December 2002

CIRCUIT CELLAR

®

www.circuitcellar.com

ast month, I

introduced you to

the world of ARM,

including an overview of

ARM terminology and architecture.
Now, we’ll dive deeper into one of the
selling points for using ARM in embed-
ded systems: code space reduction
compared to other RISC architectures.

As you’ll see, the Thumb processor

mode is beneficial for reducing code
size with some loss of flexibility. Next
month, I’ll complete this series of arti-
cles by showing you how the architec-
ture is implemented in CPU and sys-
tem cores. I’ll also talk about the tools
and tool chains that are available.

CODE SPACE REDUCTION

The ARM architecture includes three

additional features that work to reduce
the code space required. Because code
space is a concern when using RISC
processors in embedded systems, it’s
nice to see that there is some progress
being made in keeping code storage
costs down. The ultimate way to
reduce code space in an ARM system is
to use the Thumb instruction set. I’ll
explain this topic later in this article.

All ARM instructions are encoded

with a 4-bit conditional code. This
allows for the conditional execution of

every ARM instruction based on the
flags in the program status register.
One time, I heard an FAE give a pres-
entation on ARM and declare that this
appears to be a nice feature, but that
he didn’t know anyone who uses the
bits. I am still trying to figure out
what he was talking about, because
every ARM assembly routine I’ve
either written or seen takes advantage
of the conditional execution. All ARM
compilers will do the same and rely
heavily on the conditional bits.

These conditional executions reduce

the code space required in comparison
to architectures without this feature.
The conditional executions are encod-
ed such that each condition comes in
a pair with the complimentary condi-
tional. This allows if-then-else con-
structs to be compiled into as little as
three instructions (see Listing 1). The
space efficiency provides a real advan-
tage to using ARM processors in
embedded systems and counters some
of the arguments against RISC in
deeply embedded environments. If
you’re looking for more information
on RISC, you should read Jim Turley’s
January article, “Is RISC Good
Embedded” (Circuit Cellar 138).

You may be concerned about the

flag bits changing if you want to use
the conditional bits on non-branch
instructions. Take a look at the last
portion of code in Listing 1. If the flag
bits changed during the execution of
the first

add instruction, then you

would lose the ability to perform the
second

add because of an intervening

jump. Fortunately, the flag bits do not
change by default on arithmetic or
memory access instructions.

But, what if you wanted to check

for overflow on the

add? To do that,

you must specify that you want to
update the flag bits. This is accom-
plished by using the set flag (i.e., put-
ting an

S suffix on the instruction).

In this example,

add becomes adds

if you want the flag bits to be updat-
ed. Data comparison instructions set
the flags by default; arithmetic
instructions do so only with the set
flag. For data movement instruc-
tions, check The ARM Architecture
Reference Manual

to see if the set

flag is available.

ARMs to ARMs

l

Now that you’re famil-
iar with the world of
ARM processors, you
should be thinking
about how you can
use the ARM archi-
tecture in your own
embedded systems.
In this article, Robert
digs a little deeper
and discusses the
ARM features that will
reduce code size.

Robert Martin

FEATURE
ARTICLE

Part 2: Delving Deeper into
the World of ARM

www.circuitcellar.com

CIRCUIT CELLAR

®

Issue 149 December 2002

37

To apply the post-execution incre-

menting, use the following:

ldr r0, [r1], #4

First, load the value in r1 to r0, and
then increment r1. This syntax is
slightly less tricky than the pre-exe-
cution incrementing. A different reg-
ister could have been used instead of
the literal in both examples. To
decrement, just use a negative literal
or a negative value in the “increment
by” register.

The ARM instruction set provides

a useful set of instructions that are
not within the RISC ideal but are
quite useful in the real world. Some
of the utility of the Load Multiple
and Store Multiple instructions was
demonstrated by describing the
return from functions and exceptions.
Because the interrupt state is polled
on instruction boundaries, the

ldm

and

stm instructions are atomic. The

ldm and stm are used for stack opera-
tions, context switching, and other
applications where atomically moving
registers off to a contiguous block of
memory is required.

The Load and Store Multiple regis-

ter commands can operate in any of
four different indexing modes: Full
Ascending; Full Descending; Empty
Ascending; and Empty Descending.
Full or empty indicates whether the
index register points to the last word
written or the next destination
address. Ascending or descending
indicates whether the address in the
indexing register increases or decreas-
es with each load or store. Any of the
four modes can be used. However,
you must store and load using the
same mechanism, otherwise you can
get into some rather interesting off-
by-one error scenarios.

An exclamation point on the index

register causes the value in the index
register to be autoincremented or
autodecremented. The choice becomes
easier if you’re just using the

ldm and

stm instructions for stack manipula-
tion and you’re following the APCS.
The APCS defines the stack as a full,
descending stack. The stack pointer
is also incremented or decremented
during the operations. The com-

Another feature that reduces ARM

code size is the ability to use the
shifter and ALU in the same instruc-
tion with the shifter result available
for use by the ALU. Logical shifts left
or right, arithmetic shifts left or right,
and rotate left or right are available.
The shift or rotate amounts can be
either a literal between zero and 31 or
specified in a register.

The good news is that these opera-

tions are efficient. The bad news, how-
ever, is that this efficiency allowed the
ARM designers to leave out an instruc-
tion to multiply by a constant. All mul-
tiplication by constants must be done
with addition, subtraction, or data
movement instructions. For example,
to multiply r0 by 15 and put the result
in r1, the assembly is written as:

rsb r1, r0, r0, LSL #4

That is a reverse subtraction (i.e.,

the second operand is subtracted from
the third operand with the result

placed in the first operand) with a log-
ical shift left of the third operand by
four. In other words, r1 = 16 × r0 – r0.
This may be good for code space, but
it doesn’t make writing the assembly
routines that need a multiply by a
constant particularly easy.

To increase the efficiency and

reduce the code space of loop process-
ing, ARM instructions have autoincre-
ment and autodecrement addressing
modes. This is performed without a
penalty in execution time because of
the pipeline structure of ARM cores.
The incrementing can be implement-
ed prior to or after the instruction is
executed. To increment a pointer
prior to the execution of a load, use
the following code:

ldr r0, [r1, #4]!

First, load the value in r1+4 to r0, and
then write r1+4 to r1. The

! causes

the instruction to write the literal off-
set back into the base register.

Listing 1—

The ARM assembly for a simple C if-then-else demonstrates the use of conditional execution of

all ARM instructions. Notice that five instructions are reduced to three through the use of conditional execu-
tion on non-branch instructions. Eight bytes of code were saved and the overall complexity and maintain-
ability of the code has been improved.

//Trivial C code

if (a>b)

{

++a;

}

else

{

++b;

}

//Use conditional execution only on branch instructions

; a in reg v1

; b in reg v2

cmp v1, v2

ble INCB //jump if a<=b

add v1, v1, #1 //++a

b DONECOND //jump to done

INCB:

add v2, v2, #1 ; ++b

DONECOND:

…

//Use conditional execution on regular instructions

; a in reg v1

; b in reg v2

cmp v1, v2

addgt v1, v1, #1

//++a if a>b

addle v2, v2, #1

//else ++b

…

instructions operate only on the low
registers. But the stack pointer is not
one of the low registers. The Thumb
instruction set provides

push and pop

instructions for saving and restoring
registers on the stack. The

push and

pop instructions operate only the on
low registers and link register.

With the compromises necessary

to implement Thumb mode, the
question becomes: “How is the per-
formance?” Furber reports the follow-
ing results. Thumb code will take
roughly 70% of the code space of
ARM code. This is more than half
because Thumb code contains 40%
more instructions than equivalent
ARM code. In 32-bit memory sys-
tems, ARM code is faster by 40%;
within 16-bit memory systems,
Thumb code is 45% faster than ARM.
In addition, Thumb code typically
requires 30% less external memory
power than ARM code. [1]

You can enter Thumb mode by exe-

cuting the branch and exchange
instruction,

bx. If bit 0 of the address

in the destination register is set, the
processor enters Thumb mode. You
do the same thing to leave Thumb
mode and return to ARM mode. In
that case, bit 0 of the address in the
destination register will be zero. After
entering Thumb mode, the T bit in
the CPSR is set. Don’t set the T bit
in the CPSR directly; instead, you
may set this bit in the SPSR and
then restore the CPSR from the SPSR.
This is how you should handle
returns from exceptions.

Exceptions are always executed in

ARM mode, even if the processor
was in Thumb mode prior to the
exception. Exceptions are then han-
dled the same way they are in pure
ARM mode: the processor makes
appropriate adjustments to the link
register when it enters the exception
mode so that the return from the
exception is identical for interrupted
ARM code or Thumb code.

There is no need for the exception

handler to determine if the size of
two instructions is 4 or 8 bytes.
Exception handlers that decode
instructions do need to determine if
the interrupted mode was Thumb or
ARM. In particular, software inter-

38

Issue 149 December 2002

CIRCUIT CELLAR

®

www.circuitcellar.com

mands used to push and pop registers
on the stack are:

stmfd sp!, {<register list>}
ldmfd sp!, {<register list>}

The APCS convention is only for

stack operations. You’re free to use
any indexing mode for other block
transfers to and from memory.

THUMB

The ultimate way to reduce code

size on a 32-bit processor is to com-
press the instructions down to 16 bits.
In essence, this is the Thumb mode in
the ARM architecture. Thumb instruc-
tions originally appeared after architec-
ture V.4 in architecture V.4T, and they
continued into V.5 of the architecture.
Processors that only conform to V.4,
such as the Intel StrongARM, do not
support Thumb mode.

When you take a rich set of 32-bit

wide instructions and compress them
to 16-bits wide, you have to make cer-
tain compromises and sacrifices.
Conditional execution of every ARM
instruction is lost in Thumb mode.
Only conditional branches use condi-
tion codes in the Thumb instruction
set. This is the way most architectures
operate, but it means that there may
have to be more instructions used in a
Thumb routine than there would be in
an equivalent ARM routine.

All Thumb instructions can use reg-

isters r0 through r7, but only a limited
subset can operate on registers r8
through r15. Note that the limited set
includes the program counter. In the
nomenclature of the Thumb instruc-
tion set, registers r0 through r7 are
called the low registers. Registers r8
through r15 (PC) are referred to as the
high registers. In addition to limiting
the register set, immediate values
encoded in the instructions are limit-
ed. Similarly, PC-relative branches are
restricted to an 8-bit signed offset for
conditional branches and an 11-bit off-
set for unconditional branches.

The Load Multiple and Store

Multiple register commands are limit-
ed to the Full Descending index mode.
The instructions do not use the

fd suf-

fix; instead, they use the non-stack
alias

ia (i.e., ldmia and stmia). These

rupt and undefined instruction excep-
tion handlers need to pay particular
attention to the T bit in the SPSR
register. This allows them to know
the size and format of the instruc-
tion to be decoded. If the T bit in the
SPSR is set, the processor will return
to Thumb mode when it exits the
exception handler.

Calling ARM routines from Thumb

code or calling Thumb routines from
ARM code is called “interworking.”
When compiling a routine written in
a higher-level language like C that
requires interworking, the compiler
and linker will insert the appropriate
veneer to allow for the transition
between the two modes.

For assembly language routines,

you have to pay attention to getting
the calls and returns correct in inter-
working routines. In an interworking
routine, you cannot perform a branch
and link call,

b. Instead, you need to

implement the following:

mov r0, <subroutine address>
mov lr, pc
bx r0

pc is the latter instruction plus
eight or the instruction after

bx.

Similarly, to return from a function,
you cannot implement a

mov pc,

lr instruction. Instead, you have to
execute two instructions: first, move
the

lr into another register, and

then implement a

bx.

In architecture V.4T, you cannot

simply use a load multiple or pop with
the program counter as the destina-
tion. You need to extract the saved
return address from the stack and then
execute a

bx. Version 5T of the archi-

tecture does not require the use of the
bx instruction to change modes. In
V.5T, the branch, link, and exchange
instruction (

blx) behaves in the same

way as setting up the link register and
then executing a

bx does in V.4T. You

can also return and exchange modes
using the

ldm or pop instructions.

At compile time, you need to speci-

fy that you’re targeting a Thumb sys-
tem and that you want interworking
support. Because interworking requires
some sacrifices, you should specify
interworking only on those routines

www.circuitcellar.com

CIRCUIT CELLAR

®

Issue 149 December 2002

39

that require it. It’s probable that you
will not want to compile in the inter-
working support for a routine that’s
called from its own mode and is either
a leaf function or one that merely
calls functions that are also in the
same mode. Libraries can get around
this by designating separate libraries
for ARM mode, Thumb mode, and
interworking. The linker then deter-
mines with which library to link.

This all sounds excessively compli-

cated. In reality, though, things are
much simpler on most Thumb sys-
tems. You’ll probably use Thumb
mode if you have your program stored
in 16-bit memory or you’re using a
processor with a 16-bit data bus.
You will probably just compile all of
your User mode code to use Thumb
instructions. Note that it’s essential
to have start-up code that knows
how to call Thumb code and excep-
tion handlers compiled to use ARM
instructions. There are situations
where you will want some code
compiled for Thumb and some oth-
ers for ARM. In those special cases,

Robert Martin received a Ph.D. in
Physics from The College of William
and Mary. He’s been working with
embedded and real-time systems for
over 10 years. Currently, Robert is an
engineering manager directing a team
of embedded software engineers near
Phoenix, Arizona. You may reach him
at [e-mail].

REFERENCE

[1] S. Furber, ARM System-On-

Chip Architecture

, 2d ed.,

Addison-Wesley, Harlow,
England, 2000.

RESOURCE

ARM, Ltd., ARM Architecture
Reference Manual

, ARM DDI

0100E, 2000.

SOURCES

ARM7 Thumb, ARM9 Thumb,
ARM9E Thumb, ARM10 Thumb
ARM, Ltd.
[phone]
www.arm.com

StrongARM, Xscale
Microarchitecture
Intel Corp.
[phone]
www.intel.com

you will have to pay attention to all of
the details of interworking.

NEXT STOP

Next month, I’ll explain the imple-

mentation of the architecture in CPU
and system cores, tool chains, and
tools. You’ll see ARM processors tar-
geted toward replacing legacy micro-
controllers and those intended for high-
performance multimedia systems. In
addition, I’ll tell you about tool chains
with prices that are acceptable to the
hobbyist, as well as some that are
priced at levels that make even large
corporations uncomfortable. These
topics will close out my introduction
to the world of ARM processors.

I

40

Issue 149 December 2002

CIRCUIT CELLAR

®

www.circuitcellar.com

hate to admit

it, but my elec-

tronics bench is not a

pretty sight, at least in

the midst of a project anyway. Of
course, I’m always in the middle of
some project that, more often than
not, contains two or three different
projects in various stages of comple-
tion. To make matters worse, most of
my projects involve microchips,
which have to be programmed.
Because I use ISP flash memory
MCUs exclusively, it makes sense to
locate a computer on my construction
bench to facilitate programming and
testing. To save space, I initially used
my laptop’s parallel port for MCU pro-
gramming. It was only a matter of
time before I popped the laptop’s
printer port by connecting it to a pro-
totype circuit with errors on it.

Fixing my laptop’s printer port would

have involved replacing its main board,
which is an expensive proposition.
Therefore, I switched over to a desktop
computer (with a $20 ISA printer port
board) for programming and testing pur-
poses. The desktop, however, took up
much more room on my bench.

You can’t do without lots of testing

equipment, all of which takes up
more bench space. Amongst my test

equipment, I have several bench
power supplies, which are unfortu-
nately large because I built them
with surplus power supply assem-
blies taken from older, unused equip-
ment. This seemed like a good candi-
date for miniaturization.

At about the same time, I read a

fine article by Robert Lacoste describ-
ing a high-power tracking lab power
supply (“A Tracking Lab Power
Supply,” Circuit Cellar 139). Although
I liked many of Robert’s clever design
ideas, most of my recent projects
seemed to need only modest amounts
of power. Therefore, I decided to
design my own low-capacity bench
supply that would be compact enough
to fit in a small case. In this article,
I’ll describe that power supply.

MY WISH LIST

Even though I mentioned that my

recent project’s power demands were
fairly modest, I frequently needed
three or more discrete voltage levels.
This meant lugging out a couple of
different bench supplies and wiring
all of them to the circuit I was build-
ing. If the circuit required all of the
power supplies to cycle on and off
simultaneously, the above arrange-
ment was extremely inconvenient. In
any event, it took up too much space
on my bench.

I decided that I wanted to have four

discrete voltage sources available.
One power supply would be ground
referenced. Two additional power
supplies would be floating power
supplies. Each of these would have
the provision to switch either the pos-
itive or negative terminal to the nega-

Quad Bench Power Supply

i

The need for a bevy of
equipment for building
and testing presents a
problem: how to deliv-
er an adequate power
supply while keeping
workbench clutter to a
minimum. Brian decid-
ed to tackle this clas-
sic engineering conun-
drum with a small,
low-capacity quad
bench power supply.

Brian Millier

FEATURE
ARTICLE

Photo 1—

The ground-referenced power supply PCB

also contains the SIMM100 MCU daughterboard. The
IsoLoop isolators, being SMD components, are mount-
ed on the bottom of the PCB and aren’t in view.

www.circuitcellar.com

CIRCUIT CELLAR

®

Issue 149 December 2002

41

ule at the last minute; therefore, I did-
n’t allow for the voltage or current
monitoring of this particular supply.

THE ANALOG CORE

Although there certainly is a digital

component to this project, the basic
power supply core is a standard analog
series-pass regulator design. I bor-
rowed a bit of this design from
Robert’s lab supply circuit.

Basically, all three power supplies

share the same design. The ground-
referenced power supply provides less
voltage and more current than the
floating supplies. Thus, it uses a dif-
ferent transformer than the two float-
ing supplies. The ground-referenced
supply’s digital circuitry (for control of
the digital potentiometer and ADC)
can be connected directly to the MCU
port lines. The two floating supplies,
in addition to the different power
transformer, also need isolation cir-
cuitry to connect to the MCU.

Figure 1 is the schematic for the

ground-referenced supply. As you can
see, a 24VCT PCB-mounted trans-
former provides all four necessary
voltage sources. A full wave rectifier
comprised of D4, D5, and C5 provides
the 16 V that’s regulated down to the
actual power supply output. Diodes
D6, R10, C8, and Zener diode D7 pro-
vide the negative power supply needed
by the op-amps.

A UA7805 regulator is used to drop

the 16-V supply down to the 5 V need-
ed for the digital potentiometer and
ADC. Finally, an independent 5-V
power supply for the MCU is provided
by D3, C4, and U4, another UA7805
three-terminal regulator. Because I
eventually added a 5-V, 3-A commer-

tive (ground) terminal of the ground-
referenced supply, allowing for posi-
tive or negative output voltage.
Alternately, these supplies could be
left floating with respect to ground
by leaving the aforementioned
switch in the center position.

This arrangement allows for one

positive and two positive, negative or
floating voltage outputs. To round off
the complement, I added Condor’s
commercial 5-V, 3-A linear power sup-
ply module, which I had on hand in
my junk box. Table 1 shows the capa-
bilities of the four power supplies.

I wanted to provide the metering

of voltage and current for the three
variable power supplies. The simul-
taneous voltage and current meas-
urement of three completely inde-
pendent power supplies seemed to
indicate the need for six digital
panel meters. Indeed, this is the path
that Robert Lacoste used in his
tracking lab supply.

I had used many of these DPM

modules before, so I was aware of
the fact that the modules require
their negative measurement terminal
to float with respect to the DPM’s
own power supply. I solved this prob-
lem in the past by providing the
DPM module with its own independ-
ent power source. Robert solved it by
designing a differential drive circuit
for the DPM. Either solution, when
multiplied by six, is not trivial. Add
to this the fact that high-quality
DPMs cost about $40 in Canada, and
you’ll see why I started to consider a
different solution.

I decided to incorporate an MCU

into the design to replace the six
DPMs as well as six 10-turn poten-
tiometers, which are also becoming
expensive. In place of $240 worth of
DPMs, I used three inexpensive dual
12-bit ADCs, an MCU, and an inex-
pensive LCD panel. The $100 worth
of 10-turn potentiometers was
replaced with three dual digital
potentiometers and two inexpensive
rotary encoders.

Using a microcontroller-based cir-

cuit basically allows you to control
the bench supply with a computer for
free. I have to admit that I decided to
add the commercial 5-V supply mod-

cial power supply to the unit, I think
it would have made more sense to run
the MCU from that supply instead.

The series-pass element is an

IRL520 power MOSFET that’s driven
by U1, which is configured as a
unity-gain buffer. I had the IRL520
devices on hand, but I suspect that
NPN Darlington transistors could
have been used in their place with
the advantage of a lower base drive
voltage requirement.

Voltage regulation is performed by

comparing a portion of the power sup-
ply output voltage with the B-section
output of the digital potentiometer
U6. A TL082, U3-B acts as a compara-
tor for this purpose. The full-scale out-
put of the digital potentiometer is 5 V,
and the power supply output voltage
is scaled down to this level by R5 and
the potentiometer R10. Without any
initialization from the MCU, the digi-
tal potentiometer presets itself to half
scale, or 2.5 V at power-up. When test-
ing this power supply, prior to con-
necting it to the MCU, potentiometer
R10 is adjusted to provide an output
voltage of 6.4 V at power-up. This
gives a resolution of 50 mV per step of
the digital potentiometer.

Current limiting is provided by

comparator U3A and the A section of
the digital potentiometer. Current
monitor IC U2, which you’ll learn
more about later, provides a voltage
that’s proportional to the output cur-
rent. Basically, comparator U3A
compares a voltage proportional to
current draw, with the current limit
set point value programmed into the
digital potentiometer, and throttles
back the drive to the pass regulator
when necessary.

The two sections of the TL082, act-

ing as comparators, have their outputs
connected to buffer U1’s input via
diodes D1 and D2. In combination
with R1, these components provide a
NOR function. To be precise, if either
comparator’s output goes low, the
drive to the pass regulator (provided
by R1) will be reduced until the over-
voltage/current condition ceases.

Apart from the digital potentiome-

ters replacing mechanical ones, this
circuit is somewhat similar to that
used by Robert in his lab power sup-

Photo 2—

I used a Lawicel SIMM100 module for the

microcontroller and associated circuitry.

www.circuitcellar.com

CIRCUIT CELLAR

®

Issue 149 December 2002

43

than $3) and doesn’t need an external
reference. The fact that it uses an
SPI interface really simplifies the
isolation circuitry needed in the
floating supplies.

Even though the MCP3202 can

operate from 2.7 to 5.5 V, I chose to
operate it from 5 V, because that reg-
ulated voltage was easy to provide
with a UA7805. The disadvantage to
this power supply voltage was that
the ADC’s full-scale input is also
5 V. Though the power supply’s out-
put voltage is scaled down to this
range for the regulation circuitry, the
current-monitoring circuitry con-
verts current to a somewhat lower
voltage. Despite the fact that the
actual scaling differs between the
floating and non-floating power sup-
plies, the net result is that current
resolution is only about 9 bits. This
current resolution was sufficient for
my purposes, however.

The MCP42010 dual digital poten-

tiometer has a neat feature: it contains
a Serial Out terminal. Using this fea-
ture, you can daisy-chain these
devices and load many of them simul-
taneously, using only three control
lines—CS, SCK, and SI (with the
daisy-chained devices being fed from
the previous device’s SO line).

Although I needed only one dual

potentiometer for each power supply,
I used this feature to daisy-chain the
MC3202 ADC device to the digital
potentiometer, thereby eliminating
one—the CS control line—for the
nonessential ground-referenced sup-
ply. For the floating supplies, it
allowed me to provide all of the nec-
essary isolation in one device package,
which was beneficial.

To protect against short circuits, I

added a Raychem PolySwitch RXE075
resettable fuse, which limits short-cir-
cuit current to 750 mA. I did this

ply. You’ll learn more about how I
used the high-side current monitor cir-
cuit a little later.

Although Robert didn’t mention any

instability problems in his article, I
experienced them myself as I was
building this circuit. I found it neces-
sary to use 0.01 capacitors (C2, C3) for
feedback compensation on both com-
parators in order to eliminate RF oscil-
lation on the power supply output
under varying load conditions. I
thought I could eliminate buffer U1 in
my design because of the low current
requirements of the MOSFET pass ele-
ment; however, the diode NOR circuit
seemed to produce RF oscillations on
the power supply’s output without
this buffer in place.

The final part of the circuit is the

metering portion. In place of the
DPMs, I used a Microchip MCP3202,
which is a dual 12-bit ADC. This
ADC is inexpensive (it costs less

Figure 1—

The ground-referenced power supply includes an independent 5-V supply to run the microcontroller module.

44

Issue 149 December 2002

CIRCUIT CELLAR

®

www.circuitcellar.com

because the Zetex high-side
current monitors need at least
2.5 V to operate properly. A
direct short circuit would not
provide this, and the current-
limiting action would not
work. The PolySwitch fuses
more than function: they act
as fuses and provide enough
voltage drop during short-cir-
cuit conditions to allow the
Zetex current monitors to operate.

Although it isn’t obvious from the

schematic, I designed this power sup-
ply’s PCB to include a 30-pin SIMM
connector. The MCU module is a
daughterboard on this PCB. Also, the
two isolation chips that interface the
MCU to the two floating power sup-
plies are contained on this PCB.
Photo 1 depicts the PCB and the
backside of the MCU module. I’ll
describe both the MCU module and
the isolation circuits later.

SEE IF IT FLOATS

I’ve explained in detail the ground-

referenced power supply. There are
only a few differences between it and
the two floating power supplies; how-
ever, I’ve provided Figure 2 to show
you these differences.

Where the ground-referenced supply

was meant to provide 8 V at about
500 mA, the floating supplies were
meant to provide higher voltages for
powering analog circuits such as op-
amps. I wanted at least a 15-V output,
but a current capacity of 300 mA was
deemed sufficient for my needs. I sub-
stituted a 34-V transformer for T1. It’s
the same size as the 24-V device used
in the ground-referenced supply, which
was handy because all three power sup-
plies share a similar PCB layout.

The floating supplies need not

include the 5-V regulated MCU power
supply that was part of the ground-ref-
erenced supply. The value of the out-
put voltage-scaling network is differ-
ent from the ground-referenced sup-
ply. In this case, potentiometer R10 is
set to produce 12.8 V at power-up.
This gives a resolution of 100 mV per
digital potentiometer step.

The only remaining difference has

to do with the value of the current
monitor-scaling resistor R6. I

increased the value of this resistor
from 100 to 220

Ω

to scale the lower

current capacity of this supply into a
voltage that’s compatible with both
the 5-V referenced ADC and digital
potentiometer.

THE ZETEX ZXCT1009

You can monitor the current drawn

from the power supplies in two ways.
Both methods involve inserting an
accurate low-value resistor in series
with the power supply output, and
then measuring the voltage drop
across that resistor. A measure of the
current drawn then will be equal to
the voltage drop/resistor value. If that
resistor is placed in series with the
negative output terminal of the power
supply, the resulting voltage drop will
be referenced to the power supply’s
common terminal. This makes it easy
to measure with an ADC (or DPM)
that is powered by, and referenced to,
the power supply’s common terminal.

The downside of this method is that

whatever voltage is dropped across,
this current sense resistor is lost (i.e.,
the load gets a little less voltage than
the power supply thinks it is provid-
ing, and you see an inflated reading on
the voltage meter).

Alternately, you can place the cur-

rent-monitoring resistor in series with
the positive output terminal of the
power supply. Then, the voltage feed-
back network of the pass regulator can
be wired to follow this resistor, elimi-
nating the lost voltage problem that I
described earlier.

This method, however, introduces

the main problem associated with the
measuring of a small current-sense
voltage riding on a large common-
mode voltage: the power supply volt-
age itself. You can minimize this
problem by using a high-quality

instrumentation amplifier
and precision-matched
resistors, but they are
somewhat costly. This
second approach is called
high-side monitoring.

In his lab supply project,

Robert devised a clever
circuit to compensate for

the lost voltage problem
that plagued the first

method I described. In my design, I
chose to go with the second
approach—high-side monitoring.

I came to this decision after discov-

ering a clever IC made by Zetex called
a high-side current monitor. The
ZXCT1009 is a three-pin device in an
SOT23 package that converts the volt-
age dropped across a high-side current
sense resistor into a current. This cur-
rent is sent through a resistor to the
power supply’s common terminal,
providing an easy-to-measure voltage
proportional to the current draw.

The problems of measuring the low

sense voltage riding on the high power
supply common-mode voltage are
addressed inside the ZXCT1009;
therefore, you don’t have to worry too
much about this. Because the device
costs roughly $1, it certainly beats
designing in an instrumentation
amplifier to perform this task.

However, the ZXCT1009 isn’t a

universal solution to the current-sens-
ing problem. It requires an input volt-
age of 2.5 V or greater, so you can’t
easily monitor current if you want to
run your power supply at voltages less
than this. The maximum input volt-
age it can withstand is 20 V without
additional circuitry. Neither limita-
tion was a deal breaker for me, so I
incorporated one of these devices in
each power supply. My biggest con-
cern was holding the tiny device
steady while I soldered it to the PCB!

You may want to consult the Zetex

datasheet for more information, but the
only other detail I’ll mention is that the
device produces 10 mA for every 1 V
dropped across the current sense resis-
tor. I had 1-

Ω

, 1% 5-W resistors in my

junk box, so that’s what I used for the
current-sense resistors in all three sup-
plies. This didn’t waste too much of the
power supply’s voltage capability.

Supply

Voltage

Current Notes

number

range

capacity

1

2.5–8 V

500 mA

Ground-referenced

2

2.5–15 V

300 mA

Bipolar or floating

3

2.5–15 V

300 mA

Bipolar or floating

4

5 V

3 A

Fixed logic supply, commercial module

Table 1—

As you can see, there are four power supplies. I’ve included all of the

information you need to understand their capabilities.

www.circuitcellar.com

CIRCUIT CELLAR

®

Issue 149 December 2002

45

The lower-current floating supplies

used a 220-

Ω

resistor to convert

ZXCT1009’s output current into a
voltage. The higher-current, ground-
referenced supply has a fitted 100-

Ω

resistor, and the MCU’s software per-
forms the math that’s necessary to
convert the ADC’s output into the
correct current reading on the meter.

AN IDEAL ISOLATOR

After spending years servicing and

designing electronics devices, I have
to say that I’m as impressed with
some of the amazing things that were
done with vacuum tube circuits
back in the old days, as I am with
some of the modern, miniature ICs
that are available today.

For this project, though, I pam-

pered myself with state-of-the-art
devices rather than depending on
clever, but more involved, circuits
using conventional devices. I’ve
already described the Zetex current
monitor, which is one example of

this. I continued with this trend in
choosing the isolation technique for
the floating power supplies.

The digital control and monitoring

signals for the two floating supplies
have to be electrically isolated from
the ground-referenced MCU circuit.
Thanks to the clever design of
Microchip’s SPI digital potentiometer
and SPI ADC, each power supply
needed only four control signals: three
outputs from the MCU and one input.

My first inclination was to use

optoisolator chips. I had just finished
another project using optoisolators to
interface the same Microchip SPI
ADCs. In that project, meeting the
ADC’s SPI timing considerations
given the rather slow response of the
optoisolators was a bit tricky,
although possible.

Luckily, Jeff Bachiochi had just writ-

ten a column about isolation in which
he outlined a novel line of isolators
made by Nonvolatile Electronics
(“You’re Not Alone—Dealing with

Isolation,” Circuit Cellar 142).
Rather than using an optical method
to achieve galvanic isolation, these
isolators use magnetism. Although
pulse transformers have been around
for ages and can perform isolation
using magnetism, they are compara-
tively bulky, expensive, and don’t
pass DC levels.

The IsoLoop isolators, on the other

hand, use GMR or giant magnetoresis-
tive devices to sense the magnetic
field change produced by an excitation
coil, which is nearby but electrically
isolated. The change in resistance of
the magnetic thin film layer is used,
along with other on-chip circuitry, to
implement the isolation function of
the device. The IsoLoop devices actu-
ally differentiate the input signal, and
send only short magnetic pulses
through their excitation coils during
input signal transitions. The resulting
resistance changes in the magnetic
thin film layer—configured in a
Wheatstone bridge—are measured,

Figure 2—

The floating supplies are almost identical to Figure 1, but there are different component values. Note that the ground symbols in this figure are local to this board

alone (i.e., they are not connected to ground on any other boards shown in the other figures).

46

Issue 149 December 2002

CIRCUIT CELLAR

®

www.circuitcellar.com

and the resulting output signal is
actually the output of an on-chip
latch device.

Don’t be fooled by the use of the

term “giant” in GMR; these devices
are tiny. Typically, four isolators
will fit into a 16-pin wide SOIC
package. The wide package is need-
ed, presumably, to allow the devices
to withstand the 2500 V

RMS

at which

they are rated.

With regard to the packaging, I was

impressed with NVE’s decision to pro-
duce several different device configu-
rations. They sell the normal quad
devices with all four channels config-
ured in the same direction (IL715);
however, they also sell quad devices
containing two channels in each
direction (IL716). My favorite, the
IL717, has three channels in one
direction and the remainder going in

the other direction. This configura-
tion is perfect for SPI device isolation,
which needs a Chip Select, Clock, and
Data Out lines coming out from the
MCU and a Data In line going back
into the MCU.

Given the modest voltage isolation

I needed for this supply, I could have
used a quad optical isolator and wired
up one section “backwards,” so to
speak, but the PCB layout would
have been much less neat. In cases
where input and output signals have
to be isolated and substantial voltage
isolation is required, the only way to
achieve this—apart from using sepa-
rate devices—is to use an appropri-
ately configured device like those in
this IsoLoop family.

I’ve actually saved the best part

for last: these IsoLoop devices are
fast! The IL700 family exhibits a

100-Mbps data rate. In addition, it
has only 2-ns pulse width distortion
and 10-ns pulse delay.

Unlike optoisolators, which require

LED drive voltage/current and often
don’t provide logic-level output signals,
the IsoLoop devices work directly with
3.3- or 5-V logic devices including
MCUs. Although an optical isolator
requires a steady drive current when-
ever its LED is turned on, the IsoLoop
devices use only a short pulse of mag-
netism whenever the input signal
changes state (even though a small but
steady current is required for the detec-
tion and latching circuitry in the chip).

The IL717 that I used requires only a

2.5-mA power supply current on its
input side, and 6 mA on its output side.
This difference arises from the fact that
the device has three channels in one
direction and only one in the other.

Figure 3—

Take a look at the MCU, IsoLoop isolators, and the user interface. Some of this circuitry is actually contained on the SIMM100 module.

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48

Issue 149 December 2002

CIRCUIT CELLAR

®

www.circuitcellar.com

In my design, I did not have to give

any more thought to the SPI timing
on the floating channels than I did to
the channel that wasn’t isolated.
Basically, what goes into the IL717 is
what comes out the other side!

There are only two cautionary notes

that I would add regarding these
devices. First, IsoLoop devices trans-
mit their signal across the isolation
barrier only on signal transitions. The
recovered signal on the other side of
the barrier is then electrically latched.
Practically, this means that the output
of the devices is indeterminate until
input transitions occur. For some
applications, this means that an ini-
tialization routine must be performed
to ensure that the device’s outputs are
in a known state after power-up.

The second cautionary note is just as

important. Because the devices rely on
sending a short magnetic pulse at each
input transition, it is important to place
at least a 47-nF ceramic decoupling
capacitor between V

DD

and ground on

both input and output ports of the
device. The capacitors should be placed
close to the actual device pins.

I tried to share one capacitor

between two IsoLoop devices on the
common MCU port side of the two
devices. This didn’t work. There were
random output errors on the device
farthest away from the sole capacitor
that disappeared completely when I
followed directions!

MCU AND USER INTERFACE

As with every other project I’ve

worked on in the last two years, I
chose the Atmel AVR family for the

MCU. In this case,
I went with the
AT90S8535 for a
couple of reasons. I
needed 23 I/O lines
to handle the three
SPI channels, LCD,
rotary encoders,
and RS-232. This
ruled out the use of
smaller AVR
devices. I could’ve
used the slightly
less expensive

AT90LS8515, but I
wanted to allow for

the possibility of adding a tempera-
ture-sensing meter/alarm option to
the circuit. The ’8535 has a 10-bit
ADC function that’s suitable for this
purpose; the ’8515 does not.

The ’8535 MCU has 8 KB of ISP

flash memory, which is just about
right for the necessary firmware. It
also contains 512 bytes of EEPROM. I
used a small amount of the EEPROM
to store default values for the three
programmable power supplies. That is
to say, the power supply will power up
with the same settings that existed at
the time its Save Configuration push
button was last pressed.

To simplify construction, I decided

to use a SIMM100 SimmStick module
made by Lawicel. The SIMM100 is a
3.5

″

× 2.0

″

PCB containing the ’8535,

power supply regulator, reset function,
RS-232 interface, ADC, ISP program-
ming headers, and a 30-pin
SimmStick-style bus. I’ve used this
module for prototypes several times in
the past, but this is the first time I’ve
actually incorporated one into a fin-
ished project. Photo 2 is the manufac-
turer’s picture of an assembled mod-
ule. For this project, I populated a bare
SIMM100 PCB with only the compo-
nents that I actually needed.

The MCU port signals needed to

operate the three SPI channels and
interface the two rotary encoders
come out through the 30-pin bus. As
you now know, I designed the ground-
referenced power supply PCB to
include space to mount the SIMM100
module, as well as the IsoLoop isola-
tors. The SIMM100 mounts at right
angles to this PCB; it’s hard-wired in

Photo 3—

Lawicel’s new stAVeR40 module is a decent product. I might have used

it in place of the SimmStick had it been available when I was designing my project.

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50

Issue 149 December 2002

CIRCUIT CELLAR

®

www.circuitcellar.com

place using 90° header pins.
The floating power supplies
share a virtually identical
PCB layout apart from being
smaller because of the lack of
traces and circuitry associat-
ed with the SIMM100 bus
and IsoLoop isolators.

The SIMM100 module has

headers for the ISP program-
ming cable and RS-232 port. I
used its ADC header to run
the LCD by reassigning six of
the ADC port pins to general
I/O pins.

When I buy in bulk, it’s

inevitable that by the time I use the
last item in my stock, something
better has taken its place. After con-
tacting Lawicel to request a .jpg
image of the SIMM100 for this arti-
cle, I was introduced to the new line
of AVR modules that the company is
developing.

Rather than a SimmStick-based

module, the new modules are 24- and
40-pin DIP modules that are meant to
replace Basic Stamps. Instead of using
PIC chips/serial EEPROM and a Basic
Interpreter, they implement the most
powerful members of Atmel’s AVR
family—the Mega chips.

Mega chips execute compiled code

from fast internal flash memory and
contain much more RAM and EEP-
ROM than Stamps. Even though flash
programming AVR-family chips is
easy through SPI, using inexpensive
printer port programming cables,
these modules go one step further by
incorporating RS-232 flash memory
programming. This makes field
updates a snap. Take a look at the
new stAVeR40 module in Photo 3. I
might have used this module instead
of the SIMM100 had it existed when
I started the project.

The user interface I settled on con-

sisted of a common 4 × 20 LCD panel
along with two rotary encoders. One
encoder is used to scroll through the
various power supply parameters, and
the other adjusts the selected parame-
ter. The cost of LCDs and rotary
encoders is reasonable these days.
Being able to eliminate the substantial
cost of six DPMs and six 10-turn
potentiometers was the main reason

for choosing an MCU-based design in
the first place. Photo 4 shows the
front panel of the unit.

Inexpensive rotary encoders come

in two basic flavors: quadrature
encoded and 2-bit binary (Gray) coded.
I’ve used the quadrature-encoded style
in the past, but the ones I used for
this project have a 2-bit output (with
Gray coding). With only 2 bits, the
encoder can represent only four dif-
ferent values, even though it has
32 detents per rotation. With this in
mind, it’s necessary for the firmware
to constantly poll both encoders and
keep track of the carry or borrow con-
ditions that occur as the encoder
moves beyond a four-position range.
The main control loop in the
firmware is executed every few mil-
liseconds, so keeping an accurate
track of the rotary encoder’s position
is accomplished readily.

The RS-232 port came as part of

the SIMM100 module. Thinking
about the future, I envision adding
some firmware code to allow the
bench supply to be remotely con-
trolled by a host PC, and to allow for
the data logging of the various volt-
ages/currents over time.

I haven’t provided you with a com-

plete block diagram, but I did incorpo-
rate a few features that don’t show up
on the individual schematics.
Previously, I mentioned adding an
additional commercial 5-V, 3-A supply
for logic circuits. I also added a 3PST
switch, with one section in series
with each supply’s positive output, to
allow all power supplies to be discon-
nected from the load during power-up.

Photo 4—

To the right of the output Johnson posts are the switches

that set the polarity of the floating supplies—as well as the switch
that disconnects all power supply outputs—while leaving the unit
still powered up.

www.circuitcellar.com

CIRCUIT CELLAR

®

Issue 149 December 2002

51

PROJECT FILES

To download the firmware, go to
ftp.circuitcellar.com/pub/Circuit_
Cellar/2002/149/.

SOURCES

AT90S8535 Microcontroller
Atmel Corp.
[phone]
www.atmel.com

Power supply module
Condor D.C. Power Supplies, Inc.
[phone]
[phone]
www.condorpower.com

SIMM100, stAVRer modules
Lawicel HB
[phone]
www.lawicel.com

BASCOM-AVR Compiler/pro-
grammer
MCS Electronics (Holland)
[phone]
www.mcselec.com

MCP42010 Digital potentiome-
ter, MCP3202 ADC
Microchip Technology, Inc.
[phone]
www.microchip.com

IsoLoop high-speed digital isola-
tors
Nonvolatile Electronics, Inc.
[phone]
www.isoloop.com

RXE075
Raychem Corp.
www.raychem.com

ZXCT1009 Current monitor
Zetex Semiconductors
[phone]
www.zetex.com

Brian Millier is an instrumentation
engineer in the Department of
Chemistry at Dalhousie University
in Halifax, Canada. He also runs
Computer Interface Consultants. You
may reach him at [e-mail].

A small DC computer-type fan was
mounted on the top of the outer case
for cooling purposes, because the pass-
transistor heatsinks that I used were
not too large.

Lastly, Figure 3 shows you how the

’8535 MCU would typically be con-
nected to the rest of the circuit. It
doesn’t show the exact wiring of the
SIMM100 including the bus connec-
tions, because this detail isn’t needed
when constructing the circuit from
scratch (i.e., if you’re not using the
SIMM100 module). The SIMM100
documentation will give you all of
the necessary information regarding
the header and bus connections on
the module.

FIRMWARE

If you’ve read any of my more recent

articles, then I’m going to sound like
a broken record in this section. I
used an MCS Electronics BASCOM-
AVR compiler for this project (once
again). The code did not have to run
extremely fast, but floating-point and
string operations were needed.
Because there was plenty of flash
memory available in the ’8535, it
made sense to program in Basic rather
than using Assembly language.

Skipping over the unit’s initializa-

tion procedure for now, the control
loop in the program works basically as
follows. Both encoders are checked to
see if the user has moved them. If the
Menu encoder is changed, nothing is
done, apart from moving an arrow cur-
sor amongst the various parameters
that can be changed. If the Adjust
encoder is moved, the appropriate rou-
tine is called to adjust the necessary
power supply’s voltage or current limit
setting. This is accomplished by
changing the value of the appropriate
section of the digital potentiometer
located on the proper supply PCB.

Because each supply’s ADC is digi-

tally cascaded with that supply’s digi-
tal potentiometer, the routine that
updates the digital potentiometers
also reads the ADC all in one opera-
tion. For that reason, in the absence
of any changes to the voltage or cur-
rent-limit settings, each power supply
is sent a control message at 0.5-s
intervals to set its digital potentiome-

ters and read the dual ADC.
Constantly resetting the digital
potentiometers at this interval is
unnecessary, but periodically reading
the ADCs is necessary to give you
timely voltage/current readings.

The only remaining task in the con-

trol loop is to check the state of the
Save Configuration push button.
When it’s pressed, a routine is called
to save the current values of voltage
and current limit, for all three power
supplies, to data EEPROM.

At power-up, the data EEPROM is

checked for a valid configuration
saved from a previous use of the sup-
ply. If so, these voltage/current set-
tings are stored in RAM variables,
and the three supplies are initialized
to these settings. In the absence of
valid configuration readings, each
power supply is set to half scale, and
the current limit settings are preset
to maximum.

WRAP UP

I’m looking forward to the conven-

ience of using this multi-output yet
compact power supply in my future
projects. As with all projects, there
were some compromises I made
along the way.

I chose Microchip’s dual 8-bit digi-

tal potentiometers for the voltage/
current settings. Basically, I felt the
50-mV voltage-setting resolution
(100 mV for floating supplies) was
sufficient for my purposes. The
resulting current-limit resolution of
20 mA (8 mA for floating supplies)
also seemed reasonable; however, dual
12-bit SPI DACs are available, which
would improve this resolution sub-
stantially. Maxim makes some nice
serial DACs, but they come in such
small packages that I can’t handle or
solder them to a PCB.

The existing version of the firmware

uses 6800 of the total 8192 bytes of
flash memory. This leaves sufficient
room to add remote control via the
RS-232 port in future. Because the
firmware is written in BASIC, it’s rea-
sonably easy to go into the code and
add additional features at a later date.

Although it was a bit of an overkill

to use the ultra-fast NVE IsoLoop
devices for this project, it made that

part of the design rather easy. I’d like
to thank NVE for quickly sending me
a few samples to incorporate in my
design.

I

52

Issue 149 December 2002

CIRCUIT CELLAR

®

www.circuitcellar.com

ecently, I was

shooting the

breeze with some

friends, and the conver-

sation turned to what we all did as
kids versus what we do today for a liv-
ing. Obviously, electricity was in my
future. I figure I’ve been building elec-
tronic stuff since I was 11 years old.
Thanks to my dad, a couple of NASA
missile technicians, Lafayette mail-
order electronics, and Heathkit, I’ve
done my share of releasing the smoke.

Because of my dad’s interest in stereo

equipment, he befriended one of the
NASA guys who would bring me
bushel baskets of fall out transistors
and tubes from the engineering depart-
ment at the Marshall Space Flight
Center in Huntsville, Alabama. The
second NASA man was moonlighting
as the weekend engineer at the AM
radio station I worked for as a teen.

On Sunday mornings, he would

come in to check the transmitter.
Depending on my Saturday night,
there were times I would fall asleep at
the console and he would step into
the studio to revive me. In the years
that I knew him (while I was awake),
he managed to teach me a great deal
about logic and the electronics
behind it. I later found out that he

was the person who actually
strapped in the first primate that
took the ride on the rocket from
Cape Canaveral Air Force Station.

Over time, building audio gear gave

way to experimenting with digital
electronics. To date, I’ve designed and
built hundreds of microcontroller-
based projects, many of which you’ve
seen in this magazine. With that
thought, I figure it’s time for a break.
This month, I’m going to let some
special five-star chefs from Future
Electronics and Microchip cook this
electronic meal for you. So, sit back
and relax with me as they show us
how easy it is to concoct a wireless
temperature sensor stew.

rfPICDEM1

Future Electronics’s Technical

Solutions Management Group and
Microchip have teamed up to make
designing and implementing wireless
sensor applications dead easy. All of
the math and plumbing that’s com-
mon to putting RF boxes together has
been done for you. The plumbing
refers to the RF part of the demo
board. In my FM radio days, I called
the transmitter techs plumbers,
because they worked with wave
guides and tuned cavities just like real
plumbers worked with kitchen pipes.
The only real difference was that the
radio plumbers didn’t do toilets and
they never got wet.

Figure 1 is a block diagram of the

rfPICDEM1 wireless sensor demo
board set. The receiver and transmit-
ter are separate, microcontroller-based
units. As you know, Microchip has
branched out its suite of products.
Now, in addition to the standard line
of microcontrollers, this set of rfPIC
demo boards includes a Microchip
LDO voltage regulator (TC55) and
temperature sensor (TC74).

The object of the rfPIC wireless

sensor solution demo kit is to show
us how to use the Microchip
rfPIC12C509 to send temperature data
collected by a Microchip TC74 tem-
perature sensor over a short-haul
433-MHz RF link to a smart receiver
using a Philips UAA3201 RF receiver
IC front-ending a PIC16C925 with an
integrated LCD controller. Whew!

A Wireless Temperature
Sensor Stew

r

Fred says designing
and implementing a
wireless sensor appli-
cation doesn’t have to
be complicated.
Future Electronics
and Microchip have
put together an easy-
to-use wireless tem-
perature sensor demo
kit, and Fred has all
of the info you’ll need
to get started.

Fred Eady

APPLIED
PCs

www.circuitcellar.com

CIRCUIT CELLAR

®

Issue 149 December 2002

53

SW1 is pressed and held. Also, because
each TC74 has a permanent I

2

C

address that depends on the part num-
ber of the sensor, the transmitter code
uses I

2

C signaling to automatically

determine the I

2

C address of the cur-

rent on-board TC74.

A message sent by the rfPICDEM1

transmitter consists of 32 bits of head-
er data (zeros) followed by a 4-bit
sync frame (ones) and 32 bits of data.
The data field contains the station
ID (8 bits), the temperature (8 bits), a
4-bit sensor type, 2 bits of message
type, 2 bits of button status, and an
8-bit checksum. This entire message
is transmitted three times each time
the transmit event is invoked.

The rfPICDEM1 receiver can detect

and support up to 16 remote transmit-
ters. With the push of a button on the
receiver, you can select one of four
modes of operation. You can display the
temperature local to the receiver, the
temperature at the remote transmitter,
or the difference between the local
and remote temperatures can be
exhibited. Auto mode displays the
local temperature followed by all of
the received remote temperatures.
Two LEDs on the receiver show the
status of the remote push buttons.

As you can see in Photo 1, both

boards are battery powered, and the
receiver has on-board provisions for
in-circuit serial programming (ICSP).
An 8-pin socket pad area on the trans-
mitter allows you to use a separate 8-

pin PIC or PIC in-circuit emulator to

That was a mouthful, but it isn’t as
complicated as that last sentence
makes it seem.

The transmitter is based on the

rfPIC12C509AG that’s driving a loop
antenna, which is etched onto the
transmitter circuit board. The
rfPIC12C509AG is really a standard
PIC12C509 coupled with a 433-MHz
amplitude shift-keying (ASK) trans-
mitter. The RF side of the
rfPIC12C509AG consists of a crystal
oscillator, an integral phase-locked
loop, mode control logic, and an open-
collector differential-output power
amplifier. As you can see in Figure 2,
the RF section and the PIC microcon-
troller electronics are logically sepa-
rate, although they reside inside the
same physical package.

Normally, ASK modulation is per-

formed by alternately changing the
amplitude of the carrier in a pulse
width modulation fashion (i.e., the car-
rier wave is modulated for a period of
time to signal a logic 1 and left idle for
a period of time to indicate a logic 0).
Instead of employing the more com-
mon PWM method, the rfPICDEM1
uses Manchester encoding.

In Manchester encoding, a logic 0

is seen as a transition from zero to
one at the center of the bit time.
Conversely, a logic 1 is indicated by a
one-to-zero transition at the center of
the bit time. This results in a synchro-
nous bitstream with an encoded clock
signal that doesn’t always transition

physically at bit boundaries; instead,
it always transitions logically at the
center of each bit time.

When powered up, the transmitter

sleeps most of the time to conserve
the battery. When it awakes, the
PIC12C509 part of the rfPIC reads the
TC74 using I

2

C signaling. If the tem-

perature has changed, the new temper-
ature is transmitted. There are two
push buttons on the transmitter. These
push buttons are used to wake up the
transmitter, set the station ID, generate
a test (calibration) tone, or initiate the
transmission of the current tempera-
ture and transmitter switch status.

The transmitter code was written to

automatically change the transmitter
station ID (zero through seven) when

Receiver

Microchip TC74

temperature sensor

Raltron crystal

Raltron SAW

Philips

UAA3201

RF receiver

Microchip PIC16C925

microcontroller

Lumex LEDs

ITT Industries

push buttons

Lumex LCD

9-VDC

Battery

Microchip LDO

TC55

Current

measurement

Transmitter

Raltron
crystal

Microchip

TC74

temperature sensor

Microchip rfPIC12C509

microcontroller

ITT Industries

push buttons

Coin

battery

Current

measurement

Figure 1—

It’s too bad you can’t click on the boxes to go directly to companies’ web sites for the datasheets. You

can get a copy of the CD-ROM that contains this image from your Future Electronics or Microchip representative.

Figure 2—

As you can see, the RF section and the PIC microcontroller electronics are clearly separate from each other.

Notice that I didn’t mention display-

ing the push button status. That’s
because I really want to replace those
tiny buttons with a more ergonomic
user interface. Now, I’m at the cross-

roads and the challenge has been laid
down: Do I build customized hardware
to do this conversion, or can I assem-
ble a set of prefabricated electronic
building blocks and weasel out of

54

Issue 149 December 2002

CIRCUIT CELLAR

®

www.circuitcellar.com

control the RF section of the rfPIC.
On the transmitter board, “X” sym-
bols mark the spots where the traces
can be cut to isolate the optional 8-pin
PIC pads from the rfPIC12C509AG.
For a close-up view of these markings,
take a look at Photo 2.

FRED’S rfPICDEM1

The rfPICDEM1 comes ready to roll

with functional firmware loads in
both the transmitter and receiver. My
rfPICDEM1 worked as designed when
I powered up the boards. Although the
rfPICDEM1 is a fun gadget to play
with, you’re not supposed to stop
playing with it after you power it up
and verify the temperature of the
room you’re standing in.

From the preliminary marketing

package I received from Microchip, I
knew I could use the ICSP adapter on
the receiver to twiddle bits on the
PIC16C925 by replacing it with a
windowed JW reprogrammable part.
However, I was reasonably concerned
about how I was going to manipulate
the transmitter code, especially
because there weren’t any alterna-
tives other than replacing the sur-
face-mounted rfPIC or putting some-
thing there in its place.

In anticipation of not being able to

keep my hands off the code or the
physical electronics, I obtained a cou-
ple of windowed PIC16C925 devices
and a tube of rfPIC12C509AG units. I
also picked up an ICSP adapter and a
PIC16C925 programming adapter for
my Microchip Pro Mate II program-
mer. I had considered getting some of
the windowed rfPICs but that would
mean performing major surgery on the
little transmitter stick.

After I became accustomed to what

the rfPIC demo package could do, I
decided to leave the receiver alone; it
was already equipped to show the con-
tents of the data received from the
remote transmitter as well as the tem-
perature of its on-board TC74 senses.
Because the transmitter was without
any user feedback by itself, I thought
it would be neat to crack into the
transmitter and display its station ID
and temperature without having to
transmit all of that to the receiver and
view it on the receiver’s LCD.

Listing 1—

The command reply from the switch module is assembled in the

send_buffer[] array and is

sent before the actual RPC code is executed. A valid command reply always begins with the incoming
command plus 0x10.

case 0x14:

send_buffer[0] = 0x24;

data_buffer[1] = bgetc();

data_buffer[2] = bgetc();

send_buffer[1] = data_buffer[1];

send_buffer[2] = data_buffer[2];

if(data_buffer[1] == 0x30 && data_buffer[2] == 0x31)

{

for(i=0;i<3;++i)

putc(send_buffer[i]);

rf_ON;

rf_serial_data_H;

}

if(data_buffer[1] == 0x30 && data_buffer[2] == 0x32)

{

for(i=0;i<3;++i)

putc(send_buffer[i]);

rf_OFF;

rf_serial_data_L;

}

if(data_buffer[1] == 0x30 && data_buffer[2] == 0x33)

{

for(i=0;i<3;++i)

putc(send_buffer[i]);

++station_id;

if(station_id > 0x07)

station_id = 0x00;

status_byte |= SW1_STATUS_BIT;

for (i=0;i<7;++i)

{

Get_The_Temp();

//Send burst of three messages with this station ID times (takes

approximately 400 ms)

Transmit_Data(STATION_ID_MSG); //Transmit message with

this station ID

delay_ms(100);

//Wait 100 ms

Transmit_Data(STATION_ID_MSG);

//Transmit message with

this station ID

delay_ms(100);

//Wait 100 ms

Transmit_Data(STATION_ID_MSG);

//Transmit message with this

stationID

delay_ms(100);

//Wait 100 ms

}

}

if(data_buffer[1] == 0x30 && data_buffer[2] == 0x34)

{

for(i=0;i<3;++i)

putc(send_buffer[i]);

Get_The_Temp();

old_temperature_deg_C = temperature_deg_C;

old_status_byte = status_byte;

//Transmit data

Transmit_Data(NORMAL_MSG);

delay_ms(20);

Transmit_Data(NORMAL_MSG);

delay_ms(20);

Transmit_Data(NORMAL_MSG);

delay_ms(5);

}

break;

www.circuitcellar.com

CIRCUIT CELLAR

®

Issue 149 December 2002

55

doing a bunch of soldering and coding?

One problem would be what to do

about the surface-mounted rfPIC. It
seems I would have to solder in a new
one each time I changed the code or cut
the traces and install the optional 8-pin
DIP socket. Assuming I can come up
with a viable solution to deal with the

physical elements involved with con-
verting the rfPIC code, I’m still in the
soup as to how to convert the firmware.

The original code for the rfPICDEM1

was completed using the Hi-Tech PIC
C compiler. I don’t own a copy of Hi-
Tech’s C, but I do own a copy of the
CCS PICC, and you can be sure there
will be differences in the source that
I’ll have to interpret and compensate
for. And, if I did use the 8-pin DIP
socket and another 8-pin part, could I
get all of my new code to fit? The real
showstopper is that I would have to
remove the PIC to program it, because

there is no provision for ICSP on the
transmitter board. There will be no sur-
rogate PIC12C509 if I can get around it.

Because the transmitter’s push-but-

ton switches simply take an I/O pin

from the rfPIC to ground, I had original-
ly thought I could replace the transmit-
ter’s switches with logic levels from an
external microcontroller that would
take the place of the PIC12C509 por-
tion of the rfPIC. The external micro-
controller would allow me to use the
existing rfPIC in its entirety without

having to compromise the rfPIC’s origi-
nal firmware or PC board traces.

The problem, however, is that even

though I would gain the I/O lines and
program memory space necessary to
drive an LCD, I’d still be stuck using
push buttons or a keypad to actuate the

Photo 2—

“X” marks the spot. A cut of the trace at

every “X” logically separates the rfPIC’s microcontroller
I/O from the RF section. Only two lines from the micro-
controller side are used to control the RF side.

Photo 1—

Just another sunny day. Note the etched

loop antenna on the top of the smaller transmitter
board. The PIC16C925 that comes loaded with the
receiver firmware is a one-time programmable (OTP)
part and can be replaced with a windowed-reprogram-
mable part for firmware development.

SOLUTIONS CUBED • [phone] PHONE • WWW.SOLUTIONS-CUBED.COM

Need a better bridge?

3

Solutions

ICON H-Bridge

Up to 40VDC Motors

12A Continuous/25A Peak

Over Current Fuse

Over Temperature Fuse

Serial or Direct Drive Mode

2.5” X 1.9” Footprint

DC Motor Interface Module

56

Issue 149 December 2002

CIRCUIT CELLAR

®

www.circuitcellar.com

a Microchip MPLAB-ICD in-circuit
debugger (ICD) and an MPLAB-ICD
demo board that can host a PIC16F877.
Using the ICD, I can port the rfPIC
transmitter code to the PIC16F877
and develop the Amulet-to-PIC GUI
interface without having to touch the
rfPIC12C509AG or cut traces on the
rfPICDEM1 transmitter PCB.

The Easy GUI’s DCE serial inter-

face expects to see a DTE interface at
the other end. The same is true for

transmitter. No matter what, I’m going
to have to alter the rfPIC’s firmware to
obtain any data from the transmitter’s
rfPIC. The ideal solution would be a
touch-sensitive display that would inte-
grate easily to an external microcon-
troller and handle the data-gathering
(and conversion) duties needed to drive
the LCD, as well as the RF tasks.

AMULET’S EASY GUI

Thank you, Tom Cantrell. I remem-

bered a piece that Tom did covering the

Amulet Easy GUI (“Liquid Crystal
Delight,” Circuit Cellar 132). If I could
use the Amulet device, I may be able to
pull off this whole conversion thing.

A couple of hours after receiving a

5.7

″

version of the Easy GUI touch

display, I was using Macromedia’s
Dreamweaver to design my new
rfPICDEM1 user interface. The
Amulet device used in conjunction

with a web-authoring program like
Dreamweaver becomes a web site you
can literally hold in your hand.
Generating the GUI code was as sim-
ple as copying from the Amulet widg-
et library and pasting to my
Dreamweaver design page.

After I generated my first GUI on

the Easy GUI device, things started to
come together. The Easy GUI inter-
faces to a server via a standard serial
port configured as data communica-
tions equipment (DCE). In your case,
that server will be a PIC16F877.

Using the PIC16F877 and a simple

Sipex232 IC, I can interface to the
Easy GUI using the PIC16F877’s inter-
nal UART. Also, I just happen to have

Photo 3—

Adding parts to this MPLAB-ICD demo board

wasn’t the only thing I had to do to get my ICD up to
par for this project. I also had to upgrade the firmware
on the MPLAB-ICD module. If you have a down-level
ICD, just search ETNs on the Microchip web site. ETN
#21 tells you how to perform the upgrade.

Photo 4—

The Amulet Easy GUI is a touch-driven,

hand-held web site that you can get up and running
with little or no HTML experience. The Test Tone button
is shown in toggled mode.

58

Issue 149 December 2002

CIRCUIT CELLAR

®

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Photo 4. The Test Tone button is
an Amulet function button
widget set for Toggle mode and
inverted display. When you
touch the Test Tone button, it
will invert and remain in that
state until you touch it again.

The first touch of the Test

Tone button initiates an event
that sends 3 bytes of data (0x14,
0x30, and 0x31) to the PIC16F877
server via the serial connection
between the two. The 0x14 is
the Amulet client-invoke remote
procedure call (RPC) command
with 0x30 and 0x31 representing
01 or routine 01.

All of the communications

between the Amulet client and server
are in ASCII format with the excep-
tion of the Amulet commands. The
server—the PIC16F877 in this
instance—has 200 ms to reply with
three bytes: 0x24, 0x30, and 0x31. If
the PIC16F877 server misses the
response window, the Easy GUI times
out and continues. The server should
always reply to a command or unex-
plained things may happen. If a code or
command is not understood or sup-
ported by the server, it should respond
to the Amulet client with a 0x10. The
Amulet client does not resend com-
mands under any circumstance.

The RPC routine number can be

from zero to 255. The server uses
these routine numbers to select and
run a particular set of code. For
instance, Listing 1 responds to the
RPC call initiated by the Test Tone
function button’s initial touch. The
01 (0x30 and 0x31) sequence is parsed
by the PIC16F877 operating code and
ultimately runs code that turns on
the rfPIC’s transmitter and sets the
transmit data pin high. A second
touch of the Test Tone button sends a
command that invokes routine 02,
which turns off the rfPIC’s transmit-
ter and sets the transmit data pin low.

Touching the Set Station ID func-

tion button invokes routine 03, which
increments the station ID variable and
transmits three station ID messages,
while the Send Temp function button
tells the PIC16F877 server to take a
temperature reading and transmit it
as a normal message three times.

the MPLAB-ICD demo board’s
serial interface. So, the first order
of business is to convert the
MPLAB-ICD demo board’s serial
interface from DCE to data termi-
nal equipment (DTE). By per-
forming that action, I can elimi-
nate the need for special
crossover cables or null modems
between the ICD demo board and
the Easy GUI.

Just in case I need to switch the

ICD demo board’s serial interface
back to DCE, I installed a mechan-
ical multiplexor (i.e., a DPDT slide
switch). The multiplexor simply
swaps pins 2 and 3 of the demo
board’s RS-232 interface in relation
to the PIC16F877’s UART RX and TX
pins, depending on which set of DPDT
switch poles are made. A graphical rep-
resentation of the mechanical multi-
plexor is shown in Figure 3.

After I was able to connect the

PIC16F877’s serial interface to the
Easy GUI’s serial port, I inserted my
Frontline Test Equipment Serialtest
Async datascope in the line to make it

easier to see what the PIC16F877 and
Easy GUI were saying to each other.
My switchable DTE/DCE MPLAB-ICD
demo board is populated in Photo 3.

For the touch display conversion, I

used the Amulet function button and
numeric-field and string-field widgets.
The widgets and associated HTML all
combined to produce the touch-sensi-
tive display rendering what you see in

Photo 5—

In addition to borrowing the services of the on-board 5-VDC

TC74 temperature sensor, I also “bogarted” the PICDEM2’s 4-MHz
oscillator for use on the MPLAB-ICD demo board. The PICDEM2 is
really designed to work with the legacy MPLAB-ICD (PIC16Fxxx
parts) and the new MPLAB-ICD2 (PIC18Fxxx parts).

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Listing 2 is the Amulet HTML and

PIC16F877 server code that creates the
Fahrenheit and Celsius temperature
Easy GUI display fields. The Fahrenheit
temperature reading is updated every
65 s, while the Celsius temperature
is read and updated every 60 s.
Temperature data from the Microchip
TC74 is supplied as 8 bits of Celsius
temperature data in 2’s complement
format. Thus, a temperature reading of
0xFF is interpreted as –1°C.

The

Get_The_Temp() function

reads the TC74 and performs the
necessary calculations to produce
both a Celsius and Fahrenheit
ASCII temperature value that’s
passed to the Amulet Easy GUI dis-
play. The unprocessed 8-bit tempera-
ture reading from the TC74 is saved
so it can be transmitted as the
receiver does its own display conver-
sions on the received data from the
remote transmitters.

www.circuitcellar.com

CIRCUIT CELLAR

®

Issue 149 December 2002

59

Listing 2—

ASCII characters from the

temp_display_C[] and temp_display_F[] arrays are inserted

into the

printf string of the applet. Here again, just a little knowledge of the C programming language takes

you a long way when assembling your Amulet GUI interface.

//Amulet applet code

<applet code="StringField.class" width="167" height="32" name="temp-

strc">

<param name="href" value="Amulet:UART.stringValue(1)">

<param name="fontSize" value="2">

<param name="fontstyle" value="bold|italic">

<param name="verticalAlign" value="top">

<param name="horizontalAlign" value="left">

<param name="printf" value="Temperature = %s">

<param name="border" value="0">

<param name="updateRate" value="60">

</applet></TD>

<applet code="StringField.class" width="153" height="25" name="temp-

strf">

<param name="href" value="Amulet:UART.stringValue(2)">

<param name="fontSize" value="2">

<param name="fontstyle" value="bold|italic">

<param name="verticalAlign" value="top">

<param name="horizontalAlign" value="left">

<param name="printf" value="Temperature = %s">

<param name="border" value="0">

<param name="updateRate" value="65">

//PIC code

case 0x12:

send_buffer[0] = 0x22;

data_buffer[1] = bgetc();

data_buffer[2] = bgetc();

send_buffer[1] = data_buffer[1];

send_buffer[2] = data_buffer[2];

if(data_buffer[1] == 0x30 && data_buffer[2] == 0x31)

{

for(i=0;i<3;++i)

putc(send_buffer[i]);

for(i=0;i<nbr_chars_C;++i)

putc(temp_display_C[i]);

}

if(data_buffer[1] == 0x30 && data_buffer[2] == 0x32)

{

for(i=0;i<3;++i)

putc(send_buffer[i]);

for(i=0;i<nbr_chars_F;++i)

putc(temp_display_F[i]);

}

break;

/////////////////////////

default:

Get_The_Temp();

break;

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The station ID value indicator at the

bottom of the display is an Amulet
numeric field widget that requests the
station ID value from the PIC16F877
server every 2 s. Note the numeric field
applet’s

min, max, minFld, and maxFld

fields in Listing 3. Station IDs are
mapped one-to-one—

min to minFld

and

max to maxFld—because the mini-

mum value for a station ID is zero, and
the maximum station ID value is seven.

The

min value corresponds to the

minFld value (i.e., if the minimum
value returned from the invocation of
the station ID RPC is zero, then it’s
mapped to the

minFld value of zero).

The same is true for the

max and

maxFld fields, because a maximum
returned value of seven maps to the
maxFld value of seven.

rfPICDEM1 WITH TOUCH SCREEN

After I got the basics of the Easy GUI

under my belt and saw it spitting data

out on the Serialtest Async datascope
screen, the rest of the process of putting
together the wireless temperature sen-
sor conversion process went smoothly.

Using the Microchip ICD in con-

junction with the CCS PICC C com-
piler and MPLAB, I was able to
leisurely port the rfPIC transmitter
code over to the PIC16F877 in less
than two days. Because the original
wireless sensor application is based on
the rfPIC12C509AG, all of the I

2

C and

RF routines are based on a 4-MHz
clock with a 1-µs cycle. All I had to
do to get the temperature sensor to
talk to the PIC16F877 was turn on
the respective clock sources in the
PIC16F877 and run the MPLAB-ICD
demo board with a 4-MHz oscillator
I had stolen from the PICDEM2
PLUS board.

To test the RF, I finally had to move

to a 3.3-VDC platform to preserve the
integrity of the transmitter’s original

60

Issue 149 December 2002

CIRCUIT CELLAR

®

www.circuitcellar.com

I initially tested the temperature

code and applet HTML using a
punched-in number. When it came
time to put the actual hardware to the
test, I realized that because the rfPIC
transmitter temperature sensor was
running at 3.3 VDC and my MPLAB-
ICD system was running at 5 VDC, I
ran the risk of letting the smoke out
of my rfPIC transmitter’s 3.3-VDC
TC74 temperature sensor if I drove
the TC74 from the PIC16F877.

Because I didn’t have any spare

TC74s and I wanted to limit my solder-
ing activity, I opted not to test the 5-
VDC tolerance of the 3.3-VDC TC74’s
I

2

C pins. The alternative was to build

up an alternate 3.3-VDC PIC16F877
board with a 3.3-VDC RS-232 converter
or find another board with a 5-VDC
TC74 on it. I didn’t want to build up
anything for this project and, as luck
would have it, I didn’t have a
PIC16LF876 to retrofit my MPLAB-ICD
for use with PIC microcontroller targets
running a V

CC

below 4.5 VDC.

Fortunately, I recently received a

PICDEM2 PLUS board, and what do
you know, that funny-looking five-pin
device on the new PICDEM2 PLUS
board just happens to be a 5-VDC
TC74. To gain access to the MPLAB-
ICD’s PIC16F877 pins, I added some
header pins to the MPLAB-ICD. In
addition, I ran a couple of wires from
the TC74’s SDA and SCLK pins to the
correct set of the newly installed
PIC16F877 header pins. It was a kludge
with a common ground, but it worked;
it only took a few solder joints, and I
didn’t have to design a thing. My PIC-
DEM2 PLUS, complete with the TC74
tap, is depicted in Photo 5.

Listing 3—

The applet code for the station ID update is kicked off every 2 s by the Easy GUI device. This is

done to give quick feedback when the Set Station ID function button is pressed.

//Amulet applet code

<applet code="Field.class" width="125" height="32" align="BOTTOM"

name="numid">

<param name="href" value="Amulet:UART.byteValue(1)">

<param name="fontSize" value="2">

<param name="fontStyle" value="bold">

<param name="verticalAlign" value="middle">

<param name="horizontalAlign" value="center">

<param name="min" value="0">

<param name="max" value="7">

<param name="printf" value="Station ID is %2i">

<param name="minFld" value="0">

<param name="maxFld" value="7">

<param name="border" value="0">

<param name="updateRate" value="2">

</applet></TD>

//PIC code

case 0x11:

send_buffer[0] = 0x21;

data_buffer[1] = bgetc();

data_buffer[2] = bgetc();

send_buffer[1] = data_buffer[1];

send_buffer[2] = data_buffer[2];

if(data_buffer[1] == 0x30 && data_buffer[2] == 0x31)

{

send_buffer[3] = hex2ascii(station_id >> 4);

send_buffer[4] = hex2ascii(station_id & 0x0F);

for (i=0;i<5;++i)

putc(send_buffer[i]);

}

break;

PIC RX

PIC TX

RX

TX

To RS-232

connector

Figure 3—

There seems to be a bunch of “X’s” in this

month’s column. Anyway, this simple scheme swaps
the transmit and receive lines at the connector.
Because the Amulet Easy GUI and MPLAB-ICD serial
ports don’t care about the other modem signals, this
arrangement works fine.

www.circuitcellar.com

CIRCUIT CELLAR

®

Issue 149 December 2002

61

RF design. I dodged the build-it-from-
scratch bullet again, because I was
able to use an old 3.3-VDC project
(i.e., S7600-A/PIC16F877 Internet
engine) that has ICSP capability, an
RS-232 converter IC, and a PIC16F877
in place and ready to go. All I had to
do to migrate to the 3.3-VDC plat-
form was program my PIC16F877
code with ICSP, twist the RS-232 TX
and RX lines, and tie in the transmit-
ter board control signals.

I have a lot of fun doing projects

like this for Circuit Cellar; however,
the idea behind the Future Electronics/
Microchip wireless sensor demo kit is
to allow a designer to take the basic
ideas behind the hardware and
firmware and transfer them to his or
her custom project without having to
know a great deal about RF and sensor
interfacing up front.

For this project, I just added a touch

screen to the RF link. I never had to
think about anything RF to make it
happen, proving, once again, that it
doesn’t have to be complicated to be
embedded.

I

Fred Eady has more than 20 years of
experience as a systems engineer. He
has worked with computers and com-
munication systems large and small,
simple and complex. His forte is
embedded-systems design and com-
munications. Fred may be reached at
[e-mail].

SOURCES

Easy GUI
Amulet Technologies
[phone]
www.amulettechnologies.com

Serialtest Async datascope
Frontline Test Equipment, Inc.
[phone]
www.ftw.com

Wireless temperature solution kit

Future Electronics (U.S. headquarters)

[phone]
www.futureelectronics.com

C&K-series push buttons
ITT Industries, Inc.
[phone]
www.itt.com

SML-H601C71TR LCD panel, SML-
LX1206 SMT LEDs
Lumex, Inc.
[phone]
www.lumex.com

Dreamweaver
Macromedia, Inc.
[phone]
www.macromedia.com

MPLAB In-circuit debugger, Pro
Mate II, PIC16C925/F877 and
rfPIC12C509 microcontrollers,
TC55 voltage regulators, TC74
temperature sensor
Microchip Technology, Inc.
[phone]
www.microchip.com

UAA3201 RF receiver
Philips Semiconductor
[phone]
www.philips.com

AS HC-49/S Quartz crystals, RSR
SAW filter
Raltron Electronics Corp.
[phone]
www.raltron.com

PROJECT FILES

To download the code and a
block diagram of the boards, go to
ftp.circuitcellar.com/pub/Circuit_
Cellar/2002/149/.

62

Issue 149 December 2002

CIRCUIT CELLAR

®

www.circuitcellar.com

friend of mine

once observed that

all engineers wore the

same blank expression

when turning on the high-end
Tektronix oscilloscopes of the late
’70s. Finding the power switch amid
2 square feet of knobs and buttons
required several seconds of undivided
attention. After that, of course, you
could do anything single-handedly
with barely a glance because the con-
trol layout made sense.

Designing an instrument’s front

panel requires a major effort, because
it must work correctly, withstand
mechanical abuse, and be easy to use.
Moving parts tend to break, so front
panels also account for a major share
of service calls. Therefore, anything
that can simplify a front panel
deserves serious consideration.

The audio mixer described in my

October column (Circuit Cellar 147)
is affixed to the underside of my
wooden desktop near the back of my
PCs, putting it far out of reach. Rather
than bend metal and drill holes in the
front panel, however, I bashed HTML.
Photo 1 shows the mixer’s controls in
a browser on my virtual desktop.

NetMedia’s SitePlayer module pro-

vides a convenient network-to-bits

interface defined by ordinary HTML
and controlled by any web browser.
Several Circuit Cellar articles have fea-
tured a SitePlayer, but in this column
I’ll take a look at the analog, economic,
and technical implications of dropping
a SitePlayer into your circuitry.

INTERFACE BASICS

The audio mixer has four stereo

channels, each with an analog switch
controlled by a logic-level signal, com-
bined into a stereo output. Because I
didn’t include volume adjustments,
there are no analog control voltages.
You could use four toggle switches or
four push buttons to select the four
channels.

You’ve probably had the experience

of fumbling for your remote control’s
Mute button when your phone rang.
Wouldn’t it be nice if the mixer had a
single Mute button, too? Well, let’s
add another switch and, oh yes,
wouldn’t it be great if you had indica-
tors to show the active channels?

That’s a simple example of feature

creep in action. Taken to the limit,
you wind up designing circuitry and
writing code for a complex, micro-
processor-driven front panel that con-
trols four pairs of analog switches.
Although the SitePlayer is a complex
microprocessor system with some
intricate code, it’s also a single mod-
ule with a straightforward interface.

Photo 2 shows an early version of

my SitePlayer mixer control board. In
this application, the eight output bits
were more than enough; I didn’t need
its analog or PWM output features.
The eight amber LEDs show the state
of the output bits, and the blue LED
indicates a good Ethernet connection.

As you can see in Figure 1, the layout

is equally simple. I found that, as usual,
I had to create CAD library compo-
nents for both the filtered Ethernet jack
and SitePlayer. I replaced the discrete
LEDs in Photo 2 with a socketed 10-
element bar graph, so you can easily
remove it after getting things working.
I’ll discuss another key difference later.

The SitePlayer serves HTML-to-web

browsers through a built-in TCP/IP
protocol stack. It stores the HTML
text and graphic image files in flash
ROM rather than on a disk file sys-

HTML Front Panels

a

Aren’t you sick of
replacing broken
switches and dealing
with other hassles on
your front panels? If
you’re looking for a
high-tech substitute for
knobby panels, then
follow along as Ed
inserts a SitePlayer
into his circuitry and
creates a front panel in
cyberspace.

Ed Nisley

ABOVE THE
GROUND
PLANE

www.circuitcellar.com

CIRCUIT CELLAR

®

Issue 149 December 2002

63

GoLive and the resulting HTML and
graphic files compiled to a 23-KB binary
file. Even though GoLive or FrontPage
can get you started, hand-coded
HTML might be the only way to fit
the result into the SitePlayer. Now
let’s take a look at some topics that
don’t show up in the documentation.

POWERED RESET

The SitePlayer module consists of a

Philips P89C51RD2 microcontroller
mated to a RealTek RTL8019AS
Ethernet interface chip on a small
carrier board. The 89C51 uses six
20-MHz clock cycles per machine
cycle, giving it about three and a half
times the performance of the classic
12-cycle, 11.0592-MHz 8051.

The SitePlayer datasheet describes

the module’s pinout but doesn’t go
into great detail about requirements
for the reset input pin. If you look
closely at Photo 3, you’ll see that C8
on the SitePlayer module is the more
or less standard 8051 pull-up capacitor
that holds the reset line high long
enough to ensure a good reset when
the power goes on.

tem, which means that you must run
your web site’s source code through a
compiler that creates a binary file. A
loader program sends the binary file to
the SitePlayer through the network
link, so you can update the web pages
without going near the hardware.

As the SitePlayer serves HTML, it

scans the text for embedded control
strings that can modify the output. In
Listing 1, which shows the text that
creates the zero digit in Photo 1, you’ll
see an

<img src> tag with a file name

of Graphics/Digit_0_^io0~1.gif. When
the SitePlayer encounters the caret, it
interprets the next sequence of charac-
ters as a “SiteObject,” which is
NetMedia speak for “variable,” and
replaces it with the current value of
the corresponding internal register or
memory location.

In this case,

io0 is the name of the

bit associated with I/O pin 11 on the
module. The ~1 tells the SitePlayer to
XOR the bit’s value with a one and con-
vert the result to an ASCII numeric
digit. The text served to the web brows-
er will be either Graphics/Digit_0_0.gif
or Graphics/Digit_0_1.gif. Those two
files in the Graphics subdirectory con-
tain the digit zero with gray and green
highlights, respectively.

After a bit of back and forth with

the browser, the SitePlayer finds the
image data in its flash ROM and
serves the result as an ordinary .gif
file. Depending on the current state of
the

io0 bit, you will see either a gray

or green zero on the screen.

Listing 1 shows how to change the

value of a SiteObject from the brows-
er. The

<a href> tag specifies the

mixer.spi file, which the SitePlayer
interprets much like a normal server
regards a .cgi file. The text following

the

? character sets muted to zero and

flips the

io0 bit by XORing it with

one. The

<img src> tag then dis-

plays the new value of

io0 as before,

but in this case the graphic files show
a toggle switch with the handle either
up or down.

Because you control the connection

between logic states and graphic
images, you can light an indicator
when its corresponding bit is either
zero or one. Flipping a bit becomes a
simple matter of changing some text!

Similarly, you can add functions

without additional circuitry. The Mute
button in Photo 1 saves the current
state of the output bits in a variable
and then disables all of the audio out-
puts. The Play button simply restores
the saved state. Although a mechani-
cal switch could do this, feature creep
ensures that you’ll eventually wish
you were using code instead of solder.

You’ll find all of the gory details

required to make this stuff work in
the SitePlayer documentation, so I
won’t review them here. Suffice it to
say that you can accomplish most of
the bit twiddling required for a simple
front panel without too much effort.

Because all of the HTML and graphic

data must fit into the SitePlayer’s 48-
KB flash ROM, you may find that sim-
ple text gives better results than fancy
graphics. Remember, every character of
HTML and byte of image data counts
against that absolute 48-KB limit!

I built the front panel using Adobe

Photo 1—

The mixer’s front panel exists only in the

cyberspace of my local area network. The toggle switch
images show that bashing HTML is easier than drilling
aluminum; even the numerals look better than LEDs.

Photo 2—

The SitePlayer module requires little support

circuitry. This prototype lacks the MAX6803 reset con-
troller shown in the schematic.

Figure 1—

Only the SitePlayer outputs IO0 through IO3 drive the mixer-muting switches. The MAX6803 power

monitor ensures a clean start-up reset pulse and prevents trouble from V

CC

glitches.

You will find a bewildering variety

of microcontroller power monitors
and reset circuits in the catalogs. One
will be right for your next project, so
don’t design without it!

BRING THE NOISE (AGAIN)!

The audio mixer uses op-amps pow-

ered by regulated

±

12-V supplies in

order to handle the expected input and
output signal voltages. The SitePlayer
runs from a separate 5-V regulator,
which isolates a large portion of the
digital noise from the audio section.

Not all analog designs have that

luxury. In fact, most low-end audio
systems now run directly from what-
ever the system supply voltage might
be. You can get single-supply op-
amps, DACs, ADCs, and so forth for
nearly any standard supply voltage.

The SitePlayer produces a few tens

of millivolts of noise on its 5-V sup-
ply (see Photo 4). The 30-kHz modu-
lation probably comes from the main
program loop; it shows that not all dig-
ital hash lies in the megahertz range.

If you’re feeding the same supply

into your analog circuitry, make sure
you’ve decoupled the digital hash from
the low-level signals. A 30-kHz buzz
doesn’t matter in my mixer, but could
cripple a sensitive signal detector.

SITE SECURITY AND COST

My LAN connects to the Internet

through a Belkin F5D6230 wireless
router that performs network address
translation and firewalling. Thus, all
of my internal nodes have IP address-
es in the 192.168.1.0/8 range that
can’t be routed and are invisible from
the external Internet.

64

Issue 149 December 2002

CIRCUIT CELLAR

®

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The SitePlayer development demo

board includes a six-component circuit
that debounces a reset push button and
holds the reset pin high at power-up.
The SitePlayer module will work fine
with that pin floating, at least if the
power supply starts up quickly enough.

Unfortunately, it’s hard to say just

what “quickly enough” means. It
depends on the rise time of the supply
output, which should be fast, and the
shape of the start-up ramp, which
should be linear. Most supplies will
behave well enough to get by, at least in
the prototype stage shown in Photo 2.
I suspect many finished SitePlayer
designs sport a floating reset pin.

Unfortunately, C8 doesn’t know

that it’s supposed to hold the reset pin
high during power-up and not blip it
high during a power-supply glitch. If
the power supply also drives inductive
loads, your SitePlayer will misbehave
at the most inopportune moments.

The 89C51 requires 12 clock cycles

for a complete reset, which works out
to a mere 600 ns. Glitches on the
CPU’s RST pin that exceed 3.5 V for
less than 600 ns can cause a partial
reset, scrambling internal registers with
unpredictable results. Perhaps the inter-
nal watchdog will reset the CPU, but
even that’s not assured!

The MAX6803 microprocessor reset

circuit, which is no relation to the
Motorola 6803 MCU, avoids the prob-
lem of a partial reset by monitoring the
voltage and forcing the reset pin high
for V

CC

below 4.63 V (see Figure 1). The

push-pull output circuit drives the reset
pin with a low-impedance transistor to
eliminate glitches fed through C8 to the
pull-down resistor inside the 89C51.

As a result, the SitePlayer works fine

on my LAN, and you can’t see it from
where you are. That’s perfect for my
audio mixer, because I’d rather not have
you turning my sound on and off, but
many of the SitePlayer’s applications
call for global visibility and control.

The Belkin router can perform port

forwarding, passing data addressed to a
specific port at its global IP address to
an IP address and port on the internal
LAN. I set it up to pass external port
2003 (chosen because it doesn’t seem
to be used for anything else) to the
SitePlayer at 192.168.1.20:80. Then, I
sent a note to a friend asking him what
he saw at my external IP address.

Somewhat to my surprise, the

whole lash-up worked perfectly. He
saw Figure 1 on his browser and could
control the audio just like I could.
What I didn’t tell him was that he
could also create a web site, compile
it with the freely available SitePlayer
software, and download it into the
hardware on my electronics bench.

The problem is that the SitePlayer

documentation both describes a pass-
word and points out that it isn’t
implemented. The site compiler com-
plains if you don’t have a password,

Photo 3—

The SitePlayer’s RST input has an 8051-

style pull-up capacitor. Glitches on V

CC

can pass direct-

ly through C8 to the reset line, and then trigger partial
resets through its RST pin.

Photo 4—

The SitePlayer 8051-class CPU produces a

moderate amount of noise on its power supply. Take
care when you use single-supply op-amps!

Listing 1—

In the first section, the HTML defines the first graphic digit. In the second section, the

href

tag updates the

muted and io0 SiteObjects with new values, while the img src tag displays one of

two .gif files depending on the new value of

io0.

<td width="48" height="80" colspan="2" valign="top" align="left"

xpos="157"><img src="Graphics/Digit_0_^io0~1.gif" width="48"

height="40" border="0"></td>

*****************************************************************

<td width="32" height="124" valign="top" align="left"

xpos="173"><a href="mixer.spi?muted=0&io0=^io0~1"><img

src="Graphics/toggle_black_^io0~1.gif" width="16" height="36"

border="0" alt="Channel 0"></td>

www.circuitcellar.com

CIRCUIT CELLAR

®

Issue 149 December 2002

65

but doesn’t prevent downloading if
you have the wrong one!

If you plan to expose a SitePlayer on

the Internet, you should expect to
have it cracked fairly quickly. In fact,
I regard this as a compelling reason to
not use the SitePlayer for globally vis-
ible control applications. You don’t
want a miniature porn site running on
your home control system, do you?

A couple of past Circuit Cellar arti-

cles have covered how to connect the
SitePlayer to another MCU using its
serial port. This doesn’t solve the secu-
rity problem because the SitePlayer
controls the download process, but it
does allow for ’Net-based control of
more complex systems. Although this
works well for a one-off design or a
prototype, in volume production the
SitePlayer probably adds too much cost
for the function it provides.

At some level of complexity, using a

single processor such as the Tiny
InterNet Interface (TINI) from Dallas
Semiconductor, would make more
sense than a SitePlayer in addition to
another MCU. The TINI SIMM houses
an 80C390, another descendant of the
venerable 8051, with a Java interpreter,
considerably more storage, and an
external I/O and memory bus.

Look carefully at your project before

it becomes too complicated. If the
SitePlayer and a cheap PIC do the job,
go with it. But, if you find yourself
contorting the design to stuff it
through the SitePlayer’s serial port,
that’s a sure indication that you need
a more complex hardware solution.

CONTACT RELEASE

I like the SitePlayer and plan to use

it in future projects—projects that fit
nicely behind a firewall, that is. You
should, too.

I

PROJECT FILES

To download the code, go to
ftp.circuitcellar.com/pub/Circuit_
Cellar/2002/149/.

RESOURCES

J. Bachiochi, “Desktop Status from

NetMedia,” Circuit Cellar 137, 2001.

T. Petruzzelli, “A Web Link
Monitoring System,” Circuit Cellar
140, 2002.

Ed Nisley, PE, is an electrical engi-
neer and a ham radio geek (call sign
KE4ZNU). You may contact him at
[e-mail].

[phone]
www.maxim-ic.com

SitePlayer
NetMedia, Inc.
[phone]
www.netmedia.com

P89C51RD2 Microcontroller
Philips Semiconductor
[phone]
www.philips.com

RTL8019AS Ethernet controller
Realtek Semiconductor Corp.
[phone]
www.realtek.com.tw

SOURCES

F5D6230 Wireless cable/DSL gate-
way router
Belkin Components
[phone]
www.belkin.com

MAX6803 Reset circuit, TINI SIMM

Maxim Integrated Products, Inc.

CadSoft Computer, Inc., 801 S. Federal Highway, Delray Beach, FL 33483

Hotline [phone], Fax [phone], E-Mail : [e-mail]

EAGLE 4.0

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EAGLE 4.0 Light is Freeware!

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Windows is a registered trademark of Microsoft Corporation
Linux is a registered trademark of Linus Torvalds

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for

and

You can use EAGLE Light for testing and

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non-commercial applications without charge. The Freeware
Version is restricted to boards up to half Eurocard format,
with a maximum of two signal layers and one schematic
sheet. All other features correspond to those of the
Professional Version. Download it from our Internet Site
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66

Issue 149 December 2002

CIRCUIT CELLAR

®

www.circuitcellar.com

s retirement

nest eggs continue

to break, I worry that

the brood may soon

become extinct and leave me on the
endangered species list. This makes
me wonder if it isn’t better to stash
my money under a mattress.

Recently, financial analysts have

been shouting in support of diversifying
our investments. But isn’t that obvious?
We don’t eat and drink the same thing
morning, noon, and night. If we did, we
would be depriving our bodies of the
necessary nutrients they need to stay
healthy. Staying healthy raises ROI by
preventing unproductive downtime.

When an RF design is based solely on

maximum range, you can be pretty sure
that using a narrowband
transmission will provide
maximum energy at F

C

.

Although simple, this trans-
mission method does have
drawbacks. Interference from
sources at or near F

C

can

make the link unusable. And,
narrowband transmissions are
easily intercepted, which
makes the communication
link an insecure channel.

Up until the late-1980s,

the FCC’s point of view was:

narrowband good, broadband bad.
Today, the FCC allows three radio
bands to be used in low-power (i.e.,
less than 1 W) broadband (spread spec-
trum) radios: 902 to 928 MHz, 2.4 to
2.4835 GHz, and 5.7525 to 5.85 GHz.

SPREAD SPECTRUM

There are two basic forms of spread

spectrum (SS) transmission allowed by
the FCC, direct sequencing (DS) and
frequency hopping (FH). Both are based
on using a pseudo-noise (PN) code as an
additional modulation source, along
with the data, to spread the signal
energy over a bandwidth greater than
the necessary data bandwidth.

Random noise, or white Gaussian

noise (WGN), is a signal containing all
of the frequencies where the spectral
power of each is equal. This is the hiss-
ing sound heard between radio stations.
The key to randomness is that any
chunk of the signal will not match any
other chunk. This is a noncorrelating
(i.e., non-repeating) signal. True random
number sequences would never repeat.

There has been a great debate on

random number generation. You can
be satisfied with pseudo-random num-
ber generators because the sequence
can begin in a seemingly random posi-
tion through the use of seed values. A
PN code sequence would be a repeat-
ing pattern of some fixed length.

Specially designed PN patterns for

SS have unique properties. These pat-
terns should have balance. The total
number of ones and zeros should be
equal (except for odd length patterns
that may differ by one).

The run length of a value is the num-

ber of times it can appear consecutively.
The PN pattern should have one-half

Smart RF Designing

a

There are
sensible
tactics
that you
can use

to stave off interfer-
ence and increase the
efficacy of your RF
designs. This month,
Jeff shows you how to
decrease disruptive
interference by dis-
persing your data.

Jeff Bachiochi

FROM THE
BENCH

Don’t Put All of Your Eggs in One
Basket

Photo 1—

It isn’t difficult to track peak readings.

www.circuitcellar.com

CIRCUIT CELLAR

®

Issue 149 December 2002

67

ing in an acquisition phase. Next,
in a tracking phase, the receiver
must adjust the frequency-hopping
reference point of its PN pattern
looking for a high correlation factor.

MAXSTREAM FHSS

The battle for wireless communi-

cations is a hot one. There are
numerous manufacturers, and each
uses what they consider to be the
best technology for their niche.
MaxStream chose SS for its line of
stand-alone radio modems and
OEM wireless transceiver modules.
MaxStream offers modules in the

900-MHz and 2.4-GHz bands. The first
things you’ll want to know are the
range and cost of these guys.

Well, range depends on many

things, including transmitter power,
receiver sensitivity, the antenna, and
environment. Using a half-wave 1/2

λ

antenna (i.e., whip), the 900-MHz
modules have a range of 600

′

to 1500

′

indoors and 7 miles (i.e., line of sight)
outdoors. The 2.4-MHz modules have
a range of 150

′

to 375

′

indoors and

4.5 miles outdoors. This somewhat
shorter range is the result of higher
attenuation through a medium (in this
case air). The signal attenuation, or
path loss, is a function of the wave-
length and distance between the
transmitter and receiver.

of its runs for each value with a
run-length distribution of 1, one-
fourth of the runs with an run
length of 2, one-eight of the runs
with an run length of 3, and so on.

Autocorrelation is defined by

how well one PN pattern matches
the same PN pattern. When com-
pared bit to bit, starting at the
same reference point, every bit
matches for a high correlation fac-
tor (x = number of matches – num-
ber of mismatches). As one pattern
is shifted with reference to the
other, the number of matches goes
down (the lower the better). This
should remain low for all of the
remaining shifts. This property will
allow the receiver to determine if it is
synchronized with the transmitter.

Cross correlation is defined by how

well one PN pattern matches a differ-
ent PN pattern. In a perfect system,
the correlation factor would be low for
every possible rotation between the
two patterns. The more transmitters
(i.e., using different PN patterns) or
interference sources that exist, the
higher the possibility of the receiver
seeing a high correlation factor caus-
ing interference in synchronization.

Determining the best PN patterns is

an art unto itself. This is an exercise
best left up to those of you with an
itch to know more. If you’re interest-
ed, try searching the ’Net for M-
sequences, Kasami codes, Gold codes,
and Hadamard-Walsh codes.

DS VS. FH

The biggest difference between DS

and FH is in how the PN is used. In
DSSS, the PN pattern is multiplied by
the data. In a short code system, the
PN pattern is repeated for each data
bit, and the spreading factor (i.e., band-
width spread) is the length of the PN
pattern. In a long code system, the PN
pattern spans multiple data bits, and
the spread factor is still the number of
PN pattern bits for each data bit.

The combined data and PN signals

are then used to phase-shift key (PSK)
the carrier. The spread factor must be
adjusted so that the bandwidth remains
within the legal radio band limits.

At the DSSS receiver, it needs to

determine the PN pattern timing in

an acquisition phase. Next, in a track-
ing phase, it must adjust the reference
point of its PN pattern looking for a
high correlation factor.

In FHSS, the PN pattern performs a

direct shift of the carrier frequency.
This requires a frequency synthesizer
that’s able to shift rapidly. The hopping
rate is either slow (i.e., multiple data
bits per hop) or fast (i.e., multiple data
hops per data bit). HFSS divides the
radio band into channels, and each hop
changes the carrier frequency to one of
these channels. The PN pattern con-
trols the hopping sequence. The data
furnishes normal FSK modulation on
the carrier hopping between channels.

At the FHSS receiver, it needs to

determine the channel-hopping tim-

Table 1—

Here is the pinout for the MaxStream OEM module.

Pin number

Pin name

I/O Type

Description

Active

1

*CTS

O–PU

Clear to send flow control

Low

2

SLEEP

I–PU*

Can be used to enter Sleep mode

High

(PWRDN)

(See “Modes of Operation” section for details)

3

DO (Data out)

O–PU

Data leaving the module that’s sent to the host

High

4

DI (Data in)

I

Data entering the XStream module to be

High

transmitted over the air

5

*RTS/CMD

I–PD

Command mode enable (See “Binary Command High
Mode” section for details)

6

*RESET

I–PU

Reset module

Low

7

RXLED

0

Indicates good RF data reception

High

8

*TX/PWR

0

PWR—Indicated module powered on

High

*TX—Asserted during transmission

Low

9

CONFIG

I–PU*

How low during power-up or reset—forces

Low

ASCII Command mode. Do not tie to the
microprocessor! (See “Serial Port Operation”
section for details)

10

VCC

I

5 VDC

–

11

GND

–

Signal ground

–

PU—10 k

Ω

Pull-up resistor

PD—10 k

Ω

Pull-down resistor

*CONFIG and SLEEP signals have a 47-k

Ω

pull-up resistor

Module addresses

Networks

Vendor identification number (VID)

Module addresses

Networks

Vendor identification number (VID)

Figure 1—

The VID, Network ID, and Module Address can split the

MaxStream world into subnetworks.

Host communication uses an 8N1

protocol with a data rate of 2400 to
57,600 bps. This is the host-to-module
communication speed; it does not affect
the wireless data rate. The module can
buffer up to 132 bytes of data in each
direction. The module waits in Idle
mode until any of the other four operat-
ing modes are initiated. When it sees
host data, it moves into Transmit
mode. The module enters Receive
mode after it receives a valid RF signal.
If the host sends a command, it exe-
cutes the command. If enabled, Sleep
mode is accessed after a timeout while
the module is in Idle mode.

In Transmit mode, the module sends

out an initialization header that allows
other modules to synchronize with the
transmitter. As long as there are data
bytes in the input buffer, the module
creates packets consisting of a factory-
set vendor ID number, network ID
number (one of seven hopping
sequences), 16-bit module address, 16-
bit CRC, and up to 64 bytes of data.

As you can see in Figure 1, packets

carry a significant amount of network
addressing information. As long as
there are packets to send, they continue
to be transmitted without the necessity
of additional initialization headers.

In Receive mode, a packet may be

tossed out for a number of reasons
(e.g., a bad VID, poor module address,
CRC error, or wrong network ID).
Good packets pass their data into an
output buffer for transmission to the
host. An error or loss of a valid RF sig-
nal returns the module to Idle mode.

Command mode is entered when the

module receives three plus signs (i.e.,
“+++”) surrounded by 1 s of silence.
The commands sent during Command
mode are either AT or binary. All of
the commands are AT-type ASCII
commands unless they’re specifically
placed into binary mode via the RT
command. Note that binary mode is a
shorthand version that reduces the
number of characters that need to be
sent. You may download the command
list for the host-to-module interface
from the Circuit Cellar ftp site. ASCII
and binary commands are listed there.

Sleep mode, if enabled via Command

mode, is a minimal-power mode. Pin
Sleep mode allows you to put the mod-

68

Issue 149 December 2002

CIRCUIT CELLAR

®

www.circuitcellar.com

MaxStream offers a pair of modules,

RS-232 carrier/power supply boards,
and PC software (and cables) to allow
you to fully test the wireless modules.
The 900-MHz development kit costs
$400, with OEM modules approaching
$50 in higher quantities. The 2.4-MHz
version costs roughly 20% more.

HOST INTERFACE

The host interface is the serial link

between the radio module and com-
puter. The module has a TTL interface

(the development kit’s carrier board
converts these to RS-232) with serial
I/O and hardware handshaking signals
(see Table 1). Hardware handshaking
is necessary when the host is commu-
nicating with the module at a data
rate higher than the wireless RF trans-
mission rate. It’s a good idea to always
use this handshaking, because trans-
mission errors requiring the retrans-
mission of data can reduce the
throughput to below that of the host’s
communication speed.

www.circuitcellar.com

CIRCUIT CELLAR

®

Issue 149 December 2002

69

ule in Sleep mode via an external
SLEEP input pin. Wake-Up mode allows
the module to go into Sleep mode after
a timeout and return to Idle mode after
receiving a valid character from the host.

Cyclic sleep mode allows the mod-

ule to wake up periodically to check
for necessary actions. It’s important to
note that while in Cyclic mode, the
receiver is off and cannot look for a
synchronization header. Therefore, the
header length should be adjusted
appropriately via Command mode.

WIRELESS INTERFACE

The wireless interface is the RF path

between multiple radio modules. This
serial link is an FSK modulation of a
shifting carrier frequency. The carrier
frequency shifts or hops in one of
seven preprogrammed patterns.
MaxStream uses 25 discrete channels
within the 900-MHz and 2.4-GHz
bands. All 25 channels are used in
each of the seven available patterns
(Network ID via the HP command).

As with PN code, the channel-hop-

ping patterns are selected so that no

two patterns have a high cross-correla-
tion. This assures that multiple mod-
ules that transmit on a particular chan-
nel during a sequence will hop to a dif-
ferent channel following that collision.

The MaxStream modules can be

configured with an acknowledgement
protocol that assures that a packet has
arrived at its destination. If the
acknowledgement is not received, the
packet is retried x times, where x is
defined via the Command mode (see
RR and RN in the command list on
the Circuit Cellar ftp site).

I set up a spectrum analyzer from

DKD Instruments to get an idea of
what the channel hopping looked like.
The instrument was set up to track
peak readings. In Photo 1, the scans are
starting to display numerous channels
because I let multiple scans accumu-
late. The minimum channel dwell time
is about 38 ms for a packet. Note that
the FCC requires all available channels
to be used within 10 s for the transmis-
sion scheme to be considered SS.

FIELD TEST

The software that comes with the

development kit allows for easy con-
figuration of all of the internal regis-
ters. With a single serial port connect-
ed to one module, you can use the sec-

Photo 2—

The setup is completely self-powered. The

MaxStream module, which is powered by a 9-V battery,
is connected to the serial port.

70

Issue 149 December 2002

CIRCUIT CELLAR

®

www.circuitcellar.com

ond module with a loop-back connec-
tor—which is provided—to get a round-
trip path of any data you wish to send.

Photo 2 shows the program running

on my Toshiba laptop with one
MaxStream module and carrier board
connected to the serial port. A 9-V bat-
tery, making the setup self-powered,
drives this MaxStream module. The
second module has the loop-back con-
nector on it. It’s sitting on my test
bench next to, but not connected to, a
system running Linux. Both modules
are using quarter-wave wire antennas.

I took my laptop outdoors in the

yard and put it on a picnic table about
150

′

away from my house. I tapped the

start key and packets of data were sent
to the module in the lab and received
back in ping-pong fashion.

Next, I put the setup in my Caravan

and drove down the street. When my
odometer read 0.3 miles, I stopped and
repeated the experiment. Data was con-
tinuously returned correctly.

I drove farther down the road to a

point 0.7 miles away from my house.
At that location, however, I got noth-

ing. So, I rolled down the window and
stuck the module out of it and, sudden-
ly, I started to receive the data. The pro-
gram showed me some lost packets at
that point, so I concluded that 0.5 miles
is about the optimum error-free dis-
tance for my location. Even at 2640

′

that’s a pretty darn good distance.

END OF THE ROAD

Why should you use an SS wireless

system? The most significant advantage
is the ability to reject in-band interfer-
ence. In most cases, multiple SS units
can work around each other’s interfer-
ence. Of the two SS formats, FHSS
receivers seem to have greater sensitivi-
ty than their DSSS counterparts, which
means they can pick up weaker signals.
This allows them to operate at extend-
ed distances; however, the DSSS format
makes better use of bandwidth and has
the potential for higher data rates.

You never know what kind of inter-

ference you’ll run into. What’s not
here today may become a headache
tomorrow, so it only makes sense to
use a format that will allow your data

to get through regardless of the situa-
tion (idealistic). Even though the SS
formats can’t guarantee this, by spread-
ing your data around, it has a higher
probability of getting through.

I

Jeff Bachiochi (pronounced BAH-key-
AH-key) has been writing for

Circuit

Cellar since 1988. His background
includes product design and manu-
facturing. He may be reached at
[e-mail].

PROJECT FILES

To download the command list
for the host-to-module interface,
go to ftp.circuitcellar.com/pub/
Circuit_Cellar/2002/149/.

SOURCES

Spectrum analyzer
DKD Instruments
www.dkdinst.com

9XStream and 24XStream wire-
less OEM modules
MaxStream, Inc.
www.maxstream.net

72

Issue 149 December 2002

CIRCUIT CELLAR

®

www.circuitcellar.com

ost robots have

CCD or CMOS

video cameras. They

may be attached to trans-

mitters that provide real-time analog
downlinks, or they may be digitized
and transmitted over a wireless data
link. Clearly, the quality of cameras
has improved; their sensitivity is in
the low lux range as well as infrared.
However, there may be times when
it’s desirable to capture a highly illu-
minated image. Illuminating with an
incandescent lamp would help, but,
for the best response, a photoflash
tube is typically employed. Photo 1 is

an example of a flash tube and spot-
light that you can use in conjunction
with a CCD camera.

Your robot could also use the flash

as a deterrent to temporarily blind a
perpetrator. Another possibility is to
continuously cycle the flash tube,
which effectively creates a low duty-
cycle strobe. This could be useful as
an identification or warning beacon.

There are several strobe/flash kits

available from mail-order vendors.
One in particular is the Strobe Light
kit made by Electric Rainbow. It’s
available from the manufacturer and
Radio Shack as well as several mail
order sources listed in the parts list.
You’ll find the kit easy to modify for
low-power operation and interfacing
to a microcontroller. You may down-
load a copy of the parts list from the
Circuit Cellar

ftp site.

THE CIRCUIT

The Rainbow kit comes with four

transformers, two of which are used in
the 5-V version shown in Figure 1. You
can use all four transformers along with
a 12-V power supply for a faster charge
and flash rate (see Figure 2). Photo 2
shows the pin arrangement on the
transformer. Instead of the included 555
timer, an 8-pin PIC micro drives the
transformers to generate the high volt-
age necessary to power the flash tube.

The PIC monitors and regulates the

voltage. When it receives the appropri-
ate command, the PIC pulses an SCR,

A Low-Power Photoflash

m

There are many uses
for a photoflash on a
robot. For instance, a
photoflash can pro-
vide extra light for
your robot’s camera,
or it can serve as a
safety strobe and
warning beacon. Tom
will show you how to
build a low-power
photoflash strobe with
an 8-pin PIC micro.

Tom Baraniak

ROBOTICS
CORNER

Figure 1—

The Rainbow kit comes with four transformers, but only two transformers are used here.

www.circuitcellar.com

CIRCUIT CELLAR

®

Issue 149 December 2002

73

sequence of the SCR firing is that a
165-V negative pulse is applied to the
primary of the trigger coil. This gener-
ates a pulse of several thousand volts
on the secondary. The high-voltage
pulse ionizes the xenon gas in the flash
tube, causing it to conduct and provid-
ing a path through which the 160-µF
storage capacitor can discharge. The
xenon gas glows a bright white for
about 1 ms as the storage capacitor’s
voltage drops below the level necessary
to sustain conduction in the flash tube.

I urge you to use caution when

you’re working with high voltage. The
capacitor can store a lethal charge, so
safety measures must be practiced.

Note that the flash can occur as low

as 125 V. Lower voltages provide lower
light output intensity but longer flash
tube lifetime and faster recycle times.
At the completion of the flash cycle,
I/O line GP2 is checked again. If it’s
high, the charge cycle is repeated
immediately, causing a strobe effect. If
GP2 is low, its interrupt bit is cleared,
and the charging circuit is shut down
as it waits for the interrupt to be set
again. This conserves power.

In lieu of another external con-

troller, you could use a button to initi-
ate and then fire the flash. Or, you
could implement a switch to turn it
on and keep it on in Strobe mode.

SOFTWARE

GP2 is set as an input at power-up.

Its corresponding interrupt, intcon
bit 1, is monitored. When it’s set, the
charging process begins. The capacitor

which, in turn, pulses a trigger coil
generating the several thousand volts
necessary to initiate the flash process.
Finally, communicating over a single-
wire interface, another controller can
activate the flash circuit, monitor the
charge status, and, when ready, pro-
vide the flash trigger.

The operation of the flash is con-

trolled by GP2, a bidirectional gener-
al-purpose I/O line with interrupt
capability. A switch, button, or anoth-
er controller’s I/O line can control
this. For this example, it’s connected
to another controller, as shown in
Figure 3.

Both the PIC and the main con-

troller’s I/O ports are configured as
high-impedance inputs at power-up,
and they’re pulled low through a resis-
tor to ground. To initiate the flash
charge sequence, the main controller
will command its I/O port to logic
high, and then configure it as an out-
put with the tri-state control. The
sequence—set high, then configure as
an output—ensures that the port will
be set high, and not accidentally set
low, when it changes from an input to
an output. This, in turn, allows the
single-wire interface line to go high,
setting GP2’s interrupt. Then, the
main controller’s I/O port is changed
back to a high-impedance input and
the I/O line is pulled low by the resis-
tor. Note that the I/O ports cannot be
actively driven low in the event that
the other is actively driving the line

high. They must make use of resistor
R1 to cause a logic low.

The PIC’s software monitors GP2’s

interrupt and, when set, begins the
charging process. It sends a low duty-
cycle pulse stream out on port GP5 to
drive the FET, which, in turn, drives
the transformer primaries. The sec-
ondaries are wired in parallel for high-
er output current, rectified, and input
to the 160-µF high-voltage storage
capacitor. The resulting high voltage
is monitored by analog input port
AN0 via a 101:1 resistor divider. The
pulse stream continues until the capac-
itor voltage reaches about 165 VDC.
Current draw is around 50 mA during
the charging process.

During the charging process, GP2 is

preset high and configured as an out-

put. After the capacitor is charged,
GP2 reverts back to an input bit, and
the line is pulled low by resistor R1.
The main controller recognizes this
low state to indicate that the capaci-
tor is charged and the flash is ready to
fire. To trigger the flash, the main
controller outputs a logic-high pulse
on the I/O line as input to GP2.

The high level on GP2 is interpreted

as the signal to initiate the flash trig-
ger. This is accomplished by toggling
output GP4 high and low so the SCR
conducts, connecting one side of the
0.012-µF capacitor to ground. Because
the capacitor was charged to 165 V
through the 3.9-M

Ω

resistor, the con-

Photo 1—

The photoflash tube is mounted at the top of

one of my robot’s eyes. A CCD camera is mounted par-
allel to that in the center of the eye, and a halogen
lamp is mounted at the bottom. Directly below the
photoflash tube is an infrared bumper sensor.

Figure 2—

As opposed to the 5-V version depicted in

Figure 1, all four transformers are used in this version
to generate a faster charge and flash rate.

Photo 2—

The pins of the high-voltage transformer are

labeled to correspond to the schematics.

www.circuitcellar.com

CIRCUIT CELLAR

®

Issue 149 December 2002

75

voltage is measured, and, if it’s less
than 165 V, the charge routine is
called to output pulses until the
capacitor is charged.

After the capacitor is charged, GP2

is configured as an input and pulled low
by resistor R1. This signals the external
controller that the flash is ready to fire.
When the external controller drives
GP2 high, the flash is triggered. If GP2
stays high, the flash circuit immedi-
ately recharges the capacitor and trig-
gers the flash again. If GP2 doesn’t
stay high, one flash is triggered before
some delay is added for the external
controller to react to the state of the
flash circuit before returning to the
beginning of the program.

After it’s charged, if the external

controller does not drive GP2 high to
trigger the flash, the program refreshes
the charge on the capacitor as part of a
loop waiting for the flash to be trig-
gered. If no trigger signal is sent before
the watchdog timer times out, the
program will reset and the sequence
will start over.

Note the literal values that deter-

mine the voltage to which the capaci-
tor charges. For the example shown in
the charge routine, 0x53 represents
about 165 V. It’s determined by the
following equations:

Next, implement the 1.63 V:

Thus,

0.33 × 256 bits full scale = 84 decimal

= 54 hex

To produce a negative subtraction

result, 54 hex must be subtracted
from one less than itself, resulting in
the literal 0x53. Likewise, in the
CHRG part of the CKONOF routine, a
voltage slightly less than 165 V is
chosen to provide some hysteresis.
Thus, if a different flash voltage is
desired, both literals must be
changed accordingly.

I

Figure 3—

In this example, the

GP2 is connected to another con-
troller’s I/O line. A button or switch
could also be used for control.

Tom Baraniak attended the
University of Wisconsin, Madison.
Presently, he is the Electronics and
Lab manager for Carleton College in
Northfield, Minnesota. As a kid he
built his first robot out of orange
crates and coffee cans. Today, Tom’s
materials are a bit more sophisticat-
ed. You may reach him at
[e-mail].

SOURCES

Strobe Light Kit (ST-1)
Electronic Rainbow, Inc.
[phone]
www.rainbowkits.com

Variable Strobe Kit (1142 KT)
Marlin P. Jones and Associates,
Inc.
[phone]
www.mpja.com

PIC12C672 Microcontroller
Microchip Technology, Inc.
[phone]
www.microchip.com

PROJECT FILES

To download the code and parts
list, go to ftp.circuitcellar.com/
pub/Circuit_Cellar/2002/149/.

76

Issue 149 December 2002

CIRCUIT CELLAR

®

www.circuitcellar.com

s always, the

recent Hot Chips

conference provided a

welcome respite from the

hustle and bustle of my workaday,
high-tech beat. After 14 years, the
conference still ranks as one of my
favorites, a fun and freewheeling few
days to contemplate the future instead
of yesterday’s deadlines and my ever-
overflowing in-basket.

The recipe, thankfully, has changed

little over the years. Start with quality
ingredients: interesting topics and elite
speakers, a wonderful venue (Stanford’s
Memorial Auditorium), and catered
meals (we’re talking prime rib, not rub-
ber chicken) in Dohrman Grove. Throw
in a dash of pleasant California summer
weather and side trips to the Computer
Museum or Fry’s Electronics, and Hot
Chips can’t be beat.

Yeah, attendance might have been

down just a tad from peak years,
which is no surprise as the dust of the
dot.com and NASDAQ crackup set-
tles. But, the hallowed halls of the
academic setting seemingly helped
insulate attendees from the humdrum
of current events. Instead, the focus at
Hot Chips was on the bleeding edge,
where hope always springs eternal.

Hot Chips, Cold Sweat

a

Tom Cantrell

Things
sure have
changed
since the
mid-

1990s—a time when
stock prices were up
and consumer confi-
dence was high—but
if you listen closely,
you can still hear the
high-tech revolution
marching on.

SILICON
UPDATE

Not that said hope is always real-

ized. A look back at my half-dozen
Hot Chips stories over the years
reveals the legacy of chips and ideas—
tomorrow’s technology of tomorrow, if
you will—that never made it.

For instance, way back when, there

was talk of GaAs replacing CMOS to
break the triple-digit clock barrier.
Never happened. Or, the idea of a cheap
consumer PC with dozens of CPUs in a
multiprocessing configuration. Today,
you can find multiple CPUs in a fancy
server, but that’s about it.

I’ve covered the conference about

every other year since the beginning,
and going through the archive you’ll
find early references to many more
technologies that have successfully
made their mark. Much relates to all
of the fancy architecture tricks under-
lying today’s super-duper CPUs: spec-
ulation, out-of-order issue and/or com-
pletion, 64 bits, MMX and similar
multimedia/SIMD extensions, VLIW,
and so on. Beyond the architectural
arcana, there are hot buttons like
MPEG A/V compression, double data
rate (DDR) SDRAMs, CMOS imaging
chips, and the list goes on.

Sure, most of this doesn’t have a lot

to do with the traditional embedded
stuff I focus on, but one lesson I’ve
learned is that when it comes to sili-
con, today’s bleeding edge is tomor-
row’s mainstream.

However “hot” the chips you use

are, there’s something for everyone to
learn at the Hot Chips conference.
That was never more apparent than at
this year’s opening tutorial, “IC
Technology Scaling Trends and
Potential Solutions through the End of
the Semiconductor Roadmap.” [1]

+15% Revenue

growth

(per year)

+15% Units

shipped

(per year)

2× Transistor/area

(per year)

+40% Transistor/area

(per year)

–25% Cost/transistor

(per year)

R&D expense

Capital expense

Figure 1—

Moore’s Law has fueled the semiconductor

cycle of success for decades. The question is how long
it will remain in force, and what then?

www.circuitcellar.com

CIRCUIT CELLAR

®

Issue 149 December 2002

77

down his law than worry-
warts began speculating
about the “wall.” What if
Moore’s Law runs out of
gas and the silicon situa-
tion becomes, like every-
thing else, “less for more”?

To the semiconductor

industry’s credit, they’ve
been studying the situation
for nearly a decade, origi-
nally under the auspices of
the U.S. Semiconductor
Industry Association (SIA),
and, more recently, on a

worldwide basis with the
International Technology
Roadmap for Semi-con-
ductors (ITRS).

ITRS represents a significant organi-

zation and effort based on the work of
hundreds of commercial and academic
experts from the U.S., Europe, Japan,
Taiwan, and Korea. This is not some
pie-in-the-sky think tank, but rather
the concerted response of an entire
industry to fundamental challenges.

I realize that it’s human nature to

ignore things until there’s a crisis.
After sitting through the presentation,
it’s certainly tempting to shout out,
“This is a crisis.”

I don’t have the time or expertise to

elaborate in detail. Suffice to say, my
impression is that Moore’s Law faces
trouble on virtually every front, includ-
ing MOS transistor fundamentals,

THE WALL

The single most compelling

and profound aspect of the
microelectronics revolution
can be simply summed up as:
“Moore for less.” No, that’s
not a misprint. I’m referring,
of course, to Moore’s Law.
Named after Intel founder
(and arguably the Godfather of
Silicon Valley) Gordon Moore,
this law is more like a gift.

Over the decades, Moore’s

Law has been interpreted in
slightly different ways.
Indeed, the man himself has
observed that “the definition
of Moore’s Law has come to
refer to almost anything relat-
ed to the semiconductor industry that,
when plotted on semi-log paper,
approximates a straight line.” Whether
the number of transistors or clock rate
doubles every two or three years, the
bottom line is “Moore for less.”

I think that folks forget all too easily

how profound the statement “Moore
for less” is. Yes, bloatware and high-
level tools can sap the gains. And some
folks may have problems with the way
technology is used—Spam, TV, video
games, Napster, CTL-ALT-DEL, and
so on—which leads them to ignore or
blame the messenger. Or, maybe it’s
just the fact that so much of the effect
of the revolution, in the form of embed-
ded applications, is hidden from view.

For example, the average driver may

neither know nor care that his car has
dozens (will be hundreds) of micros.
Everyone simply takes for granted the
associated economic, environmental,
reliability, and safety improvements.
But in what other field of human
endeavor do we get “Moore for less”?

For decades since the invention of

the IC, the march of silicon has been
the fuel for a powerful (though misfir-
ing from time to time) economic engine
(see Figure 1). [2] When it comes to sili-
con, we have enjoyed a free lunch.

COLD SWEAT

So what happens if or when the

party ends? No sooner did Moore lay

Table 1—

You can literally see the wall in the ITRS analysis, trouble spots in which the industry has little confidence in proposed solutions, or there simply may be no solution.

Description

Units

Near

term

Long

term

Calendar year

2001 2002 2003 2004 2005 2006 2007 2010 2013 2016

DRAM half pitch

nm 130 115

100 90 80 70 65 45 32 22

Physical gate length (L

G

)

nm 65 53 45 37 32 28 25 18 13 9

Equivalent oxide thickness (T

OX

)

nm

1.3–1.6 1.2–1.5 1.1–1.6 0.9–1.4 0.8–1.3 0.7–1.2 0.6–1.1 0.5–0.8 0.4–0.6 0.4–0.5

Nominal power supply voltage (V

DD

)

V

1.2 1.1 1.0 1.0 0.9 0.9 0.7 0.6 0.5 0.4

Nominal high-performance NMOS

µA/µm 0.01 0.03

0.07 0.1 0.3 0.7 1 3

7

10

sub-threshold current (at 25˚ C)

Nominal NMOSFET saturation drive

µA/µm 900 900 900 900 900 900 900 1200

1500 1500

current (I

ON

)

Required percent current-drive

%

0% 0% 0% 0% 0% 0% 0%

30%

70%

100%

“mobility/transconductance improvement”

Parasitic series S/D resistance (R

SD, SERIES

)

Ω

–µm 190 180 180 180 180 170 140 110 90

80

Parasitic capacitance percent of ideal gate

%

19% 22% 24% 27% 29% 32% 27% 31% 36% 42%

capacitance

NMOSFET intrinsic transistor delay (t

I

)

ps

1.65 1.35 1.13 0.99 0.83 0.76 0.68 0.39 0.22 0.15

NMOSFET intrinsic transistor switching

GHz

606 742 888 1007 1205 1320 1463 2570 4445 6514

frequency (f

I

= 1/t

I

)

Relative device performance

1.0 1.2 1.5 1.6 2.0 2.1 2.5 4.3 7.2 10.7

Energy per (W/L

GATE

= 3) device

fJ/device 0.347 0.212 0.137 0.099 0.065 0.052 0.032 0.015 0.007 0.002

switching transition (C

GATE

× (3 × L

GATE

) × V

2

)

Static power dissipation per (W/L

GATE

= 3)

W/device 5.65E–09 6.7E–09 1.0E–08 1.1E–08 2.6E–08 5.3E–08 5.3E–08 9.7E–08 1.4E–07 1.1E–07

device

Figure 2—

Scaling V

DD

down rapidly is a must. Ironically, because of absolute power

limits (approximately 300 W), high-performance logic will require a lower operating
voltage than low-power logic.

0.0

0.2

0.4

0.6

0.8

1.0

1.2

2001

2003

2005

2007

2009

2011

2013

2015

V

DD

Low power

High performance

Low power

High performance

Year

V

DD

, V

T

(V)

V

DD

V

T

V

T

ITRS projections of V

DD

and V

T

scaling

78

Issue 149 December 2002

CIRCUIT CELLAR

®

www.circuitcellar.com

people might argue that computer
architecture has devolved into choos-
ing which old ideas to cram onto ever-
growing chips as much as coming up
with any new ones. I don’t mean to
belittle the correctness or technical
difficulty of that course, but some of
the thrill is gone.

Furthermore, the ever-growing dom-

inance of Intel as the owner of the
computing market has put an end to
the era when a unique architectural
advantage might be meaningful com-
mercially. Indeed, these days it seems
the most technically interesting chal-
lenge is how to finesse a veneer of x86
compatibility over the well-known
techniques (e.g., SIMD/vector process-
ing, speculation, conditional execu-
tion, VLIW, and so on).

Finally, the PC-centric mentality

driving the computing market and big-
iron CPU architectures has caused
increasing divergence from the prag-
matic realities of the embedded arena.
The easiest to embed 32-bit chips (e.g.,
ARM, SH, and lower-end PPC/MIPS)
represent computer architecture many
decades past. And, of course, 8- and
16-bit MCUs are creakier than that.

Nevertheless, though the architec-

ture wars (à la RISC versus CISC) of
yore have distilled down to an x86
war between Intel and AMD, it’s still
interesting to watch as the architects
struggle to climb their own walls (see
Photo 1). And although you may not
design PCs, you no doubt use them.
For certain tasks (e.g., ASIC/FPGA
design and simulation), performance
at any price is a valid goal.

I’ll leave the exhaustive reporting

on the x86 wars to the legion of
analysts, researchers, and aca-
demics who thrive on the PC
meal ticket, but I would like to
make a few observations. Keep in
mind that the new 64-bit chips
(i.e., Intel’s Itanium 2 and AMD’s
Opteron) certainly are not
intended for the plain-vanilla PC
market, which doesn’t need a
64-bit address space, not to men-
tion the triple-digit power con-
sumption and four-digit pricing.

As performance gains and differ-

ences narrow, expect more arguing
about just what defines perform-

materials lithography, interconnect,
design, and test, just to name a few.

It’s nearly a perfect storm of physical

and financial limits backing every sci-
entist and industrialist into a corner.
Taking a look at Table 1, you can see
the wall looming. [1] And it isn’t some
long-term (when, as some economists
point out, we’re all dead so who cares)
concern. Remember, the cycle from lab
to fab (i.e., from fundamental science to
tool development to production) is long.
Believe me, at this very moment there
are lots of folks in the silicon food
chain who are up against the wall and
scratching their heads.

Furthermore, although I wouldn’t go

so far as to say they’re cooking the
books, even some ITRS experts might
admit to a tendency to take the easy
way out. For instance, when it comes
to operating voltage (a.k.a. V

DD

), the

road map takes the low road indeed.
Virtually every aspect of continued
progress—from dealing with leaky
atoms-thick oxide layers to the
harsh reality of packaging and
cooling a 300-W chip—requires
slashing the operating voltage
precipitously (see Figure 2). [1]

Indeed, ITRS basically admits

such by conceding a relaxation of
Moore’s Law for low-power logic,
trading off some of the reduction
in V

DD

needed to meet dynamic

power limits in order to reduce
leakage current and, thereby, static
power consumption.

Even those of you who just use,

rather than design or manufacture,
chips can gain insight from the

ITRS work. For instance, the spotlight
on V

DD

should remind every embedded

designer that power relates to the
square of voltage. Today, most designs
with any low-power consciousness at
all exploit fast/slow/sleep duty cycle
schemes that yield only a linear reduc-
tion. Tomorrow, look for chip- and
board-level designs that exploit dynam-
ic voltage scaling, or DVS (i.e., continu-
ally adjust V

DD

), to optimize the instan-

taneous power/performance trade-off.

Similarly, presuming the lunch isn’t

free anymore, maybe folks will be less
inclined to feed half of it to the birds
with bloated tools and shoddy time-to-
market (instead of time-to-quality) engi-
neering practices. Not that we’ll revert
to assembly language and schematics,
but there will come a time when
improving a product won’t just be a
matter of waiting for next year’s chip to
do it for you. The presenters noted that
systems designers will have to shoulder
some of the burden by adopting tools
and techniques that help chip designers
overcome their grand challenges.

Ultimately, I guess I don’t view the

wall as much as a crisis but rather as a
continual challenge. The fact is, the
IC biz has been climbing walls ever
since the beginning. Gordon Moore
once said he quit predicting the wall,
because he’d done it so many times
and been wrong—a point also noted in
the presentation (see Figure 3). [2]

THE 64-BIT QUESTION

Traditionally, computer architects

have matched Moore, contributing
significant gains via design to keep up
with those in the silicon. But, some

Predictions on end of optical lithography

Predicted end

1980

1990

2000

2010

1980

1990

2000

2010

Year predicted

8 years

Figure 3—

If it’s any comfort, reports of the demise of

silicon have been greatly exaggerated (repeatedly).
Source: John Sturtevant. [2]

0

200

400

600

800

1000

1200

1400

SpecInt2000 base

SpecFp2000 base

Itanium 2 1.0 GHz
Power 4 1.3 GHz
Sun Sparc3 1.05 GHz
Itanium 800 MHz

Figure 4—

The good news is Itanium 2 is a huge improvement over

the first version. The bad news is it mainly excels at floating point and
doesn’t do much for integer applications.

More flexibility. Fewer parts. Lower cost.

The versatile PSoC

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8-bit DAC

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Notch Filter

16-bit CRC

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Programmable

Gain Amplifier

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80

Issue 149 December 2002

CIRCUIT CELLAR

®

www.circuitcellar.com

ance. Benchmark controversy is back in
the headlines with claims and charges
flying. It all got started about a year
ago, as reported in EETimes, when
AMD, with the launch of the Athlon
XP chip, adopted a new virtual clock
rating designed to counter the gigahertz
gap with Intel. [3] For instance, the XP
1800+ actually runs at 1.5 GHz.

The article further relates that, in

order to assure skeptics, AMD
“retained Arthur Andersen LLP to pro-
vide independent audits of the Athlon
XP ratings.” Laughter is the best medi-
cine. Don’t you just love this business?

It’s said that benchmarks lie, but I

think it’s more like they just don’t tell
the entire truth. Be that as it may,
Figure 4 is interesting. [4]

Itanium 2 is certainly impressive,

what with 200-plus million transistors
and 70 meters of interconnect
crammed under the hood. And it sure
looks good compared to the first ver-
sion, though I think that reflects prob-
lems with that older part more than
breakthroughs on the new one.

That leaves Intel to finesse the fact

that you can buy an entire PC with, for
example, a 2.4-GHz Pentium 4 that
gets equivalent integer performance for
less than the cost of an Itanium 2 chip.

It’s kind of sad to see architects

reduced to brute force. Fully 80% of
those 200-plus million Itanium 2 tran-
sistors are consumed by the L3 cache.

If we haven’t hit the instruction-

level parallelism wall yet, I think
we’re pretty darn close to it. An opti-
mist might see Figure 5 and note that
compilers can find maybe three
instructions to execute in parallel on
average, leaving headroom for chip
architecture improvements. [5] A pes-

simist might note that it seems waste-
ful to actually deliver only one and a
half instructions per clock on a chip
ready and willing to dispatch six at a
time into 11 functional units. Worse,
neither number (theoretical and actual
IPC) seems to be improving at anything
like a Moore’s Law rate, if indeed at all.

Yes, architecture will continue to

advance, but increasingly system
designers and programmers will have
to step into the breech by adopting
multiprocessor and multithreading
techniques, no longer relying on the
chip itself to automatically (i.e., trans-
parent to software) handle the details.

PUT THAT IN YOUR PIPE

Not every presentation at Hot Chips

is about grand challenges and big iron.
There’s always something offbeat to
spark the imagination. “Delivering On
the Promise of Asynchronous Circuit
Design” may have done just that, and
those of you who have followed the
topic over the years know the async
jury has been out longer than OJ’s.

There’s no doubt that synchronous

design and its associated clock distri-
bution headaches are bad, and they’re
getting worse as clocks get faster and
chips get bigger. Of course, having
managed to send the clock hither and
yon, the latest trend is then to add
additional clock gating logic so you
can save power by turning most of
them off most of the time!

By contrast, asynchronous design

offers the promise of no wasted tran-
sitions (i.e., perfect clock gating).
Furthermore, because circuits aren’t
subject to the rigid marching orders of a
master clock, an asynchronous design

is robust in manufacturing, tolerating
process, and voltage variations. Finally,
the switching action in an async
design—reduced overall and further
spread in time and space—reduces EMI
compared to a global clock.

However, the async approach poses

some fundamental design, simulation,
and test challenges, not to mention
my own vaguely apprehensive feeling
about chips that run at their own pace.
Meanwhile, chip designers continue to
muddle through with synchronous
designs, which remain the norm.

The insight I gained from the presen-

tation is that sync and async design
needn’t, and shouldn’t, be an all-or-
nothing proposition. Rather, the opti-
mum combo is a mix of synchronous
and asynchronous function blocks com-
municating via a crossbar switch that
synchronizes between the various clock
domains as required (see Figure 6). [6]

Switching sides, what could be

more synchronous than a pipeline? A
Carnegie Mellon University team
came up with PipeRench to combine
the performance of an ASIC with the
adaptability of a CPU (see Figure 7). [7]

The only caveat is that when your

tool is a PipeRench, everything has to
look like a pipeline. Fortunately, it’s
possible to convert lots of interesting
applications—DSP, image processing,
cryptography, and so on—to a pipeline
format (think loop unrolling).

The PipeRench premise utilizes

pipeline stages—or “stripes” in
PipeRench speak—comprised of locally
connected simple and fast 8-bit process-
ing elements. Data and results pass
through registers from one stripe to the
next, with a register kill scheme termi-

Photo 1—

Say hello to Itanium 2. With 220 million

transistors, 64 bits, and 130 W, it’s certainly a hot chip.

0.00

0.50

1.00

1.50

2.00

2.50

3.00

3.50

4.00

Intel

HP

Intel

HP

Intel

HP

Intel

HP

Intel

HP

Intel

HP

Intel

HP

Intel

HP

Intel

HP

Intel

HP

Intel

HP

Intel

HP

Intel

HP

gzip

vpr

gcc

mcf

crafty parser eon

perl

gap

vortex bzip2

twolf

Avg

Useful IPC

Achieved

Found

Figure 5—

Despite the best efforts of Intel and HP, compilers can find only three instructions per clock and chips

deliver only one and a half.

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Room for 3

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EMI/RFI Filtration:

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This heavy duty case lock is a real lock, not

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•

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brass construction

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Simply replaces one case screw

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Master key available separately

The Gladiator - The Ultimate in Round Cable Technology

Data signal wires and ground signal wires

are arranged in an alternating pattern so that data
wires are surrounded on all sides by ground wires.
In addition, each layer of wires is separated by an
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Protect Your PC From Rising Heat

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When you shut down your computer (and

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specifi ed time after you shut down so your PC
cools down quickly and evenly, minimizing heat
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Requires WOL (Wake

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Only 2 1/16” x 1 7/8” x 1/2” the Cooling After

™

can be mounted with screws or Velcro

™

CD Carousel Finds Any Disk in 31⁄2 Seconds!

Game disks, CDs, VCDs, DVDs, CD-Rs,

CD-RWs... up to 150 disks can be managed in
this ingenious carousel. Attach it to your PC
(via USB port) and you can build a searchable
database of your disks then fi nd them by title or
keyword. Double-click the title you want from
the search results and it is delivered to you in
seconds. Up to 127 carousels can be accessed
from a single database.

1

- Bring order to the chaos

of your disk collection with

the CD Carousel Library

3

- The carousel tray rotates and brings

requested disks to the front in seconds,

partially ejecting them for easy

removal and replacement.

2

- Select disks manually with

the convenient pushbutton dial...

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To order call 800-892-1010 or online

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Power Strip Liberator

Before

Can't use all outlets

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Get full use of your power strips and UPS

outlets with our high-quality adapter cable. Plug
your big bulky power adapters into our cables then
plug the cables into those previously unusable
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tect up to 8 devices
from damaging
power surges.

To order call 800-892-1010 or online

at www.cyberguys.com/cc1202

148 0515

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•

Controls and operates 2 fans (more can be
controlled by "cascading" devices together)

•

Select fan run times of 1, 3, 5 or 10 minutes

•

Case power LED functions as status indicator

•

Maximum output rating: 12W/fan

•

Cables for two fans (both molex and 3-pin)

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CircuitCellar_0212.indd

10/15/2002, 9:08 AM

2

www.circuitcellar.com

CIRCUIT CELLAR

®

Issue 149 December 2002

83

REFERENCES

[1] P. M. Zeitzoff, “Overview: IC

Technology Scaling Trends,

SOURCES

Opteron, Athlon XP
Advanced Micro Devices, Inc.
www.amd.com

PipeRench
Carnegie Mellon University
www.ece.cmu.edu/research/
piperench/index.html

Asynchronous SoC interconnect
Fulcrum Microsystems, Inc.
www.fulcrummicro.com

Itanium 2
Intel Corp.
www.intel.com

Tom Cantrell has been working on
chip, board, and systems design and
marketing for several years. You may
reach him by e-mail at tom.cantrell@
circuitcellar.com.

RESOURCES

Hot Chips Conference
www.hotchips.org

International Technology Roadmap
for Semiconductors (ITRS)
public.itrs.net

are intriguing. For example, an
encryption algorithm runs six times
faster on the 120-MHz PipeRench
than on an 800-MHz Pentium III
Xeon, but consumes far less (roughly
one-tenth) the silicon and power.

HOT MEAL

Once again, Hot Chips left me

excited by future prospects, not to
mention tipping the scale a few
pounds heavier (hearty thumbs up on
the prime rib). Sure, making chips is
hard and there are real challenges to
overcome, but what else is new?

When it comes to silicon, I admit to

being an optimist, or at least someone
who sees the glass half full rather than
half empty. Despite the crisis at hand,
ITRS reports that by 2016 we’ll have
chips with 8.8 billion transistors run-
ning at close to 30 GHz.

Let’s let the chip wizards do their

thing and chip away at the wall. In
the meantime, with a billion-plus
transistor chips coming down the
pike, I say the proper course of action
remains unchanged from the day long
ago when Moore began doodling on
that log graph paper: party on!

I

Challenges, and Potential
Solutions through the End of the
Semiconductor Roadmap,” pre-
sented at Hot Chips 14, August
2002.

[2] A. K. Wong, A. Yen, and W.

Trybula, “Microlithography:
Trends, Challenges, and
Potential Solutions,” presented
at Hot Chips 14, August 2002.

[3] W. Wade, “AMD Introduces

New Processor, Pushes New
Speed Standard,” EE Times,
October 10, 2001.

[4] D. Soltis, M. Gibson, and C.

McNairy, “Itanium 2 Processor
Microarchitecture Overview,”
presented at Hot Chips 14,
August 2002.

[5] J. McCormick and A. Knies, “A

Brief Analysis of the SPEC
CPU2000 Benchmarks on the
Intel Itanium 2 Processor,” pre-
sented at Hot Chips 14, August
2002.

[6] A. Lines, “An Asynchronous

SoC Interconnect,” presented at
Hot Chips 14, August 2002.

[7] B. A. Levine and H. H. Schmit,

“PipeRench: Power and
Performance Evaluation of a
Programmable Pipelined Data
Path,” presented at Hot Chips
14, August 2002.

nating passage beyond the last use in
order to reduce power consumption.

Of course, the practical dilemma is

how to accommodate the fact that
every different application will call for
its own unique pipeline depth. Here,
PipeRench cleverly exploits fast recon-
figuration to use a small physical
pipeline as a window scanning down
an arbitrarily deep virtual pipeline.

Best of all, pipeline virtualization is

completely transparent to the designer
and algorithm. If you want to speed up
your application, just use a bigger (i.e.,
more stripes) PipeRench. If you prefer
to sacrifice performance in order to
reduce cost, plug in a smaller one.

The team has crafted a prototype

PipeRench chip comprised of 16 stripes,
each with 16 processing elements.
Accepting the limited (i.e., pipeline
only) application domain, the results

Crossbar

Crossbar: Includes
control and arbitration

Repeat buffer: Maintains high
throughput; inserted as needed

Sync converter: Converts
to/from a synchronous
domain; includes jitter
buffer and scan chain

Channel: Asynchronous
channel with built-in flow control

Asynchronous block

Synchronous block

SoC

Crossbar

Figure 6—

Async design may be more palatable when taken in small portions along with a helping of conventional

synchronous design.

Stripe 1

Stripe 15

Stripe 8

Stripe 7

Stripe 0

PE

PE

PE

PE

Pass register file

Connections

PE

PE

PE

PE

PE

PE

PE

PE

PE

PE

PE

PE

PE

PE

PE

PE

Configuration store

R0 State store

Input queue

Output queue

.

.

.

.

.

.

Figure 7—

Put pipelined data path applications in a

PipeRench and smoke them at a much higher speed
and lower power than with a conventional CPU.

84

Issue 149 December 2002

CIRCUIT CELLAR

®

www.circuitcellar.com

■

Insert-ready sub-mini SBCs (small as 47x55 mm.) supporting the
Philips

8xC591

8xC591

8xC591

8xC591

8xC591, 89C51Rx2

89C51Rx2

89C51Rx2

89C51Rx2

89C51Rx2, XACx

XACx

XACx

XACx

XACx, XAGx

XAGx

XAGx

XAGx

XAGx

, Infineon

C167Cx

C167Cx

C167Cx

C167Cx

C167Cx

,

Motorola

MPC555

MPC555

MPC555

MPC555

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& ST Microelectronic

ST10F168

ST10F168

ST10F168

ST10F168

ST10F168

■

Low EMI design

Low EMI design

Low EMI design

Low EMI design

Low EMI design

achieved via GND circuitry, 6 to 8 layer PCB, by-

pass capacitor grid and short signal traces achieved via small
footprint and use of 0402 SMD passive components

■

32 KB to 8 MB external SRAM & Flash (controller-dependent)

■

FlashTools enable on-board in-system (ISP) programming

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2

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Molex (0.625 mm.) header pins on two sides of the board,
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CIRCUIT CELLAR

®

Issue 149 December 2002

85

PC KEYBOARD EMULATION

Interface Keypads, Switches, or RS-232 to your PC Keyboard Input

MODEL KE24

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BOB-3 is a team player.
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86

Issue 149 December 2002

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Issue 149 December 2002

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®

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Issue 149 December 2002

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Front Panels?

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Download the free ›Front Panel Designer‹
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Email: [e-mail]

92

Issue 149 December 2002

CIRCUIT CELLAR

®

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www.circuitcellar.com

CIRCUIT CELLAR

®

Issue 149 December 2002

93

The PSoC RangeFinder—A Simple Ultrasonic Distance Meter

Use Frequency Modulation to Send ASCII Data

Where is the Hardware?

ARMs to ARMs—Part 3: Working in the World of ARM

Building an Electric Airplane

Robotics Corner: The Geiger Project—The Design, Construction, and

Interfacing of a Simple Radiation Detector

I Applied PCs: Construct an ATA Hard Drive Controller
I From the Bench: GUI Interfacing—A Straightforward, Simple Solution
I Silicon Update: Going Mobile

Preview of January Issue 150

Theme: Embedded Applications

94

Issue 149 December 2002

CIRCUIT CELLAR

®

www.circuitcellar.com

INDEX

91

Abacom Technologies

85

ActiveWire, Inc.

35

All Electronics Corp.

84

Allied Component Works

86

Amazon Electronics

9

Amulet Technologies

92

AP Circuits

90

Appspec Computer Tech. Corp.

7

Atmel

87

Bagotronix, Inc.

49,85

Basic Micro

90

Bellin Dynamic Systems, Inc.

65

CadSoft Computer, Inc.

59

CCS-Custom Computer Services

88

Concept Circuit Design

92

Conitec

61

Connecticut mircoComputer, Inc.

81

Cyberguys

91

Cyberpak Co.

79

Cypress MicroSystems

C4

Dataman Programmers, Inc.

90

DataRescue

85

Decade Engineering

87

Delcom Engineering

58

DesignCon 2003

86

Digital Products

1

Earth Computer Technologies

86

EE Tools

(Electronic Engineering Tools)

70

EMAC, Inc.

The Advertiser’s Index with links to their web sites is located at www.circuitcellar.com under the current issue.

Page

90

EVB Plus

48

ExpressPCB

85

FDI-Future Designs, Inc.

91

Front Pannel Expres

85

Hagstrom Electronics

56

HI-TECH Software, LLC

91

HVW Technologies Inc.

39

ICOP Technology Inc.

87

IMAGEcraft

89

Industrial Upgraders Corp.

91,92

Intec Automation, Inc.

90

Intronics, Inc.

75

Intuitive Circuits, LLC

71

Jameco

32

JK microsystems, Inc.

75

JR Kerr Automation & Engineering

50

LabJack Corp.

90

LabMetric

50

Lakeview Research

8,93

Lemos International

2

Link Instruments

93

Lynxmotion, Inc.

74

MaxStream

89

MCC (Micro Computer Control)

69

Microchip

15

Microchip Design Contest

90

Microcross

89

Micro Digital Inc.

92

microEngineering Labs, Inc.

95

Micromint

85

MicroSystems Development, Inc.

82

Mid-Atlantic System Consultants, Inc.

87

MJS Consulting

47

Motorola

57

MVS

93

Mylydia Inc.

33

NetBurner

26

NVE Corp.

87

OKW Electronics, Inc.

68

On Time

86

Ontrak Control Systems

50

PCB123

48

PCB Express

C2

Parallax, Inc.

84

Phytec America LLC

84

Phyton, Inc.

91

Picofab Inc.

88

Pioneer Hill Software

90

Prairie Digital, Inc.

89

Pulsar, Inc.

84

QKITS.COM

89

R2 Controls

31

R4 Systems Inc.

42

Rabbit Semiconductor

56

Remote Processing

69

RF Digital

89

RLC Enterprises, Inc.

88

RPA Electronics Design, LLC

Page

Page

Page

ADVERTISER’S

92

Rutex

5

Saelig Company

3

Scott Edwards Electronics Inc.

61

SeaFire Micros, Inc.

88

Sealevel Systems Inc.

86

Senix Corp.

85

Sensory, Inc.

84

Signum Systems

86

Softools

18,55

Solutions Cubed

92

Spectrum Engineering

84

Square 1 Electronics

88

SUMBOX Pty Ltd.

23

Systronix

C3

Tech Tools

59

Techniprise Inc.

16,17

Technologic Systems

86

Technological Arts

88

Tern Inc.

90

Triangle Research Int’l Inc.

70

Trilogy Design

93

Weeder Technologies

91

Xeltek

93

Xilor Inc.

87

Z-World

75

Zagros Robotics

86

Zanthic Technologies Inc.

February Issue 151

Deadlines

Space Close: Dec. 10

Material Due Date: Dec. 18

Theme:

Communications

A

TTENTION

A

DVERTISERS

Call Sean Donnelly to

reserve your space!

[phone]

email: [e-mail]

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‘m sitting here with my laptop in a big over-stuffed chair writing my editorial and telecommuting with the

Circuit Cellar office via e-

mail. Ordinarily, I’d be doing all of this down in the basement (that’s why they call it the Circuit Cellar, folks), but today was such a nice

fall day here in New England that I decided to do it above ground. Technically, I’ve always been able to accomplish this stuffed-chair routine,

but it hasn’t always been as easy. Up until about nine months ago when they finally strung a DSL cable out to where I live, the best I could do

for remote computing was a long tether to a standard dial-up phone line. I was forever tripping over it.

Because using high-speed DSL has more installation options, I added a wireless router along with the hard-wired network connections. All I had to do was

insert a credit card-sized wireless fidelity (Wi-Fi) transceiver in the PC-card slot of my laptop and, voilà, instant mobile Internet (for a few hundred feet anyway). I’m

happy to say it was completely successful, and it allows me to use the laptop virtually anywhere on my immediate property. In fact, I love it when we’re watching

TV and there is some reference about e-mailing an opinion or getting more info from a web site, and I can do it in real time as we watch.

Probably, the reason I like the idea of Wi-Fi most is that its popularity has come from the user side rather than declarations by industry analysts or promises

from big companies. For the most part, Wi-Fi is like dealing with other open-source technologies, and there are only a few strict rules: devices must be low power

to avoid jamming other signals, and they must follow the agreed upon design standards of 802.11. Unlike cellular telephone service, which uses a heavily regulated

and high-priced frequency spectrum (some companies have paid billions of dollars for networks and licensing fees), the 802 frequency bands come free of charge

and are largely unregulated by the FCC.

Of course, the low cost of becoming your own neighborhood ISP appeals to many people. Neighbors within 300

′

of your home wireless network get to share

your bandwidth, and all they need is a $50 wireless network card. If you’re generous, you call it a “freenet.” If you’re on a tight budget, perhaps a few neighbors

chip in to pay the monthly broadband bill. Of course, all of this sounds plausible and sensible until you extrapolate this to opportunists who might apply “chipping in”

to a few hundred “neighborhood” people in an apartment tower.

The problem is, all you need is one paying broadband subscriber to set up a wireless local network that allows any number of others access to the same service

(for fun or for profit). Most local networks are set up by individuals like me just looking for a way to work in another part of their home or business. There’s another

crowd interested in networking every cafe, hotel, airport, and conference center in existence. In the meantime, all of the potential free network access (intended or

simply the unintended bleed within 300

′

of a system like mine) creates an adventure for hackers. All it takes is some Sniffer software, usually downloaded for free,

combined with a Wi-Fi card in a laptop to search out the nearest network (Aside from the fact that you may or may not have a legal right to redistribute bandwidth,

what do you do when some federal-type comes knocking on your door to discuss all the kiddy-porn that’s apparently being channeled through your IP address?).

As you might have guessed, some broadband service providers aren’t happy about “freenets” at all. They even equate it to theft of service and will disconnect

the subscribers who are found guilty of sharing bandwidth. One of the solutions is pay-for-play Wi-Fi from a provider such as Boingo. The service, designed prima-

rily for business travelers, provides a list of places to log on with your PDA or laptop. While Boingo says they will soon list thousands of network access points, it

still costs up to $75 a month to use.

The big wireless phone companies aren’t sitting on their thumbs either. The telcos have been pushing their own wireless-data services, generically referred to

as 2.5G (generation two and a half) and 3G (third generation). Such services are popular already in Europe, but I suspect that it has more to do with the difficulty of

routing DSL lines through 1000-year-old buildings than strictly performance. To make a long story short, I see the telcos eventually providing a hybrid of Wi-Fi and

3G. The Wi-Fi would be high speed, small area, but very low cost. The 3G would be wide area, lower speed, but higher cost.

Of course, just like the popularity of Wi-Fi, the course and costs of Internet services can be greatly influenced by users who vote with their wallets. If you deal

only with ISPs that allow freenets, they will flourish. Similarly, if everyone runs out tomorrow to buy a 2.5/3G phone, the telcos will have little incentive to offer you

anything different.

When all of the dust settles, I hope they arrive at the one immutable wallet-driven conclusion. Some of us would like to have just one bill a month for all our

communication services—phone, Internet, cable, etc.—rather than being nickeled and dimed to death by every individual puzzle-piece provider.

Why-Fi?

INTERRUPT

i

[e-mail]

96

Issue 149 December 2002

CIRCUIT CELLAR

®

www.circuitcellar.com

PRIORITY

STILL THE WORLD’S MOST

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• Free universal 44 pin PLCC adaptor

• Built-in world standard PSU - for go-

anywhere programming

• Package adaptors available for TSOP,

PSOP, QFP, SOIC and PLCC

• Optional EPROM emulator

DATAMAN S4

• Programs 8 and 16 bit EPROMs,

EEPROMs, PEROMs, 5 and 12V FLASH,
Boot-Block FLASH, PICs, 8751
microcontrollers and more

• EPROM emulation as standard

• Rechargeable battery power for total

portability

• All-in-one price includes emulation

leads, AC charger, PC software, spare
library ROM, user-friendly manual

• Supplied fully charged and ready to use

S4 GAL MODULE

• Programs wide range of 20 and 24 pin

logic devices from the major GAL vendors

• Supports JEDEC files from all popular

compilers

SUPPORT

• 3 year parts and labor warranty

• Windows/DOS software included

• Free technical support for life

• Next day delivery - always in stock

Still as unbeatable as ever. Beware of
cheap imitations. Beware of false
promises. Beware of hidden extras.
If you want the best, there’s still only one
choice - Dataman.

Order via credit card hotline - phone
today, use tomorrow.

Alternatively, request more detailed
information on these and other market-
leading programming solutions.

NEW MODEL

MONEY-BACK

30 DAY TRIAL

If you do not agree that these truly are the

most powerful portable programmers you can

buy, simply return your Dataman product

within 30 days for a full refund