citac1300 sch

background image

1

2

3

4

5

6

A

B

C

D

6

5

4

3

2

1

D

C

B

A

Title

Number

Revision

Size

B

Date:

28-Aug-2001

Sheet of

File:

D:\PROTEL99 SE\Projekty\citac\citac.ddb Drawn By:

RA0

17

RA1

18

RA2

1

RA3

2

RA4/T0CKI

3

RB0/INT

6

RB1

7

RB2

8

RB3

9

RB4

10

RB5

11

RB6

12

RB7

13

MCLR

4

OSC1/CLKIN

16

OSC2/CLKOUT

15

U1

PIC16C84-10E/P(18)

1
2
3
4
5
6
7
8
9
10

J4

CON10

X1

4 MHz

C8
20p

C9
20p

VOLBA

ENTER

R1
10K

R2
10K

VDD

VDD

X0

12

X1

13

Y0

2

Y1

1

Z0

5

Z1

3

INH

6

A

11

B

10

C

9

X

14

Y

15

Z

4

U2

74HC4053

Q1
BFR90

R7
1K

R8

56K

1

2

J1

1

2

J2

1

2

J3

D1

2x1N4148

D2

D5

D6

D4

2x1N4148

D3

R10

1K

R11

1M

R12

1K

R13

1M

VDD

R14

1K

C1

100n

C2

47M

C3

1n

C4

1n

C5

1n

C6

47p

C7

1n

Q3

BF245

VDD

Q2

VDD

R3

470

R4

10K

R5

1K

MENU

R9

10K

CITAC DO 1GHz

1

MIKULÁŠ KIŠŠ

1
2
3
4

8
7
6
5

U3

SAB6456

R15
100

C11

100p

C12

1n

5 Hz - 30 MHz

20 -1000 MHz

2xBAT41

TTL vstup

1
2

J5

NAP

Vin

1

GND

3

+5V

2

U4
78L05

C10
47u

C13
1n

C14
100u

VDD

D7

1N4148

P1

10K

GND - 1
VDD - 2
Vo - 3
RS - 4
R/W - 5
E - 6
DB4 - 11
DB5 - 12
DB6 - 13
DB7 - 14

Vstup A

Vstup B

Vstup C

NC

IN1

IN2
GND MOD

Q1

Q2

VCC


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