Device Usage Statistics Report

Device Usage Page (usage_statistics_webtalk.html)This HTML page displays the device usage statistics that will be sent to Xilinx.  

Software Version and Target Device

Product Version:
ISE:14.2 (ISE) - P.28xd
Target Family:
Spartan6


OS Platform:
NT
Target Device:
xc6slx16


Project ID (random number)
f759f2d563b2414cae42a646526462a5.E95415D9540A4C7EA2930B6E05A7E262.9
Target Package:
csg324


Registration ID
176281944_174171439_208900126_841
Target Speed:
-3


Date Generated
2013-05-29T09:58:02
Tool Flow
ISE


 

User Environment

OS Name
Microsoft Windows XP Professional
OS Release
Dodatek Service Pack 3 (build 2600)


CPU Name
Intel(R) Core(TM)2 Duo CPU E7500 @ 2.93GHz
CPU Speed
2930 MHz


OS Name
Microsoft Windows XP Professional
OS Release
Dodatek Service Pack 3 (build 2600)


CPU Name
Intel(R) Core(TM)2 Duo CPU E7500 @ 2.93GHz
CPU Speed
2930 MHz


 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage


Adders/Subtractors=3

17-bit adder=1
2-bit adder=1
8-bit adder=1


Comparators=2

17-bit comparator greater=1
8-bit comparator lessequal=1


Counters=3

17-bit up counter=1
2-bit up counter=1
8-bit up counter=1


Multiplexers=1

8-bit 4-to-1 multiplexer=1


Registers=46

Flip-Flops=46






MiscellaneousStatistics

AGG_BONDED_IO=29
AGG_IO=29
AGG_LOCED_IO=21
AGG_SLICE=37
NUM_BONDED_IOB=29
NUM_BSFULL=40
NUM_BSLUTONLY=50
NUM_BSREGONLY=30
NUM_BSUSED=120
NUM_BUFG=2
NUM_IOB_LATCH=7
NUM_LOCED_IOB=21
NUM_LOGIC_O5ANDO6=11
NUM_LOGIC_O5ONLY=36
NUM_LOGIC_O6ONLY=40
NUM_LUT_RT_DRIVES_CARRY4=3
NUM_LUT_RT_EXO6=3
NUM_LUT_RT_O6=36
NUM_OLOGIC2=7
NUM_SLICEL=13
NUM_SLICEX=24
NUM_SLICE_CARRY4=12
NUM_SLICE_CONTROLSET=9
NUM_SLICE_CYINIT=140
NUM_SLICE_F7MUX=1
NUM_SLICE_FF=70
NUM_SLICE_UNUSEDCTRL=15
NUM_UNUSABLE_FF_BELS=26




NetStatistics

NumNets_Active=191
NumNets_Vcc=1
NumNodesOfType_Active_BOUNCEACROSS=4
NumNodesOfType_Active_BOUNCEIN=17
NumNodesOfType_Active_BUFGOUT=2
NumNodesOfType_Active_BUFHINP2OUT=4
NumNodesOfType_Active_CLKPIN=29
NumNodesOfType_Active_CLKPINFEED=8
NumNodesOfType_Active_CNTRLPIN=9
NumNodesOfType_Active_DOUBLE=106
NumNodesOfType_Active_GENERIC=48
NumNodesOfType_Active_GLOBAL=24
NumNodesOfType_Active_INPUT=11
NumNodesOfType_Active_IOBIN2OUT=31
NumNodesOfType_Active_IOBOUTPUT=31
NumNodesOfType_Active_LUTINPUT=227
NumNodesOfType_Active_OUTBOUND=159
NumNodesOfType_Active_OUTPUT=141
NumNodesOfType_Active_PADINPUT=15
NumNodesOfType_Active_PADOUTPUT=17
NumNodesOfType_Active_PINBOUNCE=83
NumNodesOfType_Active_PINFEED=282
NumNodesOfType_Active_PINFEED2=7
NumNodesOfType_Active_QUAD=64
NumNodesOfType_Active_REGINPUT=33
NumNodesOfType_Active_SINGLE=179
NumNodesOfType_Vcc_GENERIC=1
NumNodesOfType_Vcc_HVCCOUT=17
NumNodesOfType_Vcc_IOBIN2OUT=1
NumNodesOfType_Vcc_IOBOUTPUT=1
NumNodesOfType_Vcc_KVCCOUT=1
NumNodesOfType_Vcc_LUTINPUT=47
NumNodesOfType_Vcc_PADINPUT=1
NumNodesOfType_Vcc_PINBOUNCE=1
NumNodesOfType_Vcc_PINFEED=48
NumNodesOfType_Vcc_REGINPUT=1


SiteStatistics

BUFG-BUFGMUX=2
IOB-IOBM=13
IOB-IOBS=16
SLICEL-SLICEM=6
SLICEX-SLICEL=4
SLICEX-SLICEM=5






SiteSummary

BUFG=2
BUFG_BUFG=2
CARRY4=12
FF_SR=1
HARD0=3
IOB=29
IOB_IMUX=17
IOB_INBUF=17
IOB_OUTBUF=12
LUT5=47
LUT6=90
OLOGIC2=7
OLOGIC2_OUTFF=7
PAD=29
REG_SR=69
SELMUX2_1=1
SLICEL=13
SLICEX=24





 
Configuration Data


FF_SR

CK=[CK:1] [CK_INV:0]
SRINIT=[SRINIT0:1]
SYNC_ATTR=[ASYNC:1]


IOB_OUTBUF

DRIVEATTRBOX=[12:12]
SLEW=[SLOW:12]
SUSPEND=[3STATE:12]




OLOGIC2

CLK0=[CLK0_INV:7] [CLK0:0]


OLOGIC2_OUTFF

CK0=[CK0_INV:7] [CK0:0]
OUTFFTYPE=[LATCH:7]
SRINIT_OQ=[0:7]




REG_SR

CK=[CK:61] [CK_INV:8]
LATCH_OR_FF=[FF:69]
SRINIT=[SRINIT0:57] [SRINIT1:12]
SYNC_ATTR=[ASYNC:68] [SYNC:1]




SLICEL

CLK=[CLK:3] [CLK_INV:0]


SLICEX

CLK=[CLK:17] [CLK_INV:2]





 
Pin Data


BUFG

I0=2
O=2


BUFG_BUFG

I0=2
O=2


CARRY4

CIN=9
CO3=9
CYINIT=3
DI0=10
DI1=10
DI2=10
DI3=9
O0=11
O1=9
O2=9
O3=10
S0=12
S1=10
S2=10
S3=10


FF_SR

CK=1
D=1
Q=1


HARD0

0=3


IOB

I=17
O=12
PAD=29
T=4


IOB_IMUX

I=17
OUT=17


IOB_INBUF

OUT=17
PAD=17


IOB_OUTBUF

IN=12
OUT=12
TRI=4


LUT5

A2=4
A3=4
A4=7
A5=7
O5=47




LUT6

A1=18
A2=23
A3=25
A4=40
A5=78
A6=88
O6=90


OLOGIC2

CLK0=7
D1=7
OQ=7


OLOGIC2_OUTFF

CK0=7
D1=7
Q=7


PAD

PAD=29


REG_SR

CE=32
CK=69
D=69
Q=69
SR=1


SELMUX2_1

0=1
1=1
OUT=1
S0=1


SLICEL

A2=1
A3=1
A4=3
A5=9
A6=13
AMUX=9
AQ=3
B=1
B1=1
B2=1
B3=1
B4=3
B5=9
B6=11
BMUX=7
BQ=2
C1=1
C2=1
C3=1
C4=3
C5=9
C6=11
CIN=9
CLK=3
CMUX=8
COUT=9
CQ=2
CX=1
D1=1
D2=1
D3=1
D4=3
D5=9
D6=10
DMUX=8
DQ=2




SLICEX

A=5
A1=5
A2=7
A3=7
A4=9
A5=13
A6=13
AMUX=2
AQ=18
AX=9
B=4
B1=3
B2=4
B3=6
B4=7
B5=9
B6=10
BMUX=1
BQ=14
BX=8
C=3
C1=4
C2=4
C3=4
C4=5
C5=9
C6=9
CE=8
CLK=19
CMUX=1
CQ=14
CX=8
D=5
D1=3
D2=5
D3=5
D4=7
D5=11
D6=11
DMUX=4
DQ=14
DX=8
SR=1







 
Tool Usage
Command Line History
sch2hdl -intstyle ise -family spartan6 -flat -suppress -vhdl <fname>.vhf -w {C:/Documents and <fname>.sch}
sch2sym -intstyle ise -family spartan6 -refsym <design> {C:/Documents and <fname>.sch} {C:/Documents and <fname>.sym}
xst -intstyle ise -ifn <ise_file>
ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <ise_file> <fname>.ngd
map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
sch2hdl -intstyle ise -family spartan6 -flat -suppress -vhdl <fname>.vhf -w {C:/Documents and <fname>.sch}
xst -intstyle ise -ifn <ise_file>
ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <ise_file> <fname>.ngd
map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
sch2hdl -intstyle ise -family spartan6 -flat -suppress -vhdl <fname>.vhf -w {C:/Documents and <fname>.sch}
xst -intstyle ise -ifn <ise_file>
ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <ise_file> <fname>.ngd
map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
bitgen -intstyle ise -f <fname>.ut <fname>.ncd
sch2hdl -intstyle ise -family spartan6 -flat -suppress -vhdl <fname>.vhf -w <fname>.sch
xst -intstyle ise -ifn <ise_file>
ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <fname>.ngc <fname>.ngd
map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
bitgen -intstyle ise -f <fname>.ut <fname>.ncd
xst -intstyle ise -ifn <ise_file>
ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <fname>.ngc <fname>.ngd
map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
bitgen -intstyle ise -f <fname>.ut <fname>.ncd
xst -intstyle ise -ifn <ise_file>
ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <fname>.ngc <fname>.ngd
map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
bitgen -intstyle ise -f <fname>.ut <fname>.ncd
ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <fname>.ngc <fname>.ngd
map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
bitgen -intstyle ise -f <fname>.ut <fname>.ncd
ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <fname>.ngc <fname>.ngd
map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
bitgen -intstyle ise -f <fname>.ut <fname>.ncd
sch2hdl -intstyle ise -family spartan6 -flat -suppress -vhdl <fname>.vhf -w <fname>.sch
sch2sym -intstyle ise -family spartan6 -refsym <design> <fname>.sch <fname>.sym
xst -intstyle ise -ifn <ise_file>
sch2sym -intstyle ise -family spartan6 -refsym <design> <fname>.sch <fname>.sym
sch2hdl -intstyle ise -family spartan6 -flat -suppress -vhdl <fname>.vhf -w <fname>.sch
sch2sym -intstyle ise -family spartan6 -refsym <design> <fname>.sch <fname>.sym
xst -intstyle ise -ifn <ise_file>
ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <fname>.ngc <fname>.ngd
map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
sch2sym -intstyle ise -family spartan6 -refsym <design> <fname>.sch <fname>.sym
bitgen -intstyle ise -f <fname>.ut <fname>.ncd


 Software QualityRun StatisticsProgram NameRuns StartedRuns FinishedErrorsFatal ErrorsInternal ErrorsExceptionsCore Dumps


_impact
73
73
0
0
0
0
0


bitgen
69
68
0
0
0
0
0


edif2ngd
8
8
0
0
0
0
0


elfcheck
82
72
0
0
0
0
0


libgen
16
16
0
0
0
0
0


map
101
83
0
0
0
0
0


netgen
114
112
0
0
0
0
0


ngcbuild
58
58
0
0
0
0
0


ngdbuild
128
128
0
0
0
0
0


par
83
83
0
0
0
0
0


platgen
14
11
0
0
0
0
0


psf2Edward
5
5
0
0
0
0
0


simgen
5
5
0
0
0
0
0


trce
141
141
0
0
0
0
0


xdsgen
5
5
0
0
0
0
0


xps
43
43
0
0
0
0
0


xst
269
268
0
0
0
0
0


 

Help Statistics

Help files
/doc/usenglish/isehelp/pn_c_tip_of_day.htm ( 1 )

 

Project Statistics

PROP_Enable_Message_Filtering=false
PROP_FitterReportFormat=HTML

PROP_LastAppliedGoal=Balanced
PROP_LastAppliedStrategy=Xilinx Default (unlocked)

PROP_ManualCompileOrderImp=false
PROP_PropSpecInProjFile=Store all values

PROP_SelectedInstanceHierarchicalPath=/seven_seg_bright_control_seven_seg_bright_control_sch_tb
PROP_Simulator=ISim (VHDL/Verilog)

PROP_SynthTopFile=changed
PROP_Top_Level_Module_Type=HDL

PROP_UseSmartGuide=false
PROP_UserConstraintEditorPreference=Text Editor

PROP_intProjectCreationTimestamp=2013-05-08T08:27:50
PROP_intWbtProjectID=E95415D9540A4C7EA2930B6E05A7E262

PROP_intWbtProjectIteration=9
PROP_intWorkingDirLocWRTProjDir=Same

PROP_intWorkingDirUsed=No
PROP_selectedSimRootSourceNode_behav=work.seven_seg_bright_control_seven_seg_bright_control_sch_tb

PROP_xilxBitgStart_IntDone=true
PROP_AutoTop=false

PROP_DevFamily=Spartan6
PROP_DevDevice=xc6slx16

PROP_DevFamilyPMName=spartan6
PROP_DevPackage=csg324

PROP_Synthesis_Tool=XST (VHDL/Verilog)
PROP_DevSpeed=-3

PROP_PreferredLanguage=VHDL
FILE_SCHEMATIC=1

FILE_UCF=1
FILE_VHDL=12

 

Unisim Statistics
NGDBUILD_PRE_UNISIM_SUMMARY
NGDBUILD_NUM_BUFG=1
NGDBUILD_NUM_BUFGP=1
NGDBUILD_NUM_FD=29
NGDBUILD_NUM_FDE=32


NGDBUILD_NUM_FDR=1
NGDBUILD_NUM_FD_1=8
NGDBUILD_NUM_GND=1
NGDBUILD_NUM_IBUF=16


NGDBUILD_NUM_INV=4
NGDBUILD_NUM_LD=7
NGDBUILD_NUM_LUT1=39
NGDBUILD_NUM_LUT2=27


NGDBUILD_NUM_LUT4=8
NGDBUILD_NUM_LUT5=2
NGDBUILD_NUM_LUT6=18
NGDBUILD_NUM_MUXCY=39


NGDBUILD_NUM_MUXF7=1
NGDBUILD_NUM_OBUF=8
NGDBUILD_NUM_OBUFT=4
NGDBUILD_NUM_VCC=1


NGDBUILD_NUM_XORCY=39
NGDBUILD_POST_UNISIM_SUMMARY
NGDBUILD_NUM_BUFG=2
NGDBUILD_NUM_FD=29
NGDBUILD_NUM_FDE=32
NGDBUILD_NUM_FDR=1


NGDBUILD_NUM_FD_1=8
NGDBUILD_NUM_GND=1
NGDBUILD_NUM_IBUF=16
NGDBUILD_NUM_IBUFG=1


NGDBUILD_NUM_INV=4
NGDBUILD_NUM_LD=7
NGDBUILD_NUM_LUT1=39
NGDBUILD_NUM_LUT2=27


NGDBUILD_NUM_LUT4=8
NGDBUILD_NUM_LUT5=2
NGDBUILD_NUM_LUT6=18
NGDBUILD_NUM_MUXCY=39


NGDBUILD_NUM_MUXF7=1
NGDBUILD_NUM_OBUF=8
NGDBUILD_NUM_OBUFT=4
NGDBUILD_NUM_VCC=1


NGDBUILD_NUM_XORCY=39

 

XST Command Line Options
XST_OPTION_SUMMARY
-ifn=<fname>.prj
-ofn=<design_top>
-ofmt=NGC
-p=xc6slx16-3-csg324


-top=<design_top>
-opt_mode=Speed
-opt_level=1
-power=NO


-iuc=NO
-keep_hierarchy=No
-netlist_hierarchy=As_Optimized
-rtlview=Yes


-glob_opt=AllClockNets
-read_cores=YES
-write_timing_constraints=NO
-cross_clock_analysis=NO


-bus_delimiter=
-slice_utilization_ratio=100
-bram_utilization_ratio=100
-dsp_utilization_ratio=100


-reduce_control_sets=Auto
-fsm_extract=YES
-fsm_encoding=Auto
-safe_implementation=No


-fsm_style=LUT
-ram_extract=Yes
-ram_style=Auto
-rom_extract=Yes


-shreg_extract=YES
-rom_style=Auto
-auto_bram_packing=NO
-resource_sharing=YES


-async_to_sync=NO
-use_dsp48=Auto
-iobuf=YES
-max_fanout=100000


-bufg=16
-register_duplication=YES
-register_balancing=No
-optimize_primitives=NO


-use_clock_enable=Auto
-use_sync_set=Auto
-use_sync_reset=Auto
-iob=Auto


-equivalent_register_removal=YES
-slice_utilization_ratio_maxmargin=5