Baza Porad Serwisowych
PD
RFIN1
15-BIT f
+
DIV
CHARGE
UD
PRESCALER
RFIN2 _ PROGRAMMABLE
: 8 PUMP
DIVIDER
Q1 TO CP
f
7.8125 kHz
REF
OSCILLATOR DIVIDER
4 MHz
N=512
Q2
f
f
DIV
DIV
<
>
fREF fREF
15-BIT LATCH
POWER DOWN
LOGIC
DIVIDER RATIO
DETECTOR
IN-LOCK
DETECTOR
POR
OS
FL
SCL
IIC-BUS
LATCH 3
RTANSCEIVER
SDA
CONTRAL DATA
VEE
ADDRESS TTL LEVEL 7-BIT LATCH
3-BIT
COMPARATORS
SELECTION ADC PORT INFORMATION
T1
GATE
VCC
TSA5514/T/AT
P0 P1 P2 P4 P5 P6 P7
AS
Rys. 6. Schemat blokowy układu syntezera częstotliwoS
ci PLL - TSA5514.
SERWIS ELEKTRONIKI