Baza Porad Serwisowych
PD
RFIN1
15-BIT f
+
DIV
CHARGE
PRESCALER UD
RFIN2 _ PROGRAMMABLE
: 8 PUMP
DIVIDER
Q1
TO CP
fREF
7.8125 kHz
OSCILLATOR DIVIDER
4 MHz
N=512
Q2
f
f
DIV
DIV
<
>
15-BIT LATCH fREF fREF
POWER DOWN
LOGIC
DIVIDER RATIO
DETECTOR
IN-LOCK
POR DETECTOR
OS
SCL FL
IIC-BUS
LATCH 3
RTANSCEIVER
SDA CONTRAL DATA
VEE
ADDRESS TTL LEVEL
3-BIT
8-BIT LATCH
COMPARATORS
SELECTION ADC
PORT INFORMATION
T1
GATE
VCC
TSA5511/T/AT
TSA5512/T/AT/M
P0 P1 P2 P3 P4 P5 P6 P7
Rys. 3. Schemat blokowy układu syntezera częstotliwoS
ci PLL - TSA5511.
SERWIS ELEKTRONIKI