Philips Semiconductors RF Communications Products Product specification
Programmable analog compandor NE/SA572
DESCRIPTION FEATURES PIN CONFIGURATION
The NE572 is a dual-channel,
" Independent control of attack and recovery D1, N, F Packages
high-performance gain control circuit in which
time
either channel may be used for dynamic
1 16
V
TRACK TRIM A
CC
" Improved low frequency gain control ripple
range compression or expansion. Each
2 15
TRACK TRIM B
RECOV. CAP A
channel has a full-wave rectifier to detect the
" Complementary gain compression and
average value of input signal, a linearized, 3 14
RECT. IN A RECOV. CAP B
expansion with external op amp
temperature-compensated variable gain cell
4 13
ATTACK CAP A RECT. IN B
" Wide dynamic range greater than 110dB
("G) and a dynamic time constant buffer. The
"G OUT A
5 12 ATTACK CAP B
buffer permits independent control of
" Temperature-compensated gain control
"G OUT B
6 11
dynamic attack and recovery time with
THD TRIM A
"G IN A
minimum external components and improved " Low distortion gain cell
7 10
THD TRIM B
low frequency gain control ripple distortion
"G IN B
8 9
GND
" Low noise 6µV typical
over previous compandors.
" Wide supply voltage range 6V-22V
The NE572 is intended for noise reduction in
NOTE:
1. D package released in large SO (SOL) package
high-performance audio systems. It can also
" System level adjustable with external
only.
be used in a wide range of communication
components
systems and video recording applications.
APPLICATIONS
" Dynamic noise reduction system
" Voltage control amplifier
" Stereo expandor
" Automatic level control
" High-level limiter
" Low-level noise gate
" State variable filter
ORDERING INFORMATION
DESCRIPTION TEMPERATURE RANGE ORDER CODE DWG #
16-Pin Plastic Small Outline (SO) 0 to +70°C NE572D 0005
16-Pin Plastic Dual In-Line Package (DIP) 0 to +70°C NE572N 0406
16-Pin Plastic Small Outline (SO)  40 to +85°C SA572D 0005
16-Pin Ceramic Dual In-Line Package (Cerdip)  40 to +85°C SA572F 0582
16-Pin Plastic Dual In-Line Package (DIP)  40 to +85°C SA572N 0406
ABSOLUTE MAXIMUM RATINGS
SYMBOL PARAMETER RATING UNIT
VCC Supply voltage 22 VDC
TA Operating temperature range
NE572 0 to +70 °C
SA572  40 to +85
PD Power dissipation 500 mW
October 7, 1987 2 853-0813 90829
Philips Semiconductors RF Communications Products Product specification
Programmable analog compandor NE/SA572
BLOCK DIAGRAM
R1
(5,11)
(7,9)
6.8k
(6,10) "G
500
&!
GAIN CELL
(1,15)


(3,13)
+
+
10k
BUFFER 10k
270
RECTIFIER
&!
(16)
P.S.
(8) (4,12) (2,14)
DC ELECTRICAL CHARACTERISTICS
Standard test conditions (unless otherwise noted) VCC=15V, TA=25°C; Expandor mode (see Test Circuit). Input signals at unity gain level (0dB)
= 100mVRMS at 1kHz; V1 = V2; R2 = 3.3k&!; R3 = 17.3k&!.
SYMBOL PARAMETER TEST CONDITIONS NE572 SA572 UNIT
Min Typ Max Min Typ Max
VCC Supply voltage 6 22 6 22 VDC
ICC Supply current No signal 6 6.3 mA
VR Internal voltage reference 2.3 2.5 2.7 2.3 2.5 2.7 VDC
Total harmonic distortion
THD 1kHz CA=1.0µF 0.2 1.0 0.2 1.0 %
(untrimmed)
Total harmonic distortion
THD 1kHz CR=10µF 0.05 0.05 %
(trimmed)
Total harmonic distortion
THD 100Hz 0.25 0.25 %
(trimmed)
Input to V1 and V2 grounded
No signal output noise 6 25 6 25 µV
(20 20kHz)
Input change from no signal to
DC level shift (untrimmed) Ä…20 Ä…50 Ä…20 Ä…50 mV
100mVRMS
Unity gain level  1 0 +1  1.5 0 +1.5 dB
Large signal distortion V1=V2=400mV 0.7 3.0 0.7 3 %
Tracking error (measured
relative to value at unity Rectifier input
gain)= V2=+6dB V1=0dB Ä…0.2 Ä…0.2
[VO VO (unity gain)]dB V2= 30dB V1=0dB Ä…0.5  1.5 Ä…0.5  2.5 dB
 V2dB +0.8 +1.6
200mVRMS into channel A, measured
Channel crosstalk 60 60 dB
output on channel B
Power supply rejection ra-
PSRR 120Hz 70 70 dB
tio
October 7, 1987 3
Philips Semiconductors RF Communications Products Product specification
Programmable analog compandor NE/SA572
TEST CIRCUIT
100&!
1µF
 15V
22µF
+
1%
2.2µF
R
6.8k
(7,9) (5,11) 3
"G
V
1
17.3k
82k

5&!
270pF
(2,14)
NE5234
V
0
2.2k
= 10µF (6,10)
+
BUFFER
1k +
2.2µF
(4,12)
(8)
(1,15)
2.2µF
3.3k (3,13)
+15V
V
RECTIFIER
2
(16)
+
R
2
22µF
.1µF
1%
attack capacitor CA with an internal 10k inherent low distortion, low noise and the
AUDIO SIGNAL PROCESSING IC
resistor RA defines the attack time tA. The capability to linearize large signals, a wide
COMBINES VCA AND FAST AT-
recovery time tR of a tone burst is defined by dynamic range can be obtained. The buffer
TACK/SLOW RECOVERY LEVEL
a recovery capacitor CR and an internal 10k amplifiers are provided to permit control of
SENSOR
resistor RR. Typical attack time of 4ms for attack time and recovery time independent of
In high-performance audio gain control
the high-frequency spectrum and 40ms for each other. Partitioned as shown in the block
applications, it is desirable to independently
the low frequency band can be obtained with diagram, the IC allows flexibility in the design
control the attack and recovery time of the
0.1µF and 1.0µF attack capacitors, of system levels that optimize DC shift, ripple
gain control signal. This is true, for example,
respectively. Recovery time of 200ms can be distortion, tracking accuracy and noise floor
in compandor applications for noise
obtained with a 4.7µF recovery capacitor for for a wide range of application requirements.
reduction. In high end systems the input
a 100Hz signal, the third harmonic distortion
signal is usually split into two or more
is improved by more than 10dB over the
frequency bands to optimize the dynamic
Gain Cell
simple RC ripple filter with a single 1.0µF
behavior for each band. This reduces low
Figure 1 shows the circuit configuration of the
attack and recovery capacitor, while the
frequency distortion due to control signal
gain cell. Bases of the differential pairs Q1-Q2
attack time remains the same.
ripple, phase distortion, high frequency
and Q3-Q4 are both tied to the output and
The NE572 is assembled in a standard
channel overload and noise modulation.
inputs of OPA A1. The negative feedback
16-pin dual in-line plastic package and in
Because of the expense in hardware, multiple
through Q1 holds the VBE of Q1-Q2 and the
oversized SOL package. It operates over a
band signal processing up to now was limited
VBE of Q3-Q4 equal. The following
wide supply range from 6V to 22V. Supply
to professional audio applications.
relationship can be derived from the
current is less than 6mA. The NE572 is
transistor model equation in the forward
With the introduction of the Signetics NE572
designed for consumer application over a
active region.
this high-performance noise reduction
temperature range 0-70 The SA572 is
concept becomes feasible for consumer hi fi
DVBE + DBE
intended for applications from  40°C to
Q3Q4 Q1Q2
applications. The NE572 is a dual channel
+85°C.
gain control IC. Each channel has a
(VBE = VT IIN IC/IS)
linearized, temperature-compensated gain
NE572 BASIC APPLICATIONS
cell and an improved level sensor. In
conjunction with an external low noise op
Description
amp for current-to-voltage conversion, the
The NE572 consists of two linearized,
VCA features low distortion, low noise and
temperature-compensated gain cells ("G),
wide dynamic range.
each with a full-wave rectifier and a buffer
amplifier as shown in the block diagram. The
The novel level sensor which provides gain
two channels share a 2.5V common bias
control current for the VCA gives lower gain
reference derived from the power supply but
control ripple and independent control of fast
otherwise operate independently. Because of
attack, slow recovery dynamic response. An
October 7, 1987 4
Philips Semiconductors RF Communications Products Product specification
Programmable analog compandor NE/SA572
1 1 1 1
IG ) IO IG * IO V+
2 2 2 2
VTIn * VTIn
IS IS
VIN
where IIN +
R1
R1 = 6.8k&!
I1 = 140µA
I2 = 280µA
1 1
IG ) IO
I
I1 ) IIN I2 * I1 * IIN 2 2
1

VTIn * VTIn (2) 140µA
IS IS
A1
I
O
VIN
+ 
where IIN +
R1
R1 = 6.8k&!
Q
Q Q
Q 2
3 1
4
I1 = 140µA
I2 = 280µA
R1
6.8k
IO is the differential output current of the gain
I
2
cell and IG is the gain control current of the I
G
280µA
gain cell.
V
REF
THD
If all transistors Q1 through Q4 are of the
TRIM
same size, equation (2) can be simplified to:
V
IN
2 1
Figure 1. Basic Gain Cell Schematic

IO + @ IIN @ IG * I2 * 2I1 @ IG (3)
I2 I2
The first term of Equation 3 shows the The internal bias scheme limits the maximum
Rectifier
multiplier relationship of a linearized two output current IR to be around 300µA. Within a
The rectifier is a full-wave design as shown in
quadrant transconductance amplifier. The Ä…1dB error band the input range of the rectifier
Figure 2. The input voltage is converted to
second term is the gain control feedthrough is about 52dB.
current through the input resistor R2 and
due to the mismatch of devices. In the
turns on either Q5 or Q6 depending on the
design, this has been minimized by large
signal polarity. Deadband of the voltage to
matched devices and careful layout. Offset
current converter is reduced by the loop gain
voltage is caused by the device mismatch
of the gain block A2. If AC coupling is used,
and it leads to even harmonic distortion. The
the rectifier error comes only from input bias
offset voltage can be trimmed out by feeding
current of gain block A2. The input bias
a current source within Ä…25µA into the THD
current is typically about 70nA. Frequency
trim pin.
response of the gain block A2 also causes
The residual distortion is third harmonic
second-order error at high frequency. The
distortion and is caused by gain control
collector current of Q6 is mirrored and
ripple. In a compandor system, available
summed at the collector of Q5 to form the full
control of fast attack and slow recovery
wave rectified output current IR. The rectifier
improve ripple distortion significantly. At the
transfer function is
unity gain level of 100mV, the gain cell gives
VIN * VREF
THD (total harmonic distortion) of 0.17% typ. (4)
IR +
R2
Output noise with no input signals is only 6µV
in the audio spectrum (10Hz-20kHz). The
If VIN is AC-coupled, then the equation will be
output current IO must feed the virtual ground
reduced to:
input of an operational amplifier with a
VIN(AVG)
resistor from output to inverting input. The
IRAC +
R2
non-inverting input of the operational
amplifier has to be biased at VREF if the
output current IO is DC coupled.
October 7, 1987 5
Philips Semiconductors RF Communications Products Product specification
Programmable analog compandor NE/SA572
Buffer Amplifier
VIN * VREF
V+
In audio systems, it is desirable to have fast
IR +
R2
attack time and slow recovery time for a tone
burst input. The fast attack time reduces
transient channel overload but also causes
low-frequency ripple distortion. The
low-frequency ripple distortion can be
improved with the slow recovery time. If
V +
REF
different attack times are implemented in
A2
corresponding frequency spectrums in a split
 Q5
band audio system, high quality performance
can be achieved. The buffer amplifier is
designed to make this feature available with
minimum external components. Referring to
D7
Figure 3, the rectifier output current is
mirrored into the input and output of the
unipolar buffer amplifier A3 through Q8, Q9
Q6
and Q10. Diodes D11 and D12 improve
R2
tracking accuracy and provide
V
IN
common-mode bias for A3. For a
positive-going input signal, the buffer
amplifier acts like a voltage-follower.
Therefore, the output impedance of A3 makes
the contribution of capacitor CR to attack time
insignificant. Neglecting diode impedance,
the gain Ga(t) for "G can be expressed as
follows:
Figure 2. Simplified Rectifier Schematic
* t
Ga(t) + (GaINT * GaFNL et ) GaFNL
A
GaINT=Initial Gain
V+
GaFNL=Final Gain
Q8 Q9
Q10
ÄA=RA " CA=10k " CA
where ÄA is the attack time constant and RA
I
is a 10k internal resistor. Diode D15 opens
Q = 2IR2
Q17
the feedback loop of A3 for a negative-going
signal if the value of capacitor CR is larger
than capacitor CA. The recovery time
I
R2
depends only on CR " RR. If the diode
X2
Q16 impedance is assumed negligible, the
10k
VIN
dynamic gain GR (t) for "G is expressed as
IR +
R
follows.

* t
D15
GR(t) + (GRINT * GRFNL et ) GRFNL
R
D13
A3
+
GR(t)=(GR INT GR FNL) e +GR FNL
ÄR=RR " CR=10k " CR
10k I
R1
X2
Q14
Q18
where ÄR is the recovery time constant and
RR is a 10k internal resistor. The gain control
D11
current is mirrored to the gain cell through
D12
Q14. The low level gain errors due to input
bias current of A2 and A3 can be trimmed
through the tracking trim pin into A3 with a
CR current source of Ä…3µA.
CA
TRACKING
TRIM
Basic Expandor
Figure 4 shows an application of the circuit as
a simple expandor. The gain expression of
Figure 3. Buffer Amplifier Schematic
the system is given by
October 7, 1987 6
Philips Semiconductors RF Communications Products Product specification
Programmable analog compandor NE/SA572
desirable system voltage and current levels. reference Pin 6 or 10. Resistor R4 is used to
VOUT 2 R3 @ VIN(AVG)
(5)
+ @
A small R2 results in higher gain control bias up the output DC level of A2 for
VIN I1 R2 @ R1
current and smaller static and dynamic maximum swing. The output DC level of A2 is
(I1=140µA)
tracking error. However, an impedance buffer given by
A1 may be necessary if the input is voltage
Both the resistors R1 and R2 are tied to
drive with large source impedance.
internal summing nodes. R1 is a 6.8k internal
R3 R3
resistor. The maximum input current into the
The gain cell output current feeds the

VODC + VREF 1 ) * VB (6)
gain cell can be as large as 140µA. This R4 R4
summing node of the external OPA A2. R3
corresponds to a voltage level of 140µA "
and A2 convert the gain cell output current to
6.8k=952mV peak. The input peak current
the output voltage. In high-performance
into the rectifier is limited to 300µA by the VB can be tied to a regulated power supply
applications, A2 has to be low-noise,
internal bias system. Note that the value of for a dual supply system and be grounded for
high-speed and wide band so that the
R1 can be increased to accommodate higher a single supply system. CA sets the attack
high-performance output of the gain cell will
input level. R2 and R3 are external resistors. time constant and CR sets the recovery time
not be degraded. The non-inverting input of
It is easy to adjust the ratio of R3/R2 for constant. *5COL
A2 can be biased at the low noise internal
R4 R3
+VB
17.3k

C
IN2
R1
(5,11)
A1
"G
C
IN1
(7,9)
6.8k
V V
+
IN A2 OUT
(6,10) R6
2.2µF
V
REF
1k
(2,14)
C1
R5
(4,12)
BUFFER
100k 2.2µF
C
IN3
2.2µF
R2
3.3k
CA CR
1µF 10µF
(3,13)
(8)
(16)
+V
CC
Figure 4. Basic Expandor Schematic
October 7, 1987 7
Philips Semiconductors RF Communications Products Product specification
Programmable analog compandor NE/SA572
Basic Compressor
R4 RDC1
RDC2
Figure 5 shows the hook-up of the circuit as a
9.1k 9.1k
compressor. The IC is put in the feedback
CDC
loop of the OPA A1. The system gain
10µF
expression is as follows: C2
.1µF
1
VOUT I1 R2 @ R1 2 (7)
+ @ D1
C D2
IN1
VIN 2 R3 @ VIN(AVG)
V

IN
R3
RDC1, RDC2, and CDC form a DC feedback
2.2µF A1
V
17.3k
OUT
for A1. The output DC level of A1 is given by
+
RDC1 ) RDC2 (8) C1

VODC + VREF 1 )
1k R5
R4
(6,10)
V
REF
RDC1 ) RDC2
* VB @
R1 (7,9)
R4
"G
6.8k
C
IN2
2.2µF
The zener diodes D1 and D2 are used for
(5,11)
channel overload protection.
(2,14)
(4,12) C
BUFFER
Basic Compandor System IN3
2.2µF
The above basic compressor and expandor
can be applied to systems such as tape/disc
noise reduction, digital audio, bucket brigade 3.3k
R2
delay lines. Additional system design
CR CA
techniques such as bandlimiting, band (3,13)
1µF
10µF
splitting, pre-emphasis, de-emphasis and
equalization are easy to incorporate. The IC
(8)
(16)
V
is a versatile functional block to achieve a CC
high performance audio system. Figure 6
Figure 5. Basic Compressor Schematic
shows the system level diagram for
reference.
October 7, 1987 8
Philips Semiconductors RF Communications Products Product specification
Programmable analog compandor NE/SA572
1
2
2
REL LEVEL ABS LEVEL
V
RMS
COMPRESSION
EXPANDOR dB dBM
IN
OUT
INPUT TO "G
3.0V +29.54 +11.76
AND RECT
547.6MV +14.77  3.00
400MV +12.0  5.78
100MV 0.0  17.78
10MV  20  37.78
1MV  40  57.78
 60  77.78
100µV
10µV
 80  97.78
Figure 6. NE572 System Level
October 7, 1987 9