data�q processor schematic

Pil

Gnd

^7 Ul
1 . 1	IN LP2950 OUT GND
_L

10uF

TO-252

l

Pouer Input and Yoltage Regulator

Common Signals for Stacked Boards

SCL >

SDA >1

P31a

INTŁ>-|

IRB4/CN6 >| 1RB0 >i

⁶V

8_V

¹⁰V

10

30

50

70

90

oi

^>4

y>₆

^8

P10

A+5v

P31b

03

05

07

09

A+5u

luF . 01uF .01uF | C9 T C10 T CllyLy

Ł

Modę s I2C Address Suitches

Vdd /MCLR

RB0/AN0 RB1/ANI RB2/AN2 RB3/AN3 RB4/AN4 RB5/AN5 OŚCI

0SC2/RC15

INT0/RE8

INT1/RD0

INT2/RD1

USS

a w 'v •—<

o

co

G>

*n

a

s>

ró

£/ */    ^7

/a /b Yc Yd Ye SMl

+5v

Ydd AUdd

19

RB3/CN5 y

| INT^>-

|RB2/CN4 y ♦5v

'*L

. 01uF C3

P41

CN7 | RB5 >—^1	-Ol ^P2
1 Lilly -v -v RE3>"	03 ^P4
Kt«ł ? — re5 y PK1 1 DP 1	05
cni ku CN0 | RCl4>—	07 ^P8
^+5ua i	■W? yMlW
^u r

<--- Cut tracę at ^,X^> to

isolate +5V supply with stacked boards.

NOTES for stacked boards:

1> Install R11 on only one board for a common reference.

2) Cut tracę at    indicated

abooe.

3> At P31a and P31b, install małe or female as needed.

P21

UlARX/RC14 U1ATX/RC13

SDA/RF2/PGC SCL/RF3/PGD VSS AUss

27

Heartbeat LED

Programming

Connector

M i sce11aneous S i gna1s

Data	Acq.	Sys. for	Rad. fleas.
Data	Acquisition		Processor
		Reo 1.1		Page 1 of 1
n1ćtfbD		6/26/2007