62892 stat on last2

liii Statistics □

Total:

5887 Cycle(s) executed.

ID executed by 2658 Instruction(s). 2 Instruction(s) currently in Pipeline.

Hardware configuration:

Memory size: 32768 Bytes faddEX-Stages: 4, required Cycles: 2 fmulEX-Stage$: 4, required Cycles: 5 fdivEX-Stages: 1, required Cycles: 19 Forwarding enabled.

Stsalls :

RAW stalls: 2887 (49.04% of all Cycles), thereof:

LD stalls: 0 (0.00% of RAW stalls)

Branch/Jump stalls: 235 (8.14% of RAW stalls) Floating point stalls: 2652 (91.86% of RAW stalls) WAW stalls: 0 (0.00% of all Cycles)

Structural stalls: 0 (0.00% of all Cycles)

Control stalls: 233 (3.96% of all Cycles)

T rap stalls: 3 (0.05% of all Cycles)

Total: 3123 Stall(s) (53.05% of all Cycles)

Conditional Branches):

T otal: 235 (8.84% of all Instructions), thereof: taken: 233 (99.15% of all cond. Branches) not taken: 2 (0.85% of all cond. Branches)

Load-/Store-In3truetions:

Total: 872 (32.81 % of all Instructions), thereof:

Loads: 636 (72.94% of Load7Store-lnsłrucłions) Stores: 236 (27,06% of Load7Store-lnsłrucłions)

Floating point stage instructions:

Total: 867 (32.62% of all Instructions), thereof:

Additions: 552 (63.67% of Floating point stage inst.) Multiplications: 210 (24,22% of Floating point stage inst.) Divisions: 105 (12.11 % of Floating point stage inst.)

Total:

5887 Cycle(s) executed.

ID executed by 2658 Instruction(s). 2 Instrucłion(s) currently in Pipeline.

Hardware cor.figuration:

Memory size: 32768 Bytes faddEX-Stages: 4, reąuired Cycles: 2 fmulEX-Stages: 4, required Cycles: 5 fdivEX-Stages: 4, required Cycles: 19 Forwarding enabled.

Stalls:

RAW stalls: 2887 (49.04% of all Cycles), thereof:

LD stalls: 0 (0.00% of RAW stalls)

Branch/Jump stalls: 235 (8.14% of RAW stalls) Floating point stalls: 2652 (91.86% of RAW stalls) WAW stalls: 0 (0.00% of all Cycles)

Structural stalls: 0 (0.00% of all Cycles)

Conłrol stalls: 233 (3.96% of all Cycles)

T rap stalls: 3 (0.05% of all Cycles)

Total: 3123 Stall(s) (53.05% of all Cycles)

Conditional Branches):

Total: 235 (8.84% of all Instructions), thereof: taken: 233 (99.15% of all cond. Branches) not taken: 2 (0.85% of all cond. Branches)

Load-/Store-Instructions:

Total: 872 (32.81 % of all Instructions), thereof:

Loads: 636 (72.94% of Load-/Store-lnsłrucłions) Stores: 236 (27.06% of Load-/Store-lnsłrucłions)

Floating point stage instructions:

Total: 867 (32.62% of all Instructions), thereof:

Additions: 552 (63.67% of Floating point stage inst.) Multiplications: 210 (24,22% of Floating point stage inst.) Divisions: 105 (12.11 % of Floating point stage inst.)

Traps:

Traps: 1 (0.04% of all Instructions)