7088678855

Logic Design Laboratory Manuał

yiYA.OHESTięiMSi

1.    Why NAND & NOR gates are called universal gates?

2.    Realize the EX - OR gates using minimum number of NAND gates.

3.    Give the tmth table forEX-NOR and realize usingNAND gates?

4.    What are the logie Iow and High levels of TTL IC's and CMOS lC's?

5.    Compare TTL logie family with CMOS family?

6.    Which logie family is fastest and which has Iow power dissipation^,

EXPERIMENT: 2 REALIZATION OF A BOOLEAN FUNCTION.

A IM: To simplify the gjven expression and to realize it usirtg Basic gates and Universal gates

LEARyiyQ9BJKIIV£;

■    To simplify the Boolean expression and to build the logie Circuit.

■    Given a Tmth table to derive the Boolean expiessions and build the logie Circuit to realize it

C9MP9WENTSRE.W1RE1?;

IC 7400. IC 7408. IC 7432. IC 7406.1C 7402. Patch Cords & IC Trainer Kit THEORY:

Canonical Forms <Norma! Forms): Any Boolean function can be written in disjunctive nomial foim (sum of nun-tenns) or conjunctive normal foim fproduct of max temis).

A Boolean function can be represented by a Kamaugh map in which each celi conesponds to a nńntemi. The cells are arranged in such a way that any two immediately adjacent cells correspond to two minterms of dis tance 1. Theie is rnore than one way to constmct a map with tlus propert)¹.

Karna u gli Maps

Fora function of two variables. say, f(x. y).

X__X

f(0.0)	ftl 0)
fiO.l)	ftl.l)

y

y

Fora function of three variables, say. f(x, y. z)

xy xv xv \Y

i

z

flO.0.0)	ftO.1.0)	fu. 1.0)	Hi.0.0)
ao.o.i)	ffO.l.l)	fU.1.1)	ffl.0.1)

For a function of four variables: f(w, x. y. z)