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Logic Design Laboralory Manuał

4)    Wliat is nicant by canonical rcprcscntatiou?

5)    Wliat is K-uiap? Why is it tiscd?

6)    Wliat aro univcrsal gatcs?

EX1^>ERIMENT: 3 ADDERS AND SUBTRACTORS

A EV1: To rcalizo

i; lialf Adder and I'uli Adder

ii) I lalfSublraclor and l uli Subtraelor by using Hasie gales and NANI) gales LEARMNG OBJECTIYE:

*    To rcalizo tlić adder and subtractor circuits using basie gatcs and univcrsal gatcs ■ To rcalizo luli adder using two lialf adders

*    To rcalizo a fuli subtractor using two lialf subtractors

COMPONENTS REOUIRED:

IC 7400, IC 740,S. IC 7486. IC 74.12, Patch Cords & IC Trainer Kil.

TlIliORY:

Ualf-Adder: A combinaiional logie Circuit Ihal performs Ihe addilion of Iwo data biLs, A and K, is called a half-adder. Addilion will residl in two oulpul biLs; one of which is Ibe sum bil,

S. and llie olher is Ihe carrv bit. C. The lloolean funclions describing ihe half-adder are: S=A®B    "    C = AB

Full-Atlder: Tlio half-adder docs not tako tlio carry bit from its prcvious stage into account. Tliis carry bit troni its prcvious stage is called carry-in bit. A combinational logie Circuit tliat adds two data bits, A and B, and a carry-in bit, Cin, is callod a liill-addcr. Tlio Booloan functions describing tlić full-addor arc:

S = (x ® y) ® Cin    C = xy + Cin l x ® y)

llatf Suhtractor: Sublracling a single-bit binary value II from another A (i.e. A -II) produces a differenee bil I) and a bonrow out bil Ił-oul. 'I his operation is called half sublraelion and Ihe circuil to realize it is called a half subtractor. The lloolean funclions describing Ihe half-Sublractor are:

S=A © II    C = A’ II

Fuli Subtractor: Subtracting rwo single-bit binary valtios, B, Cin from a single-bit valuo A produces a differenee bit D and a borrow out Br bit. Tliis is called fuli subtracrion. Tlio Boolean functions describing tlio fnll-subtractcr are:

D = (x ® y) ® Cin    Br= A'B + ATCin) + B(Cin)