1 2 3 4
VCC
R1
1k
/RST
K2
D D
P00 P01
1 2
MD0 MD2
3 4
/RST SIN
5 6
SOT SCLK
T1850 7 8 SCLK
BC
VCC 9 10 GND
J2
J5
R6
BOXHEADER 5X2
SIN
10k
R7
10k
GND
C1 IC1 C4
100n 100n
2 1
V+ C1+
3
C1-
100n
6 4 C5
V- C2+
J3
K1
GND 5
C2-
100n
5 GND C2 SOT
PCGND
J1
C 9 14 11 SOT C
T1OUT T1IN
4 1 7 10 CTS
PCDTR T2OUT T2IN
8 CTS_PC
PCCTS
3 TX_PC 13 12 SIN
PCTXD R1IN R1OUT
7 RTS_PC 8 9 DTR
PCRTS R2IN R2OUT
2 RX_PC
PCRXD
6 DTR_PC C3 VCC VCC
PCDSR
1 16 15
VCC GND J4
R2
100n MAX232A
CAN 9 Z 90 GND GND VCC
1k
R3 R4
IC2A
1k 1k
SN74HC125
2 3
MD0
GND
MD1
VCC
IC2B
B 10k B
SN74HC125
R8
5 6
MD2
J6
R5
1k
IC2C
SN74HC125
9 8 GND
P00
GND
IC2D
SN74HC125
12 11
P01
GND
A A
Title
Serial interface logic recommendation
Size Number Revision
1 (version with gates)
A4
1
Date: 24-Apr-2001 Sheet of
File: D:\Designs\Unis\Pcb\Serprog\SerProg.Ddb Drawn By: Tomas Dulik
1 2 3 4
The target serial interface recommendation  version with the gates
72 Schematics
1
1
1
4
10
13