Philips Semiconductors
Power Diodes
Thermal Considerations
Thermal resistance
Circuit performance and long term reliability are
affected by the temperature of the chip. Normally,
both are improved by keeping the chip temperature
(junction temperature) low.
Electrical power dissipated in any semiconductor
device is a source of heat. This increases the
temperature of the chip with regard to some
reference point, normally an ambient temperature of
25
o
C in still air. The size of the increase in
temperature depends on the amount of power
dissipated in the device and the net thermal
resistance between the heat source and the
reference point. This can be expressed with the
following formula:
∆Τ
j = P
tot
x R
th j-a
where:
∆Τ
j is the increase in junction temperature.
P
tot
is the total power generated in the device
R
th j-a
is the thermal resistance from junction to
ambient.
Surface mounted devices
Heat transfer can occur by radiation, conduction and
convection. Surface mounted devices lose most of
their heat by conduction when mounted on a
substrate. Referring to Fig:1, heat conducts from its
source (the junction) via the package leads and
soldered connections to the substrate. Some heat
radiates from the package into the surrounding air,
where it is dispersed by convection or by forced
cooling air. heat that radiates from the substrate is
dispersed in the same way.
Heat radiates from the package ‘1’ to ambient. Heat
conducts via leads ‘2’, and solder joints ‘3’ to the
substrate ‘4’.
The thermal resistance for surface mounted devices
therefore, can be expressed as:
R
R
R
th j a
th j tp
th tp a
−
−
−
=
+
see Fig:2)
where:
R
th j-a
is the thermal resistance from junction to
ambient
R
th j-tp
is the thermal resistance from junction to tie
point
R
th tp-a
is the thermal resistance from the tie-point to
ambient.
The R
th j-tp
value is essentially independent of external
mounting method and cooling air, but is sensitive to
the materials used in the package construction, the
chip bonding method and the chip area, all of which
are fixed.
The R
th tp-a
value depends on the shape and material
of the tracks and substrate. For all package types
typical values are given in Table:1 for mounting on
(FR4) printed-circuit board with small pad area.
The maximum power handling capability (P
tot max
) is
given by:
1
2
2
3
3
4
Figure 1: Heat losses
junction
ambient
Rth tp-a
Rth j-tp
tie point
Rth j-a
Figure 2: Representation of thermal resistance
for a surface mounted device.
Philips Semiconductors
Power Diodes
Thermal Considerations
(
)
P
T
T
R
tot
j
amb
th j a
max
max
=
−
−
where:
T
j max
is the maximum junction temperature
T
amb
is the ambient temperature
Calculating this maximum power handling capability
we have to take into account the maximum junction
temperature of the particular device, the maximum
temperature of the solder joints (110
o
C for long time
reliability) and the ambient temperature. Dependent
on the ratio of the component parts of the thermal
resistance, it is possible that the junction temperature
or the temperature of the solder joints (T
tp
) will be the
limiting factor. This can be shown in the following
examples for SOT23 and SOD87 packages mounted
on FR4 printed circuit board.
E
XAMPLE FOR THE
SOT23
PACKAGE
(
)
P
T
T
R
tot
j
amb
th j a
max
max
=
−
−
(
)
=
−
=
150
25
500
0 25
o
o
C
C
K W
W
/
.
T
T
P
xR
tp
amb
tot
th tp a
=
+
−
max
=
+
=
25
0 25
150
62 5
o
o
C
Wx
K W
C
.
/
.
This is below 110
o
C so T
jmax
is the limiting factor
E
XAMPLE FOR THE
SOD87
PACKAGE
(
)
P
T
T
R
tot
j
amb
th j a
max
max
=
−
−
(
)
=
−
=
175
25
150
1
o
o
C
C
K W
W
/
T
T
P
xR
tp
amb
tot
th tp a
=
+
−
max
=
+
=
25
1
120
145
o
o
C
Wx
K W
C
/
This is above 110
o
C so the P
tot
will be limited by T
tp
,
therefore:
(
)
P
T
T
R
tot
tp
amb
th tp a
max
max
=
−
−
(
)
=
−
=
110
25
120
0 71
o
o
C
C
K W
W
/
.
The P
tot
values given in Table:1 are based on:
T
amb
= 25
o
C; T
j
= T
j max
; T
tp
< 110
o
C
Leaded devices
Figure:3 illustrates the various components of thermal
resistance for an axial leaded diode mounted with
symmetrical, equal length leads. The thermal
resistance from junction to ambient (R
thj-a
) comprises
the following thermal resistances:
R
th j-p
is the thermal resistance from junction to
package.
R
th p-tp
is the thermal resistance from package to tie
point
R
th tp-a
is the thermal resistance from tie-point to
ambient.
R
th p-a
is the thermal resistance from package to
ambient.
The values of the thermal components depend on the
package type, the lead length and the mounting
method used.
Using the model in Fig:3 and referring to Table:2,
values for the thermal resistance from junction to
ambient can be calculated using the formula:
(
)
R
R
R
R
R
R
R
R
j a
th j p
th p a
th p tp
th tp a
th p a
th p tp
th tp a
−
−
−
−
−
−
−
−
=
+
+
+
+
The maximum power handling capability (P
tot max
) is
given by:
(
)
P
T
T
R
tot
j
amb
th j a
max
max
=
−
−
junction
ambient
tie-point
Rth p-tp
Rth tp-a
Rth p-a
Rth j-p
package
Rth j-a
Figure 3: Representation of thermal resistance
for a leaded device.
Philips Semiconductors
Power Diodes
Thermal Considerations
where:
T
j max
is the maximum junction temperature
T
amb
is the ambient temperature.
Calculating the maximum power handling capability
we have to take into account the maximum junction
temperature of the particular device, the maximum
temperature of the solder joints (110
o
C for long time
reliability) and the ambient temperature. Dependent
on the ratio of the component parts of the thermal
resistance it is possible that the junction temperature
or the temperature of the solder joints (T
tp
) will be the
limiting factor. This can be shown in the following
examples for a SOD57 devices mounted on a FR4
printed circuit board, as shown in Fig:4.
E
XAMPLE FOR
SOD57
DEVICE
(
)
R
K W
K W
K W
K W
K W
K W
K W
j
a
−
=
+
+
+
+
14
429
38
70
429
38
70
/
/
./
/
/
/
/
=
100K W
/
and:
(
)
P
T
T
R
tot
j
amb
th j a
max
max
=
−
−
(
)
=
−
=
175
60
100
115
o
o
C
C
K W
W
/
.
T
T
R
R
R
R
R
P
tp
amb
th p a
th tp a
th p a
th p tp
th tp a
tot
=
+
×
+
+
×
−
−
−
−
−
using values in Table:2:
T
T
K W
K W
K W
K W
K W
P
tp
amb
tot
=
+
×
+
+
×
429
70
429
38
70
/
/
/
/
/
is simplified to:
T
T
K W
P
tp
amb
tot
=
+
×
56
/
using T
tp
= 110
o
C and T
amb
= 60
o
C the equation
becomes:
(
)
P
T
T
K W
tot
tp
amb
=
−
56
/
(
)
P
C
C
K W
W
tot
o
o
=
−
=
110
60
56
0 89
/
.
This is lower than P
tot max
= 1.15 W (for T
j max
= 175
o
C)
so in this particular case T
tp
= 110
o
C is limiting the
P
tot.max
.
Table 1 Thermal resistance values and maximum
power handling capability of surface mounted
packages.
PACKAGE
Rth j-a
(K/W)
Rth j-tp
(K/W)
Rth tp-a
(K/W)
Ptot
max (W)
SOD87
150
30
120
0.71
SOD106 (A)
150
25
125
0.68
SOT23
500
330
170
0.25
SOT89
125
15
100
0.85
SOT223
85
15
70
1.21
SOT323 (SC70-3)
625
300
325
0.20
SOT363 (SC70-6)
415
200
215
0.30
SOT457
300
150
150
0.42
SO8 (SOT96-1)
155
35
115
0.74
SO20 (SOT163-1)
100
30
70
1.21
SSOP16 (SOT338-1)
145
75
70
0.86
SSOP24 (SOT340-1)
105
35
70
1.19
Note: All thermal resistance values are typical.
50
50
7
2
25
3
Figure 4: Leaded device mounted on printed circuit
board 50 x 50 mm.
Philips Semiconductors
Power Diodes
Thermal Considerations
Table 2: Thermal resistance values for leaded packages
THERMAL
RESISTANCE
CONDITIONS
SOD57
SOD88A
SOD61
SOD64
SOD83A
SOD81
R
th j-p
(junction to package)
14
60
10
28
R
th p-tp
lead length = 5 mm
19
48
7
19
(package to tie-point)
lead length = 10 mm
38
96
14
38
lead length = 15 mm
57
144
21
57
lead length = 20 mm
76
192
28
76
lead length = 25 mm
95
240
35
95
R
th p-a
lead length = 5 mm
586
1261
417
787
(package to ambient)
lead length = 10 mm
429
843
293
527
lead length = 15 mm
338
633
225
396
lead length = 20 mm
279
507
183
317
lead length = 25 mm
237
423
154
264
R
th tp-a
notes: 1 and 2
70
70
70
70
(tie-point to ambient)
notes: 1 and 3
55
55
55
55
notes: 1 and 4
45
45
45
45
Notes:
1.
Device mounted on a 1.5 m thick epoxy-glass printed circuit board with a copper thickness > 40µm.
2.
Mounted as in Fig:4.
3.
Mounted with copper laminate per lead of 1 cm
2
4.
Mounted with copper laminate per lead of 2.25 cm
2
Philips Semiconductors
Power Diodes
Thermal Considerations
Further thermal resistance data for surface mounted power packages.
The results tabulated below are the results of a laboratory investigation into the effect of pcb pad area and
power dissipation on thermal resistance. The results were obtained with the test samples positioned vertically in
still air. As the power dissipation is increased, the thermal resistance decreases slightly. This is because, as the
power dissipation increases, the resulting higher junction temperature causes increased losses due to radiation
and natural convection.
Table 3: SOT223 PACKAGE (Rth Junction to Ambient)
HEATSINK PCB
PAD AREA (mm2)
POWER DISSIPATION (W)
0.5W
1W
1.5W
20
110
110
-
49
99
98
-
81
91
90
90
144
88
87
86
256
78
79
78
484
73
74
73
900
68
69
69
Table 4: SOT428 PACKAGE (Rth Junction to Ambient)
HEATSINK PCB
PAD AREA (mm2)
POWER DISSIPATION (W)
0.5W
1W
1.5W
2W
2.5W
3W
20
90
85
-
-
-
-
49
77
75
73
72
-
-
81
71
69
66
65
-
-
144
64
62
60
59
58
-
256
58
56
54
53
52
-
484
54
50
48
47
46
45
900
46
45
43
43
42
41
Table 5: SOT404 PACKAGE (Rth Junction to Ambient)
HEATSINK PCB
PAD AREA (mm2)
POWER DISSIPATION (W)
1W
2W
3W
103.5
60
55
-
192
52
47
-
300
47
43
41
475
41
39
37
825
39
36
34
1200
36
34
32
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