<3ortex-M3 CPU 72 MHz
JTAG/SW debug
ETM
Nested vectored interrupt controller
ARM Lite high-speed bus matrix/ arbiter
(max. 72 MHz)
1 xsysticktimer
DMA
12channels
Flash 64 to 256 KBytes l/F Flash memory | |
20 to 64 KBytes SRAM | |
£ CD co |
5 backup data |
DMA IEE |
Ethernet MAC* 10/100 wito !E 1588. Mll/RMII |
1 X IK Fuli Spi |
>B OTG 2.0 eed wito PHY |
ao< |
:k control |
ARM
max.
XTAL osdllators 40 kHz + 3—25 MHz
Intemal RC osdllators 40 kHz + 8 MHz
PLL błock (3 PLLs)
RTC/AWU
Bridge
1 x16-bitPWM synchronized AC timer
Upto 16 external interrupts
Up to 80 l/0s
1 x SPI
1 x USART/LIN Smartcard/lrDA Modem control
*Available on STM32F107 only
► g |J=. 2x12-bitDAC
„ I ^ ^ 2x 12-bitADC /1 MSPS**
^ upto16channełs
► 1-^ ► Temperaturę sensor
**2 MSPS in inter1eave modę
2x CAN 2.0B
2 x SPI/PS
4 x USART/LIN
Smartcard/lrDA Modem control
2xPC