Xilinx Design Summary glowny Project Status (04/22/2013 - 12:31:31) Project File: cw2.xise Parser Errors: No Errors Module Name: glowny Implementation State: Fitted Target Device: xc2c256-6TQ144 Errors: No Errors Product Version:ISE 14.4 Warnings: 5 Warnings (4 new) Design Goal: Balanced Routing Results:   Design Strategy: Xilinx Default (unlocked) Timing Constraints:   Environment: System Settings Final Timing Score:      Detailed Reports [-] Report NameStatusGenerated ErrorsWarningsInfos Synthesis ReportCurrentPn 22. kwi 12:31:12 201305 Warnings (4 new)0 Translation ReportCurrentPn 22. kwi 12:31:20 2013000 CPLD Fitter Report (Text)CurrentPn 22. kwi 12:31:22 201301 Warning (1 new)0 Power Report        Secondary Reports [-] Report NameStatusGenerated Post-Fit Simulation Model Report   Date Generated: 04/22/2013 - 12:33:01