Block Diagram V220 A3 C L3 V1[1] 1


RX MID CHANNELS
0-9, *, #, Send, Menu
( 26MHz for RC tuning) Keypad
GSM: CH 62 -- 947,4 MHz TRK CLK
Soft Left+Right
Matrix
EGSM: CH 37 -- 942,4Mhz
VolUp, VolDn
DIG_REG
NEPTUNE
DCS: CH 700 -- 1842,8MHz
VA, Smart
35 Power
IO_REG
U800
U150
RF_REG
ALGAE
Nav Up
L & H Tracking
19
DSP Peripherals
Band
Control
LNA B5 KBR6, KBR7 Nav Left Nav Right
20 Center
Keypad
accelerator, encryption
Tracking Osc. N
Port Nav Dwn
Timer, Interupts
22 KBC0, KBC1
S511
PWR_SW
100kHz
BB_I
27 A8 PWR/END
LNA AGC
23 RF Det.
BB
BB_IX SIM_VCC
28 B8
Out
DMA
Digital Channal K2
16
Dual ADC
DSP
SIM
Direct SIM_DIO
PMA Filters DSP GND
LNA LP Filter AAF 25 CM IN (decoupling analog GND) C9
SIM
17 K3 2
IF Amp. 2 Pole Filter Digital Memory Memory 4
Analog / Digital UltraLite Interface
(Post Mixer Amplifier)
SIM_RST
BB_Q Connector
100kHz 29 A9
Access J4
Converter If Mixer 6 3 NC
13 104 MHz
Controller SIM_CLK SIM_VCC
BB and LO J800
LNA AGC BB_QX L1 5 1
14 RF Det. 30 B9
Out
RF_REG
n
D9
3.6 - 3.9 GHz
RXRX RX_CP RX Shared Memory U700
47 D5 Synthesizer D0-15
DATA BUS
RX VCO Loop Charge
Loop
1Mbit RAM
VM_REG C4 FLASH
Pump
Phase
5 Filter
A1-24
ADDRESS BUS
RX EN 9 42 SYNTH_FD_P B6 Detect
K1
W18 CS0B B5,L4...
DIG_REG
3.4 - 3.7 GHz
External
V17
Synth F/B 720 - 915 MHz 41 SYNTH_FB_N CS1B D6
A6 Prescaler
D4 VPP
1710 - 1785 MHz
4 F3
TX VCO Memory G17 EB1
F4, K8
MCU RESET OUT
TX_CP D4
2 K16 EB0 C2
MCU
TX (from Neptune)
SPI Memory Interface
ARM7
CP
J19
R_WB F5,D5
52 MHz
880 - 915 MHz TXTX
GMSK Mod &
T16 J2,H1
OEB
44 Loop
D8
Mod DAC
4 Loop T19 BURSTCLK
HP-Filter C6
(TX) 4MB Ram
LBA
L16 E5
Filter XTAL
36 26 MHz A4
Flip
3 16 MB Flash
EXC EN N18 ECBB G7
26 MHz
Super Filter Y805
EXTAL
32 B4 Oscillator Clock Generator J902
Generator
RF_CS
1
SPI 33
2,45V N3 LCD_CS 39 4,10 IO_REG
RF_DATA
W9, U8, V7
34
P2 LCD_RS 35
MQSPI
39 3 14,15
38 7, 8, 10, 11, 15, 18, 21, 37, 43, 48 31 RF_CLK
L3,L2, ...
A10
Display LCD_DATA (0-5) 33-28
PA Control
PA_REF LSC_CLK_DATA 13
D12 M4
17 LED5
IO_2,65V (PAC)
(from U400)
TX_IN_LB B10 P1 LCD_SDATA_DATA 12
PA_DET 18 LED6
(VCC)
19 LED7
LOWB HIGH T6 (to U900)
TX_IN_HB M1 SIM_EN
FL100
MOSIA
26
TX_EN U6 F4 LOW_BATT_B (from U900)
Quard Saw Filter
MISOA (from/ to U800)
25
and Matching EURO_US W7 L1 Timer USB_DET
C13
(to U600) 24 SPI_CLK
14
N9 B15 SOFTCON
EXC_EN 23
1 CKO
MQSPI
(to U400)
EXC_EN TOUT9
15 High Band T7
22 VOUT_5V
TX VCO FRQ. RANGE
TX VCO MID CHANNELS
1900MHz (to Algae) (from/ to U50 / Fun Light CCT)
V8 TOUT11 27
21 3RED
850: 824 - 850Mhz GPIO
12 850: CH 190 - 836,6
(to U400)
G12 SC0A
3 20 3BLUE
GSM : 890 - 915 MHz GSM: CH 62 - 902,4MHz
13 High Band A13 SC1A (from J600)
19 3GREEN
1800MHz
EGSM: 880 - 915MHz EGSM: CH 37 - 897,4Mhz D14 PC12 (to U900,U920)
B+
18
8
O11 PE10 40 (from U800)
6 14 SPI_CS6
DCS: 1710 - 1785MHz DCS: CH 700 - 1747,8MHz
9 Audio 16
Low Band G10 PE11
4 RESETB
USB
Timer
900MHz PCS: CH 661 - 1880 MHz Codec (from Lightsensor) (from U900)
PCS: 1850 - 1910MHz
A14 PE12
2 SPK1
10 Interface
Interface Reset
AD / DA D19 INT5 15
1 SPK2
4
11
Low Band
PA_B+ PA_B+ E1 T12
E3 T11 V12 C14 INT0
C16
850MHz D15 C15 B17
V13
W13 G9 D3 E4 C3 W5
A17 P16 G8 D18 V11 W12 E1 D7 D1 U13
B16 A16
5,9,11,17,37 GND
Flip Switch 3,34,36,38 NC
USB_TXENB
USB_VPIN
PWR_SW
S526
USB_VMIN
4 6
32 12 33 11 34 10
USB_XRXD
USB_VPOUT
USB_VMOUT
EAGLE
Internal USB_SUSPEND
Antenna
Antenna U50 CKO
Switch SPI_CS6
(from /to U900)
SPI_CLK
(from / to J902, U50)
A11
3 2 1
MISOA
RESETB (to J902)
MOSIA
J100 AOC_DRIVE
2
High Band
CMOS
21 LOWB_HIGH
17
PA Bias
C3 D5 E3 D3
G3 H4 F5 F4 C1
LP Circuit TX_EN D2 D4
8,16
Y900
A1
4 32kHz RTC
Low Band
3 2 1 Osc.
Mux.
B1 Reset
1
LP
32,768 kHz HEAD_INT
T
C4
WDOGB B2 i
EUROB_US
19
J923 EXT_B+
FL900
m
A2 ALTN 2 3
Switch
18 EXC_EN
CHRG_ID
F9
PWR_SW e
Alert
F2 Alert 1
Control
ALTP 1 4
r Charge
PA_REF Amplifier E9 2
14
Circuit Vibrator
Connector
15 PA_DET
U902 U901
SPI
13 RF_REG
A1 SPKP A1 C1
J8
Power Detector SPK2
Matching and VCC 1
(VCC) BL_SINK Speaker
GPIO
SPKN A3 C3 R931
Combiner Network
PACII IC 2
NC J9 SPK1
C5 Amplifier Headset
Connector
CHG_DISABLE E2
HED_SPK
EXT_PWR_ON Control
F1
Charger Logic
Microphone
LOW_BATT_B A2
(from /to U920) Internal
Interface J3
Amplifier
CHRG_DETB D1
Mic
CHRG_STATE E1
HED_MIC
CHRG_SW G1 J931
H5
Aux.
Microphone
E6
CHRG_TYP
Amplifier
B6 AD2 Mux SIM_EN
AD2 C8
ADC_DATA E5
B+ Sense
D8, E8, F8
(from /to U800)
B+
ADC_SYNC F6
(TEMP) 1,325 - 100uA
VAG Regulator
PC12 D6 G6 VAG_CODEC
2,75V- 150mA
(Aud. analog funct. of Neptune & Seaweed)
Audio Reg. AUD_REG
J7
1,3V- 200mA
(RTC)
RT900 Vibrator Reg. MOTOR NC
G8
1,85/ 2,85V- 20mA
SIM Regulator B9 SIM_VCC (SIM Card)
2,75V- 200mA
V220
(Synthes., SF reg., RF& AL funct.of Algae)
RF Regulator RF_REG
D9
1,575V- 100uA
Reference Reg.
B7 COINCELL
1,875V- 200mA
J200
Digital Reg. DIG_REG_OUT
A9
2,75V- 200mA Coincell
I/O Regulator (to VM, NeptuneI/O, Displ.)
A8 IO_REG
U933
(to Flash Memory
GSM SERVICE SUPPORT GROUP 2004.04.02 4,7V- 5mA
U900 V. Multiplier A3 VM_REG for fast Flash)
(to Syn. Chargep., Switch control)
Revision Overview
DIG_REG
SEAWEED
Rev. 1.0: initial Block Diagram
LEVEL 3 Block Diagram Rev. 1.1 A8 A5 A6 A4
(VCC)
Rev. 1.1: change two R901 to R902 and R903/ change Q903to
SWITCHER
Dual Band C220 Q904
C934 C907 C908
Michael Hansen, Alexander Buehler Page 1of 2
Low Band 850 MHz
High Band 1800 MHz
Low Band 900 MHz
High Band 1900 MHz
RF_REG
25
23
27
29
ADC_N
DAC_P
DAC_N
ADC_P
SPI_CS0
IO_REG
SPI_CLK
MISOA
MOSIA
SPI_CS3
AUD_REG
CLK_32K
RESETB
WDOGB
ADC_SYNC
ADC_DATA
VAG_CODEC
STANDBY_TODAI
RESET_OUT
(to U700)
IO_REG
R990
R991
Photo Type ID
Keypad Backlight (SOM)
FUNLIGHT CCT Keypad Backlights
U400
Driver
LED1
B+
B+ C1
D6
LED
LED2
Driver DS505 DS506
NC LED_DRV_EN A7
E5
LED_GRPA_EN B6 LED3
SC0A DS503 DS504
L50
(from U800) D4
TOUT9 LED_GRPB_EN E7
LED4
DS507 DS508
E3
U50 LED5
DS509 DS510
D50 C5
LED6
IO_REG 23 3 VOUT_5V (to J932) B4
LED7
C3
ISET
RESET_OUT 18
C7
VPOUT
SPI_CS0 19 26 3BLUE A3
(from/to U800)
MOSIA 21
(from J932)
3GREEN
27
C404
MISOA 20
28 3RED
SPI_CLK 22
2,5,8,15,17,26,29 (to Display
Connector J932)
D62
D60 D61
Sign of live Circuit
SOL
E C
Q904
EXT_B+
2
3
B 1
S 3
G
Q905 IO_REG
1
D 2
Charger (SOM)
Light Sensor
USB
IO_2.65V
U600
(from U900 - If high current is set to 400mA limit. If low current is set to 900mA imit.)
CHRG_SW
R901
(from U800)
16 SOFTCON DS70
1
IO_REG
(to U900 - Charger Type indication from pull down resisor in Charger)
CHRG_TYP 14 USB_VCC
R902
7 (from/to J600) Light U70
2
9 USB_DNEG 5
4
(from U900)
IO_REG USB 10 USB_DPOS 1
Sense
R903
(Bias)
PE12 (to U800)
USB_DET (from U800) 3
Interface 8
IO_REG
1 USB_TXENB
IC
CHRG_ID
USB_VPIN
(from/ to J931) 3
USB_VMIN
(Charger ID and current setting) 4
(from/to U800)
U920
USB_XRXD
2
R913 R914
USB_VPOUT
11
DIAMONDHEAD 3
S 24-26
B+ USB_VMOUT
(Charge) (Charge and Protection) M4 12
D
F900 Pass Transistor 5 USB_SUSPEND
1,2
Fuse
(from J931) EXT_B+ VIN 6,7,15,16 M5
PNP G B+
E S D 20+21
C
Current 3 M100
J600
Q901
Under- CHG_DISABLE
S Sense
22
(from U900)
Sense Accesory
voltage
Battery
B PC12 (CHEMISTRY)
VDETECT13 Safety 28
(EXT_B+_SOL) G
&Short
Conn.
Connector
C Shunt Circuit NC
G 3
4 Protect. 1
USB_VCC
CNTRL
Charge
NPN NPN B 8 M3 4 GND
3
2
I / O USB_DNEG (from/to U600)
VPP Control
D
USB_DPOS
TOUT12 Q904 Q903
Logic 3
(Drive) 2
(to U700 19 BATT_DETB
1
(from U800)
4 SC1A (to U800)
EXT_PWR_ON
1 for fast FLash Process) E Charge
5
Control (to U900) 5-9
GND
18 CHRG_STATE
17 CHRG_DETB
9-12
D904
DIG_REG
1,2 3
V220
GSM SERVICE SUPPORT GROUP 2004.04.02
Revision Overview
Rev. 1.0: initial Block Diagram
LEVEL 3 Block Diagram Rev. 1.1
Rev. 1.1: change two R901 to R902 and R903/ change Q903to
Dual Band C220
Q904
Michael Hansen, Alexander Buehler Page 2of 2
R406


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