Temp Sensor
4
OSCM (Enable)
3 R2094
(RF TEMP Sense to Atlas) Internal
ADIN6 Logic Table
U2002
2,5
Antenna
Switch Mode TX-EN Cntrl_3 Cntrl_2 Cntrl_1
A1
Low Pwr Standby Mode 0 0 0 0
RX850 0 1 0 0
RX900 0 X 0 1
ANT_DET_B (indicates mechanical Antenna connection to U800)
DCS/PCS OUT
RX1800 0 X 1 0
TX_HB 9
J40_RF 1
RX1900 0 X 1
1 2 3
Mechanical
TX_LB 1 X 0 X
21
Antenna Switch
5
TX_HB 1 X 1 X
BP
(PA_DET to U800)
1 VSENSE
TX_LB 2
1 2 3 Power and
Antenna
GSM850/
Control
U50_PA
GSM900 OUT
PA + Antenna Switch
16 13 8 7 3 4 6
15 14
RX1900
NEPTUNE LTS
H1 IO_REG (VCC + 2.775V)
RX1800
U800 (VCC + 2.775V)
A11 PERIPH_IO_REG
DSP Peripherals Power (VCC + 1,575V)
E2 REF_REG
(to U250)
(Clock ) MCLK accelerator, encryption
T9 (VCC + 1,875V)
V5 VBUCK
( Frontend Control
RX900 (Reset ) MS
W10 SPI Timer, Interupts
and Digital Modulation)
J4
(Data In /OUT) (from Atlas )
MDI VSIM
U9
K2
(Data In /OUT) SIM VSIM (from Atlas)
SIM DIO
5
RX850
K3 6
Connector
U6
SIM RST (Reset ) GND
DSP
SIM
DSP J4 1.8 or 3V 4
2
V8 L1 Timer
from Neptune Memory (Clock )
VSIM (from Atlas )
UltraLite Interface SIM CLK
SIM Card
L1 3
( Frontend Control 1
104 MHz
SIM_PD
and Digital Modulation)
R1
(from Atlas )
(to Atlas)
M1 VSIM_EN
(PA_DET from U50)
VSENSE B10 PA Control
D0-15
DATA BUS
Shared Memory
A0-24
1Mbit RAM
ADDRESS BUS
G8 E7 D7 D4 C3 D2 B7 D6 G5 E6 C2
E8
W18 CS0B K1
U700
W7
General Purpose MCU V17
DAC2 DAC1 External CS1B G8
MCU
Output
Memory
A2 SAW/ LNA G12 T18 CS2B D6
ARM7
Memory
LNA
IIN 52 MHz
Matching VoiceBand G17 EB1B F3
A13
Interface
DAC FLASH
RX/TX ADC Sync Anti Anti Chanel
K16 EB0B C2
LPF
IBIN F8
Switch 13 bit Filter Drop Alias Filter 12 bit
A3
SAW/ LNA N10
ENR
J19
LNA R WB F4 RESET OUT (from Neptune)
F5,D5
Matching
T16
F7 OEB J2,H1,H8
Quadrature
Polyphase
DC E4... VBUCK
(from Atlas)
CLKR
T19 BURSTCLK C6
26 MHz
Mixer
Filter
A4
Correct (100KHz)
A5 SAW/ LNA (100KHz) Clock Generator
Serial LBAB E5
L16
F6 Oscillator
LNA
Interface
FSR N18 ECBB G7
Matching
Digital LO
8MB SRam
H7
QBIN 32 MB Flash
A6 SAW/ LNA DRI
LCD_RS
P2
LNA
RX/TX ADC Sync Anti Anti Chanel DAC
LCD_CS
Matching QIN LPF MQSPI N3
RX VCO Switch 13 bit Filter Drop Alias Filter 12 bit
M4 LCD_CLK_DATA6
Display
Quadrature
(LCD Control via J1300)
P1 LCD_SDATA_DATA7
D8
Generator
G1 Tx Data/ 26MHZ_OSCO OSCO_F LCD DATA (0 - 5)
L3...
G7
Analog IQ
PERIPH_IO_REG
MUX E5
OSCM (Clock enable)
F1
Reference
C5 1
(indicates mechanical Antenna connection to U800)
ANT_DET_B
Devider 2,4 U12
Y201
EDGE Analog/
GMSK EDGE C6 3
(Bias output for THERM signal)
CORDIC U10 TOUT12
Digital 26MHz
FIR
Modulator Modulator X
Phase Ampl
Select
Filter
(EL Backlight Enable via J2)
G11 EL_EN
(Data In /OUT)
F4 GPIO
RF_DATA
U8
(Clock ) (U250 Control Bus)
GMSK/ EDGE Mixer F5
RF_CLK
V7 SPI
G4 (Chip select)
( VCO Feedback )
RF_CS W9
FIN (from U1401)
HS INT
Anti
Fractional G3 On C14
Pre-Distortion
LDTO (NC)
Alias
( VCO Tuning) Off
Divider Filter ( Bias for Light Sensor
LT_SNS_CTL
( Lock Detect Out) C18
Filter
to J2
U250_SYN TX VCO VCO H3
VCO_REG
VCO1 (TX_LB) Reg
Digital One BaseBand UART2 E1 ADC DATA ( analog Light Sensor value
GSM/ EDGE B8,H2 Timer
UART / USB from J2- Keyboard Connector)
Charge Pump Voltage Keypad Serial Audio
Wire Universal
PERIPH_IO_REG
TRANCEIVER Phase Det. Reg. MQSPI
Interface Port Interface
Interface Interface Bus Asynchron.
BT
VCO2 (TX_HB)
Analog (rx) (tx)
C1,E4 Rx /Tx
PA Control
RF_REG
Voltage
TX_EN F3.... V12 W12 D18 V13 E3 T13 A12 B13 N13 D16 B15
A17 C15 D15
Reg.
F2.... W13 W5
B16 C16 A16 T11 T10 V6 W11 B12
V11 B14 G8 U13 D13 N17 V16 D19
U802
4
1 2
Neptune Atlas Neptune Atlas (from/ to U301 BT, J1300
(from/ to Neptune
USB/ RS232 Neptune Display Diver
Serial Audio for Ringtone Neptune - BT - Neptune
2
Communication
Communication and Voice Audio) Communication and Wakeup)
VRBB1 U801
Level
VRBB2
ESD
Shift
4
Revision Overview
Rev. 1.0: Initial Block Diagram
Service, Engineering & Optimization 2007.03.06
LEVEL 3 AL Block Diagram Rev. 1.0
V3_06
Page 1of 2
V3_06
( to Atlas )
TX_START
(Transmitt Enable)
(PA Power Control)
(Band select)
TX_EN
RAMP
CNTRL_1
CNTRL_2
CNTRL_3
MCLK
MS
MDI
TXI (NC)
(Receive Enable)
TX_START
RX_ANT_EN
(Transmitt Enable)
Output Mixer
Oscilator and
Clock Generator
Serial Data
Interface
Loop Filter
OSCM
(clock)
(framesync)
OWB
CLK 13 MHz
BB_SPI_MISO
BB_SPI_MOSI
AUL_CS
AUL_INT
GRAPH_SPI_CS
GRAPH_INT
STANDBY_1_5V
BB_SPI_CLK
RTS2
BLUE_WAKEB
TXD2
CTS2
KBC1-2
BLUE_HOST_WAKEB
KBR0, 3-6
USB_VPIN
USB_XRXD_RTS
USB_VPOUT_TXD
USB_VMIN_RXD
USB_TXENB
USB_SE0
RXD2
BB_SAP_RX
BB_SAP_TX
BB_SAP_FS
BB_SAP_CLK
(13 MHz)
One Wire data from Battery
(from Neptune GPIO)
STANDBY_GATEB
(Watchdog)
ATI_RESETB_2_7V
RESETB
RESET OUT
CLK 32KHZ
STANDBY_GATEB
STANDBY
(Keyboard Matrix Signals via J2)
and BT))
(to J1300)
(from Atlas)
(to U700)
(to Atlas)
WDOG
(to Atlas and
U802)
(from/ to Atlas
(VCC)
B4
Keyboard Flex Connector C4
IO_REG
C2
C1
(from Atlas)
A4 NC
VBUCK
A2
A1
NC
A3 C3
Q960
J2_KEYBRD
ATI_RESETB_2_7V 50 49 GND
Hall Effect
BB_SPI_MISO 48 47 REG_3V
Switch
(from/ to Atlas)
(from/ to Neptune) BB_SPI_MOSI 46 45 RTC_BAT
U1401
BB_SPI_CLK 44 43 IO_REG_FLIP (from Q960)
(from Atlas) 5
PERIPH_IO_REG
41 GND
GRAPH_SPI_CS 42
(from Neptune)
2 40 39 EL_EN
SIM Block
Bluetooth
(from Atlas)
GRAPH_INT 38 37 REG_3V
(on PCB)
HS_INT 4
LCD_SDATA_DATA7 36 35 GND
Strip Line
(to U800)
LCD_RS 34 33 GND
Antenna (Flip Open/ Close
Detect) 32 31 HAND_SPKRM
LCD_DATA3
(from Atlas)
BT_FEED
LCD_DATA5 30 29 HAND_SPKRP
LCD_CS 28 27 GND
J4_SIM
LCD_DATA2 26 25 CLK_32KHZ_2_7V (from Atlas)
SIM_CLK R1202 SIM_DIO
R1201
24 23 GND
LCD_CLK_DATA6
Neptune Atlas
(from U800) (to/from U800)
(from/ to Neptune)
(from Q960)
Communication 22 21 VBUCK_FLIP
LCD_DATA1
SIM_RST
R1214 Bluetooth
TXD2 5 LCD_DATA0
20 19 GRAPH_REG GRAPH_REG_AUL (from Atlas)
(from U800)
18 17 GND
LCD_DATA4
GND RXD2 33
25
VSIM
R1213
(Bias from Neptune)
KBR6 16 15 LTS_SNS_CNTL
(from Atlas)
CTS2 29
10, 18, 19 PERIPH_IO_REG KBR4 14 13 GND
(from Atlas)
RTS2 31
(Neptune/BT
12 11
21 BTRF_REG KBR3 ADC_DATA (toNeptune)
Communication and Wakeup)
KBR5 10 9
LEDB1
11 U300_SYM
BLUE_WAKEB (to Atlas)
KBR7 8 7
PWR_SW
BLUE_HOST_WAKEB 9 16
1 6 5
KBC0 KBC1
KBR2 4 3 (from/ to Neptune)
KBR0
Y301 26MHz
KBR1 2 1
KBC2
RESETB
(from Neptune/Atlas)
15
3 G1- G4
22 GND
CLK_32KHZ
(from Atlas)
12
27 28 30 32
BB_SAP_RX U950_DNP
BB_SAP_FS (framesync) CTS1 1
(from/to Neptune 4
Serial Audio for Ringtone
BB_SAP_CLK(clock) 2, 5
and Voice Audio)
Neptune Atlas
BB_SAP_TX
USB/ RS232 Charger and Power-
BATT CONN.
Communication
source Control
J3_BATTERY
Charger
2 3 1 4
(from Acesory Connector)
(EXT Power)
VBUS
(One Wire Bus
to Neptune)
OWB GND
T13
(from J4)
T14 SIM_PD
13 Bit SAP (tx) (rx) C15 CHRGRAW_PM (VBUS Sense)
PRI SPI
V10
ALERTM USB/RS232 CNTL. ON AD
PCB ESD
Alert CODEC P13 TOUT12
(Bias Voltage from
THERM THERM
NeptuneAtlas LOGIC
ALERT Neptune)
ALERTP Amplifier 16 BIT (Battery Sense)
VR1400 U8 D14 BATTP
Pads (communication) Neptune Atlas LOGIC CONV.
STEREO
(Batt Current)
Communication U14 ISNS_PM
D/A
(Charge Current - )
Handset F13 ISNS_PM
HAND_SPKRM T6
(to J2)
Amplifier (Charger Current + )
E15 CHRGISNSP_PM
HAND_SPKRP R7
(sensing pt)
Q905 (M1) S
P9
4 MICBIAS1 G
Internal Color definition only for this section !
MIC
Microphone
CHARGE
3 MICINM
T9 (Current Control) Main Charge Path
B16 CHRGCTRL_PM
Supply R910 R911
CONTR.
B+ support without Ext Charger
CHRGCOMMON_PM D
Amplifier B+ support with Ext Charger
S
Q906 (M2)
D
G
L10 CHRG_LED_SINK ??
G
Headset
SQ904 (M3)
(Main Source
NC B12
BATTFET_PM
BP
Amplifier
Logic for Atlas)
BPFET_PM
B14
Stereo Battery to BPLUS
NC
D
Det. Switch
G
Mini USB Headset Q903 (M4)
NC LED
Det.
(to Display Backlight via V2)
CNTL.
E10 LEDB1
S
(to Charging Circuit)
1 VBUS
??
VBUS to BP
D10 LEDG1
Switch
(from Mini USB Connector)
(from Atlas) VBOOST B4 VBUS 5V
U900
D903
ESD (EXT Power)
(PPD device support) Pass FET VBUS
VR960 VBUS D2
ATLAS UL
D12 (from J2 ??)
RTC_BATT_DNP
USB
V17
(Accessory Detection signal)
H8
4 USB_ID
VR950
EMU
F3 Y900 (32.768KHz)
DM_TXD
2
VR922A
Interface
E3
DP_RXD V16
3
VR921A
R16 CLK_32KHZ (to Neptune and U300 BT)
5 TIMER
P16 CLK_32KHZ_2_7V (to J2, peripheral clock)
(from Neptune) (clock input for audio bus)
V12 CLK 13 MHZ
G1-G4
(from Neptune)
WDOG
K10
(from Neptune, Tx Mode indication for Atlas)
(Shield) TX_START
U15
(inverted output of standby pin??)
P14 OSCM
(from U800)
STANDBY
F12
( to Neptune and U700??)
E12 RESETB
4 4
3 3
1 1
Revision Overview
Rev. 1.0: Initial Block Diagram
2
Service, Engineering & Optimization 2007.03.06
LEVEL 3 AL Block Diagram Rev. 1.0
V3_06
Page 2of 2
1
V3_06
R1401
(from J2)
(USB D-, RS323 Tx)
(USB D+, RS323 Rx)
(from U2002)
(rx)
(RF TEMP Sense)
(Bias)
PERIPH_IO_REG
PERIPH REG
VR50
D1426
AUL CS
DP_RXD
USB_ID
USB_VPIN
USB_XRXD_RTS
DM_TXD
ADIN6
BB_SAP_TX
BB_SAP_FS
BB_SAP_RX
(tx)
BB_SAP_CLK
BATTP
R905
R5
R4
B3
USB_TXENB
F3
E4
USB_SE0
C4
F4
USB_VPOUT_TXD
E3
P4
R3
B2
B1
USB_VMIN_RXD
H8
F14
PWR_SW
T17
BB_SPI_CLK
T18
BB_SPI_MOSI
N14
AUL_INT
U18
U16
BB_SPI_MISO
B+ Sense
J1_USB
REG
REG
REG
REG
VSIM
Switcher
Switcher
IO REG
AUDIO
PERIPH
IO REG
GRAPH
RF REG
to Vibrator
BT REG
REF REG
Buck 350mA
CAMERA
VIB REG
Boost 300mA
V2
P2
Motor
N5
H3
H4
K17
U6
H2
F16
G16
K11
F3,E13........
Q943_DNP
Q910_DNP
VBTPADRV
M4
VCO_REG_CNTL_PM
VCO
BP
VSIM_EN
( 2,775V )
PERIPH_IO_ REG
( 2,775V )
RF_REG
( 2,775 )
IO_REG
( 1,8/ 3V )
V_SIM
( 1,875V )
BTRF_REG
K2
( 2,775V )
AUD_ REG
( 1,575V )
REF_REG
L16
( 1,275 )
GRAPH_REG
M18
( 5,5V )
VBOOST
( 1,875V )
VBUCK
(to J2)
( 3,10V )
REG_3V
(to J2)
(to U250)
(to U300)
( 2,775V )
VCO_REG
( 3,00V )
VCC_BTPA
(to Neptune)
AL circuit)
Vib. Motor
( 1,3V )
VVIB
( Atlas, Neptune,
(Atlas internal and
U700, Q960,U801)
(only used in Atlas)
(only used in Atlas)
(to Neptune amd J4)
(Main Source- from Q904)
(to U250)
(only used
in Atlas)
(to Atlas, Neptune, Q960)