BD V3 L3 C A3 V1[1] 2


RX MID CHANNELS
850: CH190 -- 881,6
GSM: CH 62 -- 947,4 MHz
EGSM: CH 37 -- 942,4Mhz
DCS: CH 700 -- 1842,8MHz
PCS: CH 661 -- 1960MHz
TRK_OSC_OUT ( 26MHz for Digital IF Filter syncronisation)
NEPTUNE LTS
35
U800
U150 (VCC + 1,875V)
M17 VBUCK
ALGAE
L & H Tracking
19
(VCC + 2.775V)
IO_REG
DSP Peripherals POWER A11
Band
Control
LNA B5
20
accelerator, encryption (VCC + 1,8V)
Tracking Osc. N VCC_OUT
E2
Timer, Interupts
22
100kHz
BB I JSIM
27 A8 VSIM
LNA AGC
23 RF Det.
K2
BB
SIM
SIM DIO
BB IX
28 B8
Out K3 6
DMA Connector
Digital Channal
16
Dual ADC SIM RST GND
DSP
SIM
Direct
PMA CM IN Filters DSP J4 1.8 or 3V
LNA LP Filter AAF 26 (decoupling analog GND) C9 2 4
17
IF Amp. 2 Pole Filter Digital Memory Interface SIM CLK
Memory
Analog / Digital UltraLite
(Post Mixer Amplifier) SIM Card3,5 VSIM
L1
BB Q
100kHz 29 A9 1
Access
Converter If Mixer
13 104 MHz
SIM PD
Controller
BB and LO R1
(from PCAP )
LNA AGC BB QX
14 RF Det. 30 B9
Out
RF REG
n D9 D0-15
3.6 - 3.9 GHz DATA BUS
RX RX Shared Memory
47 RX_CP D5 Synthesizer
A1-24
RX VCO Loop Charge ADDRESS BUS
1Mbit RAM
C4
Filter RF_5V_REG Pump
Phase
5
RX EN 9 42
SYNTH_FD_P B6 Detect
3.4 - 3.7 GHz
Synth F/B 720 - 915 MHz 41 SYNTH_FB_N A6 Prescaler
1710 - 1785 MHz VBUCK E4,B6...
4
TX VCO U700
MCU
TX_CP D4
2 External
MCU
TX
Memory
G17 EB1_B F3
ARM7
Memory (from Neptune)
CP
K16 EB0_B C2
52 MHz
880 - 915 MHz TX
GMSK Mod & F4
Interface RESET OUT
W18 K1
44 Loop CS0B FLASH
TX_MOD
D8
Mod DAC
V17
4 HP-Filter CS1B D6
Filter
(TX) J19
R WB
XTAL F5,D5
36 26 MHz A4
3
T16
EXC EN OEB J2,H1,H8
D4
26 MHz
Super Filter Y805
T19 BURSTCLK C6
EXTAL
32 B4 Oscillator Clock Generator
LBAB E5
Generator L16
RF_CS
B5
1
SPI 33
N18 ECBB
2,45V G7
RF_DATA
U8, V7, W9
4MB Ram
34
39 LCD_RS
38 7, 8, 10, 11, 15, 18, 21, 37, 43, 48 31 RF_CLK 3 P2
32 MB Flash
A10
N3 LCD_CS
MQSPI
PA Control
PA_REF M4 LCD_CLK VBUCK
D12
Display
NEP_IO_REG (PAC) P1 LCD_SDATA (LCD Control )
TXIN_LB PA_DET
B10 LCD DATA (0 - 5)
L3...
(VCC)
LOWB_HIGH T6
TXIN_HB D14 ( to EL Backlight Circuit)
EL_EN (from / to Keyboard Connector)
FL100
TX_EN U6 (from Light Sensor )
E1 ADC_DATA
Quard Saw Filter R80
and Matching EUROB_US W7 L1 Timer C14
HS INT (Open / Close Detect)
R81 Match
( Light Sensor Control)
14 C18 LT_SNS_CTL
Match EXC_EN N9
1
EXC_EN
15 High Band (to Pcap)
VSIM_EN
SPI M1
(to PCap / Charger)
(to Algae)
1900MHz ( to Charger)
MIDRATE_CTRL
TX VCO FRQ. RANGE C13
TX VCO MID CHANNELS
GPIO
12
(from Frontend)
3 ANT_DET_B
850: 824 - 850Mhz U12
850: CH 190 - 836,6
13 High Band (from / to RF Circuit)
( to U150)
V6 RX_EN
GSM : 890 - 915 MHz GSM: CH 62 - 902,4MHz
1800MHz
8
(to Switch BP Circuit)
T7 SWBP_EN
EGSM: 880 - 915MHz EGSM: CH 37 - 897,4Mhz
6
(to U906)
9 T13 USB_EN
Low Band
DCS: 1710 - 1785MHz DCS: CH 700 - 1747,8MHz
(from U911)
900MHz PPD_DETB
W8
10
PCS: 1850 - 1910MHz PCS: CH 661 - 1880 MHz (from U910)
V14 SNP_INTB
4
(to Q957)
11 One BaseBand UART2
Low Band U10 SNP_INT_CTL (from / to EMU Bus)
BP BP
UART / USB Timer
Keypad Serial Audio
850MHz Wire Universal (to Q956)
B17 CHRG_DET_PU
MQSPI
Port Interface
Bus BT
Internal Interface Interface Interface Asynchron.
(to U1400)
G11 MUX1
(rx) (tx)
Rx /Tx
Antenna
(toU1400)
G10 MUX2
A17 C15 D15 E3....
V12 W12 D18 V13 U13
A12 B13 N13 D16 B15
(toD7614)
G3.... W13 E3 W11 B12
B16 C16 A16 T11 V11 B14 G8 W5 D13 N17 V16 D19 A14 FACT_DET
T10
4 6
A1 32 12 33 11 34 10
(to U800)
EAGLE
ANT_DET_B
Antenna
U50
Switch
3 2 1
J40
Mechanical
Antenna Switch
AOC_DRIVE
2
High Band
CMOS
21 LOWB_HIGH
17
PA Bias
LP Circuit TX_EN
8,16
Neptune PCap Neptune PCap (from/ to U301 BT,
(from/ to Neptune
Low Band
USB/ RS232 Neptune Camera
3 2 1 Serial Audio for Ringtone Neptune - BT - Neptune
Communication
Communication and Voice Audio) Communication and Wakeup)
U801
LP
Buffer
EUROB_US
19
U804
Switch
18 EXC_EN
Buffer
Control
PA_REF
14
Circuit
15 PA_DET
13 RF_REG (VCC)
Power Detector
Matching and VCC
Combiner Network
PACII IC
GSM SERVICE SUPPORT GROUP 2004.08.31
LEVEL 3 AL Block Diagram Rev. 1.2
Revision Overview
V3
Rev. 1.0: Initial Block Diagram
V3
Rev.1.1: updated page 3 Table Michael Hansen, Alexander Buehler Page 1of 3
Low Band 850 MHz
High Band 1800 MHz
Low Band 900 MHz
High Band 1900 MHz
(VCC)
RF_REG
25
23
27
29
(clock)
(framesync)
OWB
WDOG
STANDBY_1_5V
One Wire data from Battery
CLK 13 MHz
BB_SPI_MISO
BB_SPI_MOSI
PCAP_CS
PCAP_INT
BB_SPI_CS6
GA_INT
BB_SPI_CLK
(from PCap)
RESETB
RTS2
BLUE_WAKEB
TXD2
CTS2
(Watchdog)
KBC0-1
BLUE_HOST_WAKEB
KBR0-7
USB_VPIN
USB_XRXD_RTS
USB_VPOUT_TXD
USB_VMIN_RXD
USB_TXENB
USB_SE0
RXD2
BB SAP RX
BB SAP TX
BB SAP FS
BB SAP CLK
(to U700)
RESET OUT
(13 MHz)
STANDBY
(to U900)
(from PCap)
CLK 32KHZ
(to Keyboard Connector0)
RESET_OUT_2_7V
KEYBOARD
CONNECTOR
KEYPAD
J_KEYBRD
MATRIX
0-9,*,#,
GND
RESET_OUT_2_7V 50 49
IO REG
(from/ to Neptune) BP Up, Down
BB_SPI_MISO 48 47
RTC_BATT
BB_SPI_MOSI 46 45 Left-Right,
ATI_CAM_IO
BB_SPI_CLK 44 43 Center,
BB_SPI_CS6 42 41 GND Soft L+R,
U1401
HS_INT HS_INT 40 39 EL_EN Menu, Send,
(from/ to PCap)
GA INT 38 37 EL_SUPPLY Volume U-D
INVERTER
GND
LCD_SDATA 36 35 Smart, VA
GND
LCD_RS 34 33
HAND_SPKRM
LCD_DATA3 32 31
Power/
HAND_SPKRP
LCD_DATA5 30 29
Antenna
GND Send-End
LCD_CS 28 27
CLK_32KHZ_2_7V
LCD_DAT2 26 25
GND (from PCap 1,3V from Vibrator Regulator)
BT_FEED LCD_CLK 24 23
Main and
LCD_DATA1 22 21
VBUCK
(from Neptune)
CLI Display
(from/ to PCap)
LCD_DATA0 20 19
IO REG
LCD_DATA4 18 17
GND
VGA
KBR5 16 15
LT_SNS_CTL (from Neptune)
Camera
KBR4 14 13
GND
Bluetooth
KBR3 12 11 (to Neptune - Lightsensor Status)
ADC_DATA
EL
TXD2 KBR5 10 9 (from PCap - drivesBlueTooth Status LED)
BT_STAT
4
U300 33
Backlight
KBR7 8 7 (from PCap)
RXD2 ANTENNA PWR_SW
41
KBC0 6 5
(from/ to U301 BT, 10 IO_REG KBC1
CTS2 37
KBR2 4 3 RTC
Neptune - BT - Neptune KBR0 (from/ to Neptune)
21 BTRF_REG
Communication and Wakeup) RTS2 39
KBR1 2 1 KBC2
Coincell
24,26,28 VCC_PA
BLUE_WAKEB
10 IO_REG
11 D800
16 G1-G4
BLUE_HOST_WAKEB
BT
9 (GND)
BT Crystal
Y301
Status LED
26 MHz
RESETB
(from Neptune/ PCap) 15
29
Loud-
CLK 32KHZ
(from PCap)
12
Speaker
35 36 38 40
BB_SAP_RX
BB_SAP_FS (framesync)
(from/ to Neptune
Serial Audio for Ringtone
BB_SAP_CLK(clock)
and Voice Audio)
Neptune PCap
BB_SAP_TX
USB/ RS232
Communication
Neptune PCap
Communication
L / H / H
USB_PWR
BATT CONN.
Internal
Battery
MIC
J_BATT
Charger
J41 J2
4 MIC_BIAS1 (tx) (rx) (from EMU Bus)
(tx) (rx) PRI SPI R6
AD6
SEC SPI
2 3 1 4
USB/RS232 CNTL. ON
1 INT_MICP CODEC POWER T16 (External B+ Sense) (One Wire Bus
H2 CNTL. USB_PWR
CODEC
IO Neptune PCap LOGIC AD to Neptune)
13 BIT R17 (Battery Sense)
16 BIT LOGIC FAIL DET. CONV. BATT+
(communication) Neptune PCap LOGIC
OW_B GND
PHONE T15
STEREO Communication VBUS (Over Volt. Sense)
A/D
U5 THERM
BATTP
AUDIO
HAND SPKRM
(to PCap AD Converter)
M13 ISENSE
J4 AMPL.
(to J_KEYBRD)
HAND SPKRP
Color definition only for this section !
K2
Q958 D958 H / H / H
Main Charge Path
ALERT- S L / H / H
F1 (to Neptune) B+ support without Ext Charger
Alert CHARGE K13 SIM_PD
G
ALERT+
B+ support with Ext Charger Full -Rate
CHRGC
CONTR. R15 D
Speaker H1
B+ support with Ext Charger Mid - Rate
THERMBIAS
Q250
D
N8 G2
K3
G
HJACK_SPKR_L S2 L / H/ L H / H/ H
MAIN_FET
L / H/ L
S
N15
HJACK_SPKR_R L2 IO
(from/ to U1400) BP (Key Source
for PCap IC)
(from Neptune) Q951
W21 MIDRATE2 Q953-2 D1 D2
AUDIO_IN K7
Logic D2 Battery to B+
H / L/ H
OVER
OV GATE Switch (from Neptune )
U900 MIDRATE_CTL
VOLT.
N13 H / L/ H
(from Q957 - EMU Interface)
USB_VBUS B3
D952
PCAP3 Q952
S1 D
CNTL.
USB G1 G2 S2 USB_PWR
B4
DP_RXD_OUT G B1
(from/ to U1200) LED J16 BT_STAT (to Staus LED in Flip)
INTERF. CHRG_DET(from U216)
A5
DM_TXD_OUT CNTL. J15
NC
L / H / H
D1 C2
S1
USB_PWR to BP Switch
H / L / H S U912
BACKl.
Only for Full Rate Charger Mode
NC K17 NC Q953-1
TOUCH
CONTR.
L / H / L
NC
SCREEN T11 (from Keyboard Connector)
RTC_BATT
NC
INTERF.
LCELL_BYP
T10
NC C935
U8
MEMORY
U13 Y900
HOLD
OV GATE H / L / L D L / H / H
G
U10
USB_PWR
TIMER (Overvoltage Protection)
(to PCap AD Converter
M9 STANDBY
and internal Charger)
S
USB_PWR_IN to USB_PWR Q954
WDOG
H12
L / H / H
SWITCH
TX_EN
P15 USB_PWR_IN
OV_SENSE
L12 RESETB
V10 V9 V8 V7 V6 V5 V4 V3 V2 V1
C2 CLK 13 MHZ IO_REG
Buffer
CLK_32KHZ
T7 CLK_32KHZ_2_7V
(to Neptune and U301 BT)
U902
CLK_32KHZ
(to Neptune )
J_VIB
BP
GSM SERVICE SUPPORT GROUP 2004.08.31
LEVEL 3 AL Block Diagram Rev. 1.1
Revision Overview
V3
Rev. 1.0: Initial Block Diagram
V3
Rev.1.1: updated page 3 Table
Michael Hansen, Alexander Buehler Page 2of 3
FL301
BB_SPI_MISO
PCAP CS
USB_VPOUT_TXD
BB_SAP_TX
BB_SAP_FS
BB_SAP_RX
BB_SAP_CLK
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
(Bias)
F6
F5
H7
H8
IO_REG
P8
BB_SPI_MOSI
R7
M8
BB-SPI_CLK
G7
USB_VPIN
C6
USB_XRXD_RTS
C5
G8
USB_VMIN_RXD
E5
USB_TXENB
F7
USB_SE0
K9
L10
PCAP INT
J12
PWR SW
R958
DET.
STEREO
R954
(from Neptune)
VIB
VSIM
Switcher 3
Switcher 2
Switcher 1
B+ Sense
to Vibra
DRIVE
Boost Mode
Buck Mode
C10
B10
AUX4
B7
E10
A6
A7
G17
H15
F17
U1
H17
D10
F10
F15
L17
H14
G16, U3..........
NC
Buck Mode
NC
N19
NC
K20
VVIB
B
3
Q943
Q943
C
2
1
Vibrator
VSIM_EN
VHOLD_EXT_EN
BP
E
AUD_ REG
VCC_OUT
VCC_PA
( 2,775V )
IO_REG
( 2,775V )
VDDA
(not used)
( 2,775V )
ATI_CAM_IO
( 1,8V )
BTRF_REG
( ????? )
EL_SUPPLY
M17
AUX4
( 1,8/ 3V )
VSIM
( 5,0V )
RF_5V_REG
( 2,775V )
RF_REG
( 1,275 )
GA_VCC
( 5,6V )
VBOOST
( 1,875V )
VBUCK
( 1,575V )
REF_REG
Pin Number Normal USB Factory Test & High Voltage Flash Mono Accessory Stereo Accessory Dumb PPD *3 Dumb Mid-Rate Dumb Fast Charger Battery Powered Software Regression MPx Mid-Rate MPx Dual-Rate VPA
Flash
Acc. Charger (500mA) (1,25A) Testing Charger (450mA) (450/850mA)
1 VBUS VBUS VBUS Phone PPD Level Phone PPD Level Phone PPD Level 5V 5V VBUS VBUS 5V 5V
2 DM_TXD DM_TXD DM_TXD HJACK_SPKR_L HJACK_SPKR_L DM_TXD Short to DP_RXD Short to DP_RXD DM_TXD DM_TXD DP_RXD DP_RXD
3 DP_RXD DP_RXD DP_RXD AUDIO_IN HJACK_SPKR_R DP_RXD Short to DM_TXD Short to DM_TXD DP_RXD DP_RXD DM_TXD DM_TXD
4 Open (2,8V) 4,75-5,25 *1, 3,0- Open (2,8V) 102 K OHm +/- 1% 102 K OHm +/- 1% 102 K OHm +/- 1% 200 KOHm +/- 1% 440 KOHm +/- 1% 440 KOHm +/- 1% 200 KOHm +/- 1% 100KOHm +/- 1% 10 KOHm +/- 1%
(ID) 3,3V *2 (Powers on the phone)
5 GND GND GND GND GND GND GND GND GND GND GND GND
Shield GND GND GND GND GND GND GND GND GND GND GND GND
Signal Name
USB_ID Open (2,4V) 5V 9V Open (2,4V) Open (2,4V) 0V 1,225V 1,68V 1,68V 1,225V 0,82V 0,1V
AD6 2,4V 3,4V 3,5V 2,4V 2,4V 0V 1,225V 1,68V 1,68V 1,225V 0,825V 0,1V
PPD_DETB High High High High High Low High High High High Low Low
SMP_INTB High High High High High Low High High High High High Low
FACT_DET Low High Low Low Low Low Low Low Low Low Low Low
CHRG_DET Low High Low Low Low Low High High Low Low High High
MUX1 Low Low Low High High Low Low Low Low Low Low Low
MUX2 Low Low Low Low High Low Low Low Low Low Low Low
CHRG_DET_PU High Low Low Low Low Low Low Low Low Low Low Low
USB_EN Low Low Low Low Low Low Low Low Low Low Low Low
USB_PWR High High High High High High High High High High High High
USB_VBUS 5V 5V 5V Phone PPD Level Phone PPD Level Phone PPD Level 5V 5V 5V 5V 5V 5V
SNP_INT_CTL High High High High High High High High High High High High
Note:
V3 does not support
U1400
MUX1
Stereo Audio
(from Neptune)
13
MUX2
AUDIO_IN Fast Fash Mode
MUX1 MUX2
12
USB  on the go
0 0
USB Mode
0 0
UART Mode 3
( from / to PCAP)
0 1
Not used
1 0
Mono Headset/ Carkit
15
1 1
Stereo Mode
HJACK_SPKR_L
7
HJACK_SPKR_R
EMU (Enhanced Mini USB) INTERFACE
4 8
RESET_B
U1200
J_USB
LDP_DM ( VCC - to PCap)
USB_VBUS
Power to
EMU SENSE INTERFACE
PCap
(Enables USB_VBUS to PCap Inerface)
DM_TXD_OUT
2
(U910, U911, U913,
Filter
USB_EN
USB Bus
U915, U916, Q956, Q957)
(Enable Pull Up Voltage to DP_RXD)
3
DM_RXD_OUT
CHRG_DET_PU
For details please
(Phone Powered Device Detect - to U800)
DM_TXD PPD_DET_B
(Data Minus / Transmit Data) see Schematic
Charger
Detect
(Signal Navigation Protocol Interrupt- to U800)
SNP_INTB
(Data Plus / Receive Data) Detect
DP_RXD and
(Factory Detect- to U800)
FACT_DET
Interupt
(Enables R984 as Test-Resistor on USB_ID, and used to mute SIHF by a pull down on USB_ID line) (Charge Detect- to U800)
CHRG_DET
SNP_INT_CTL ID Sense
(Analog /Digiatl Converter 6 - to PCap)
AD6
4 and Test
USB_ID
(to Charging Circuit) D960
1 VBUS U950
C3
BP In
Switch BP Circuit
A1 C1
EMU_3_3V En EMU_2_8V
1 USB_PWR
5
BP
In
6 USB_PWR Mode
Out
( from Neptune) A3
3
G1-G4
SWBP_EN
Switch
(Shield)
U7607
U901 2
4
In
5
Out EMU_3_3V
VBOOST
U951
Regulator
GSM SERVICE SUPPORT GROUP 2004.08.31
LEVEL 3 AL Block Diagram Rev. 1.1
Revision Overview
V3
Rev. 1.0: Initial Block Diagram
V3
Rev.1.1: updated page 3 Table
Michael Hansen, Alexander Buehler Page 3of 3
DP_RXD
DM_TXD


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