BD V3i A3 C L3 1 0


RX MID CHANNELS
Internal
850: CH190 -- 881,6
Antenna
GSM: CH 62 -- 947,4 MHz
EGSM: CH 37 -- 942,4Mhz
A1
DCS: CH 700 -- 1842,8MHz
PCS: CH 661 -- 1960MHz
ANT_DET_B (indicates mechanical Antenna connection to U800)
DCS/PCS OUT
TX_HB 9
J40 Mechanical
1 2 3
Antenna Switch
21
5
BP
(PA_DET to U800)
1 VSENSE
TX_LB 2
1 2 3 Power and
Antenna
GSM850/
Control
U50
GSM900 OUT
PA + Antenna Switch
16 13 8 7 3 4 6
15 14
1900 MHZ
NEPTUNE LTS
H1 IO_REG (VCC + 2.775V)
1800 MHz
U800 (VCC + 2.775V)
A11 PERIPH_IO_REG
DSP Peripherals Power (VCC + 1,575V)
E2 REF_REG
(to U250)
(Clock ) MCLK accelerator, encryption
T9 (VCC + 1,875V)
V5 VBUCK
( Frontend Control
900 MHz (Reset ) MS
W10 SPI Timer, Interupts
and Digital Modulation)
J4
(Data In /OUT) (from Atlas )
MDI VSIM
U9
K2
(Data In /OUT) SIM VSIM (from Atlas)
SIM DIO
5
850 MHz
K3 6
Connector
U6
SIM RST (Reset ) GND
DSP
SIM
DSP J4 1.8 or 3V 4
2
V8 L1 Timer
from Neptune Memory (Clock )
VSIM (from Atlas )
UltraLite Interface SIM CLK
SIM Card
L1 3
( Frontend Control 1
104 MHz
SIM_PD
and Digital Modulation)
R1
(from Atlas )
(to Atlas)
M1 VSIM_EN
(PA_DET from U50)
VSENSE B10 PA Control
D0-15
DATA BUS
Shared Memory
A0-24
1Mbit RAM
ADDRESS BUS
C3 D2 D6 G5 E6 C2
B7
G8 E7 D7
E8
W18 CS0B K1
U700
W7
MCU V17
DAC1 External CS1B G8
GPIO
MCU
Memory
A2 G12 T18 CS2B D6
SAW/ LNA
ARM7
Memory
LNA
IIN 52 MHz
Matching VoiceBand G17 EB1B F3
A13
Interface
RX/TX ADC Sync Anti Anti Chanel DAC FLASH
K16 EB0B
LPF C2
IBIN F8
Switch 13 bit Filter Drop Alias Filter 12 bit
A3
N10
SAW/ LNA ENR
LNA J19 F4 RESET OUT (from Neptune)
R WB
F5,D5
Matching
T16
F7 OEB
Quadrature J2,H1,H8
Polyphase
DC (from Atlas)
CLKR E4... VBUCK
T19 BURSTCLK C6
Mixer 26 MHz
Filter
Serial
Correct (100KHz) A4
A5 SAW/ LNA (100KHz) Clock Generator
LBAB E5
L16
F6 Oscillator
LNA Interface
FSR N18 ECBB G7
Matching
8MB SRam
H7
QBIN 32 MB Flash
A6 SAW/ LNA DRI
LCD_RS
P2
LNA
RX/TX ADC Sync Anti Anti Chanel DAC
LCD_CS
Matching QIN LPF MQSPI N3
Switch 13 bit Filter Drop Alias Filter 12 bit
M4 LCD_CLK_DATA6
Display
Quadrature
(LCD Control via J1300)
P1 LCD_SDATA_DATA7
G1 Generator
D8 26MHZ_OSCO OSCO_F LCD DATA (0 - 5)
L3...
Digital TX
G7 PERIPH_IO_REG
Interface
E5
F1 OSCM (Clock enable)
Reference
1
(indicates mechanical Antenna connection to U800)
ANT_DET_B
Devider C5 2 U12
Y201
EDGE
GMSK EDGE 3
(Bias output for THERM signal)
U250 U10 TOUT12
C6 26MHz
FIR
Modulator Modulator
GSM/ EDGE Filter
(EL Backlight Enable via J2)
G11 EL_EN
(Data In /OUT)
TRANCEIVER GPIO
F4 RF_DATA
U8
Hall Effect
(Clock ) (U250 Control Bus)
GMSK/ EDGE Select
F5
RF_CLK
V7 SPI Switch
(Chip select)
( VCO Feedback ) G4
RF_CS W9
4
(Flip Open/ Close
FIN
HS INT
On C14 U1401
Pre-Distortion Anti Detect)
Devider LDTO (NC)
G3
( VCO Tuning) Off
Filter Alias ( Bias for Light Sensor
LT_SNS_CTL
C18
( Lock Detect Out) 2
to J2
VCO1 (TX_LB) PERIPH_IO_REG
One BaseBand UART2 E1 ADC DATA ( analog Light Sensor value
Timer
UART / USB from J2- Keyboard Connector)
CP Keypad Serial Audio
Wire Universal
ADC H3
VCO_REG MQSPI
Phase Det. Interface Port Interface
Interface Interface Bus Asynchron.
BT
VCO2 (TX_HB) Voltage
G7.. PERIPH_IO_REG
(rx) (tx)
Rx /Tx
Reg.
PA Control
C1..
RF_REG
TX_EN
A17 C15 D15 F3.... V12 W12 D18 V13 E3 T13 A12 B13 N13 D16 B15
(VCC s from Atlas)
F2.... W13 W5
B16 C16 A16 T11 T10 V6 W11 B12
V11 B14 G8 U13 D13 N17 V16 D19
U802
4
1 2
Neptune Atlas Neptune Atlas (from/ to U301 BT, J1300
(from/ to Neptune
USB/ RS232 Neptune Display Diver
Serial Audio for Ringtone Neptune - BT - Neptune
2
Communication
Communication and Voice Audio) Communication and Wakeup)
VRBB1 U801
Level
VRBB2
ESD
Shift
4
Revision Overview
Rev. 1.0: Initial Block Diagram
Servive, Engineering & Optimization 2005.07.18
LEVEL 3 AL Block Diagram Rev. 1.0
V3 (Razor05) / V3i
V3i /Razor05
Alexander Buehler, Michael Mauderer Page 1of 2
( to Atlas )
TX_START
(Transmitt Enable)
(PA Power Control)
(Band select)
TX_EN
RAMP
CNTRL_1
CNTRL_2
CNTRL_3
MCLK
MS
MDI
TXI (NC)
(Receive Enable)
TX_START
RX_ANT_EN
(Transmitt Enable)
Output Mixer
Oscilator and
Clock Generator
Serial
Interface
Loop Filter
OSCM
(clock)
(framesync)
OWB
CLK 13 MHz
BB_SPI_MISO
BB_SPI_MOSI
AUL_CS
AUL_INT
GRAPH_SPI_CS
GRAPH_INT
STANDBY_1_5V
BB_SPI_CLK
RTS2
BLUE_WAKEB
TXD2
CTS2
KBC1-2
BLUE_HOST_WAKEB
KBR0, 3-6
USB_VPIN
USB_XRXD_RTS
USB_VPOUT_TXD
USB_VMIN_RXD
USB_TXENB
USB_SE0
RXD2
BB_SAP_RX
BB_SAP_TX
BB_SAP_FS
BB_SAP_CLK
(13 MHz)
One Wire data from Battery
(from Neptune GPIO)
STANDBY_GATEB
(Watchdog)
ATI_RESETB_2_7V
RESETB
RESET OUT
CLK 32KHZ
STANDBY_GATEB
STANDBY
(Keyboard Matrix Signals via J2)
and BT))
(to J1300)
(from Atlas)
(to U700)
(to Atlas)
WDOG
(to Atlas and
U802)
(from/ to Atlas
(VCC)
B4
IO_REG
C4
C2
(from Atlas)
NC
VBUCK
C1
A4
A2 NC
A1
Flip Connector
A3 C3
Q960
FLIP CONNECTOR
J2
ATI_RESETB_2_7V 50 49 GND
BB_SPI_MISO 48 47 REG_3V
(from/ to Atlas)
(from/ to Neptune) BB_SPI_MOSI 46 45 RTC_BAT
BB_SPI_CLK 44 43 IO_REG_FLIP (from Q960)
41 GND
GRAPH_SPI_CS 42
(from Neptune)
(from Atlas) PERIPH_IO_REG 40 39 EL_EN
Bluetooth
(from Atlas)
GRAPH_INT 38 37 REG_3V
(on PCB)
LCD_SDATA_DATA7 36 35 GND
Strip Line
LCD_RS 34 33 GND
Antenna
32 31 HAND_SPKRM
LCD_DATA3
(from Atlas)
T-Flash 30 29 HAND_SPKRP
LCD_DATA5
LCD_CS 28 27 GND
(V3i only)
LCD_DATA2 26 25 CLK_32KHZ_2_7V (from Atlas)
24 23 GND
LCD_CLK_DATA6
Neptune Atlas
(from/ to Neptune)
(from Q960)
Communication 22 21 VBUCK_FLIP
LCD_DATA1
Bluetooth
TXD2 5 LCD_DATA0
20 19 GRAPH_REG GRAPH_REG_AUL (from Atlas)
18 17 GND
LCD_DATA4
RXD2 33
25 BT_ANTENNA
(Bias from Neptune)
KBR6 16 15 LTS_SNS_CNTL
CTS2 29
(from/ to U301 BT, PERIPH_IO_REG KBR4 14 13 GND
10
(from Atlas)
(from Atlas)
RTS2 31 U2000
Neptune - BT - Neptune
12 11
21 BTRF_REG KBR3 ADC_DATA (toNeptune)
(VCC)
Communication and Wakeup) 6 5 PERIPH_IO_REG
KBR5 10 9
LEDB1
11 U300
BLUE_WAKEB (to Atlas)
1 KBR7 8 7
PWR_SW
4
BLUE_HOST_WAKEB 9 16
1 6 5
KBC0 KBC1
KBR2 4 3 (from/ to Neptune)
KBR0
Y301
(Single Speed)
Trans Flash
KBR1 2 1
KBC2
RESET_B
(from Neptune/ Atlas) Card Reader
15 1 J5
3 g1- g4
22 GND
2
4 5
CLK_32KHZ 7
(from Atlas) MMC_CLK
CLK
12 MMC_D0 D0
27 28 30 32 4
VCC
U2001
8
2
D1 NC
MMC_2_OUT D3
BB_SAP_RX 1
3 D2 NC
MMC_3_CMD_IN CMD
BB_SAP_FS (framesync)
6 + 10
(from/ to Neptune
GND
Serial Audio for Ringtone
BB_SAP_CLK(clock)
and Voice Audio)
Neptune Atlas
BB_SAP_TX
USB/ RS232 Charger and Power-
BATT CONN.
Communication
source Control
J3
Charger
2 3 1 4
(from Acesory Connector)
(EXT Power)
VBUS
(One Wire Bus
to Neptune)
OWB GND
(toNeptune)
T14 SIM_PD
13 Bit SAP (tx) (rx) C15 CHRGRAW
(VBUS Sense)
PRI SPI
V10
ALERTM USB/RS232 CNTL. ON AD
PCB ESD P13
Alert CODEC TOUT12
(Bias Voltage from
THERM THERM
NeptuneAtlas LOGIC
ALERT D14 Neptune)
ALERTP Amplifier 16 BIT (Battery Sense)
FL1400 U8 BATTP
Pads (communication) Neptune Atlas LOGIC CONV.
STEREO U14
(Batt Current)
Communication ISNS_PM
D/A
F13 (Charge Current - )
Handset ISNS_PM
HAND_SPKRM T6
(to J2)
Amplifier (Charger Current + )
E15 CHRGISNSP_PM
HAND_SPKRP R7
Q905 (M1) S
P9
4 MICBIAS1 G
Internal Color definition only for this section !
MIC
Microphone
CHARGE
3 MICINM
T9 (Current Control) Main Charge Path
B16 CHRGCTRL_PM
Supply R910 R911
CONTR.
B+ support without Ext Charger
D
Amplifier B+ support with Ext Charger
S
Q906 (M2) G D
G
Headset
SQ904 (M3)
(Main Source
NC B12
BATTFET_PM
BP
Amplifier
Logic for Atlas)
BPFET_PM
B14
Stereo Battery to BPLUS
NC
D
Det. Switch
G
Mini USB Headset Q903 (M4)
NC LED
Det.
(to Display Backlight via V2)
CNTL.
B10 LEDB1
S
(to Charging Circuit)
1 VBUS
VBUS to BP
Switch
(from Mini USB Connector)
(from Atlas) VBOOST B4 VBUS 5V
U900
D902
ESD (EXT Power)
(PPD device support) Pass FET VBUS
VR960 VBUS D2
ATLAS UL
D12 (from J1300)
RTC_BATT
USB
V17
(Accessory Detection signal)
H8
4 USB_ID
VR950
EMU
F3 Y900
DM_TXD
2
VR920
J1
Interface
E3
DP_RXD V16
3
VR920
R16 CLK_32KHZ (to Neptune and U301 BT)
5 TIMER (to J1300)
P16 CLK_32KHZ_2_7V
(from Neptune)
V12 CLK 13 MHZ
G1-G4
(from Neptune)
WDOG
K10
(from Neptune, Tx Mode indication for Atlas)
(Shield) TX_START
U15
(from U800)
STANDBY
F12
(from/ to Neptune and U700)
E12 RESETB
4 4
3 3
1 1
2
Servive, Engineering & Optimization 2005.07.18
LEVEL 3 AL Block Diagram Rev. 1.0
Revision Overview
Rev. 1.0: Initial Block Diagram
V3 (Razor05) / V3i
V3i /Razor05
Alexander Buehler, Michael Mauderer Page 2of 2
1
(from Neptune)
RTCK
SPI_CS0
(Chip Select/ Enable)
(from J2)
(rx)
(Bias)
PERIPH REG
VR50
D1426
AUL CS
USB_VPIN
USB_XRXD_RTS
BB_SAP_TX
BB_SAP_FS
BB_SAP_RX
(tx)
BB_SAP_CLK
BATTP
R904
R5
R4
B3
USB_TXENB
E4
USB_SE0
C4
F4
USB_VPOUT_TXD
P4
R3
B2
B1
USB_VMIN_RXD
F14
PWR_SW
T17
BB-SPI_CLK
T18
BB_SPI_MOSI
N14
AUL_INT
U18
U16
BB_SPI_MISO
B+ Sense
REG
REG
VCO
REG
REG
VSIM
Switcher
Switcher
IO REG
AUDIO
PERIPH
IO REG
GRAPH
RF REG
to Vibrator
BT REG
REF REG
Buck 350mA
CAMERA
VIB REG
Boost 300mA
P2
Motor
N5
H3
H4
K17
U6
H2
F16
G16
K11
F3,E13........
Q943
Q910
VCO_DRV
V2
VBTPADRV
M4
BP
VSIM_EN
( 2,775V )
PERIPH_IO_ REG
( 2,775V )
RF_REG
( 2,775 )
IO_REG
( 1,8/ 3V )
V_SIM
( 1,875V )
BTRF_REG
K2
( 2,775V )
AUD_ REG
( 1,575V )
REF_REG
L16
( 1,275 )
GRAPH_REG_AUL
M18
( 5,5V )
VBOOST
( 1,875V )
VBUCK
(to J2)
( 3,10V )
REG_3V
(to J2)
(to U250)
(to U300)
( 2,775V )
VCO_REG
( 3,00V )
VCC_BTPA
(to Neptune)
AL circuit)
Vib. Motor
( 1,3V )
VVIB
( Atlas, Neptune,
(Atlas internal and
U700, Q960,U801)
(only used in Atlas)
(only used in Atlas)
(to Neptune amd J4)
(Main Source- from Q904)
(to U250)
(only used
in Atlas)
(to Atlas, Neptune, Q960)


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