BD V557 A3 C L3 1 4


Internal
Antenna
U50
PA
1 11
DCS/PCS IN M3
1 2 3
U80
Mechanical
Antenna Switch
3 Antenna Switch
(from U200)
TX_EN
J1
DCS/PCS OUT
1
2
(from U150)
PA_BAND_SELECT
LP
ANT_DET
20
9
GSM850/GSM900 IN 7
1 2 3
GSM850/
(VCC)
22 ANTSW_1
4
GSM900 OUT
6
(from U200) LP
VRAMP
Switch
(from U200) 5
Control
VRANGE
(PA Disable function)
Circuit
4
BPLUS
16 15 17
9 7 10 12
4 1800 MHz
8
High Band (VCC + 1875V)
BB_IO_REG
1800MHz
(VCC + 1,575V)
9 VMEM_IO
NEPTUNE LTE
(VCC + 1,875V)
6 1900 MHZ VBUCK
U800
10
High Band
(VCC + 2.775V)
RF_REG
DSP Peripherals Power
1900MHz
11 (to U200)
(VCC + 2.775V)
MCLK accelerator, encryption R12 POWER_CUTS_VCC
U8
( Frontend Control
12 3 850 MHz MS
V7 SPI Timer, Interupts
and Digital Modulation)
Low Band
(from PCAP ) J1350
MDI VSIM
850MHz W9
13
K2
NC
SIM
SIM DIO
1 900 MHz 2
Connector
14 K3 3
Low Band
GND
V8 SIM RST
DSP
SIM
900MHz DSP J4 1.8 or 3V 1
5
15 L1 Timer
U6
Memory VSIM (from PCAP )
UltraLite Interface SIM CLK
SIM Card
L1 6
4
104 MHz
FL100 from Neptune BATT_DETB (SIM_PD)
R1
Quard Saw Filter (from PCAP )
and Matching (to Pcap)
M1 VSIM_EN
D0-15
DATA BUS
Shared Memory
(to U50)
(PA Disable function)
A1-24
1Mbit RAM
ADDRESS BUS
VRANGE
ADDR.(24:1)
PMODE
9,10,24,32
15 37 5
31 30 29 28 27 26 25 42 43 45 14 6 7
44
W7 K8
W19 K1
CS0B
MCU
External U700
1
Serial Data DAC2 DAC1 GPIO MCU
Control Memory V17 CS1B D6
G12
Interface ARM7
900 MHz Memory
2 LNA 32 CS2B G8
T18
1
23 IIN 52 MHz
VoiceBand
A13 G17 EB1B F3
Interface
RX/TX ADC Sync Anti Anti Chanel DAC
3 LPF F4 RESET OUT (from Neptune)
K16 EB0B C2 FLASH
22 IBIN 2 36
Switch 13 bit Filter Drop Alias Filter 12 bit
N10
ENR
V17
850 MHz LNA CS1B D6
4
J19
R WB
F5,D5
Quadrature 35
Polyphase
DC
CLKR T16
OEB
Mixer 26 MHz J2,H1,H8
J8.. VMEM_IO
5 Filter
Correct (100KHz) Serial TCXO A4
Clock Generator T19 BURSTCLK C6
21
Oscillator
LNA Interface 34
1900 MHZ
LBAB E5
6 FSR L16
L4..
VBUCK
N18 ECBB G7
20
7 8MB SRam
33
U150 QBIN 3 DRI
LCD RS
P2
1800 MHz LNA 32 MB Flash
8 RX/TX ADC Sync Anti Anti Chanel DAC
N3 LCD CS
RF IC LPF MQSPI
QIN 4
Switch 13 bit Filter Drop Alias Filter 12 bit
M4 LCD CLK DATA(6)
Display
Quadrature
P1 LCD SDATA DATA(7)
Generator
12
L3... LCD DATA (0 - 5)
Digital TX
U51
Interface
11 OSCA U11 HKSW
19 16
PA Control
13 TX_EN T8 MUTE* MUTE*
R204 IO_REG
U52 30 OSCOM
A14 DSL0
EDGE 48
18 17 16 14 15 11 OSCO DSL1 BB_SAP_FS
GMSK EDGE G10
FIR (100KHz)
Modulator Modulator 31 G11 DSL2
OSCM
Filter
U200
DAI_EN
T6
(to U50)
GPIO V14 OPT1
RX/TX IC 40 RF_DATA
U8
(Main IC Control) W8 OPT2
GMSK/ EDGE Select
39
RF_CLK
V7 SPI
( VCO Feedback ) 41
RF_CS
20 W9 ANT_DET
T12
FIN
On
Pre-Distortion Anti
(Flip Open/ Close
Devider LDTO
38
( VCO Coarse Tuning) 17 V6
Off
Filter Alias STANDBY_GATEB
( Lock Detect Out) Detect)
( VCO Fine Tuning) 19 T7 SW B+ EN
S550
LOGIC SENSE
(to U150) BaseBand UART2 T13
One
VCO1 (TX_LB) 22
Reference UART / USB
CP Keypad Timer HS INT
Serial Audio C14
Wire Universal
ADC 24
Devider VCO_REG MQSPI
Phase Det. Port Interface
Bus BT
Interface Interface Interface Asynchron. LT_SNS_CTL
C18
Voltage 47
VCC s from PCap
IO_REG
VCO2 (TX_HB) (rx) (tx)
Rx /Tx
23 Reg. E1 ADC DATA
9,18
RF_REG
A17 C15 D15 E3....
A12 B13 N13 D16 B15
V12 W12 D18 T10 V13 U13
5
G3.... W13 E3 W11 B12
B16 C16 A16 T11 V11 B14 G8 W5 D13 N17 V16 D19 B17
T12
1
Q801
RX MID CHANNELS
2 Light Sensor
850: CH190 -- 881,6
GSM: CH 62 -- 947,4 MHz
EGSM: CH 37 -- 942,4Mhz
DCS: CH 700 -- 1842,8MHz
PCS: CH 661 -- 1960MHz
Q200
OSCM
5
(VCC to U80) 2,3
ANTSW_1
4,6 RF_REG
Neptune PCap Neptune PCap (from/ to U301 BT, J1300
(from/ to Neptune
USB/ RS232 Neptune Display Diver
Serial Audio for Ringtone Neptune - BT - Neptune
Communication
Communication and Voice Audio) Communication and Wakeup)
U806 U801
3
Y806 Buffer Buffer
OSCA
26MHz
1,2
OSCM
U220
4
2
U804
TCXO OSCO
U221
5 1 STANDBY_GATEB
4
OSCM
3
2
STANDBY
5
1 BPLUS
Revision Overview
Rev.1.0: Initial Block Diagram
Rev.1.1:Updated following Part Designator: U800, J1350,
Servive, Engineering & Optimization 2005.05.23
CR950, L950 DNP
Rev.1.2: Remove signal between OSCA & OSCO, removed note LEVEL 3 AL Block Diagram Rev. 1.4
at BT IC
V540, V551, V557, V330 San2ini Series
Rev.1.3: add product names
V540/V551/V557/V330
Rev.1.4: add product name V540
Alexander Buehler, Michael Mauderer Page 1of 2
(to U150)
( to PCap )
(to U50)
(NC)
(from U200)
(from U800)
(to U110)
CNTRL_1
CNTRL_3
MCLK
MS
MDI
TXI (NC)
(Transmitt Enable)
DAC2
VRAMP
RF_REG
RF_CLK
RF_CS
RF_DATA
CTRL_2
PA_BAND_SEL
LDTO
RX_ANT_EN
TX_START
TX_START
RX_ANT_EN
RX_ANT_EN
(PA Power Control)
Output Mixer
Oscilator and
Clock Generator
VT
VTC
Serial
Interface
VCO_REG
Loop Filter
(clock)
(framesync)
OWB
WDOG
RESET OUT
STANDBY_1_5V
One Wire data from Battery
CLK 13 MHz
BB SPI MISO
BB SPI MOSI
PCAP CS
PCAP INT
GA_SPI_CS
GA_INT
FUN_SPI_CS
BB SPI CLK
(from PCap)
RESETB
BLUE_RTSB
BLUE_CLK_ENB
BLUE_WAKEB
BLUE_TX
BLUE_CTSB
(Watchdog)
KBC0-1
BLUE_HOST_WAKEB
KBR0-7
USB VPIN
USB XRXD RTS
USB VPOUT TXD
USB VMIN RXD
USB TXENB
USB SE0
BLUE_RX
BB SAP RX
BB SAP TX
BB SAP FS
BB SAP CLK
(to U700)
(13 MHz)
STANDBY
CLK 32KHZ
(to J1300)
CLK 32KHZ B
(to PCAP)
CONNECTOR
J1300
V540V551/V557/V330 KEYPAD
V30x, V400, V50x, V600
HAND SPKR+ 1 34 LCD DATA(1)
MATRIX
HAND SPKR- 2 33 LCD DATA(2)
GND 3 32 LCD DATA(3) 0-9,*,#,
KBC0 -1
GND 4 31 LCD DATA(4) Center,
U1300 KBR1 -7
5 30 LCD DATA(5) Soft L+R,
LCD DATA(0)
VBUCK 5
GND
6 29 LCD CLK DATA(6) Menu, Send,
4 RESET OUT B
RESET OUT 2
7 28 LCD SDATA DATA(7) Volume U-D
(from Neptune) GA INT
8 27 LCD CS Smart, VA,
LCD RS
9 26 VBUCK Navigation
GND
(from Neptune) 10 25 BPLUS (up,down,
CLK 32KHZ B
GND 11 24 GND left,right)
(from Neptune)
BB SPI CLK 12 23 GA_VCC(from PCap)
GND 13 22 GND
(to Neptune) BB SPI MISO 14 21 VVIB (from PCap 1,3V from Vibrator Regulator) PWR SW
POWER/END
(from Neptune) S513
GA SPI CS 15 20
FUN SPI CS
(from Neptune) 16 19
BB SPI MOSI IO REG
GND 17 18
GND
(on PCB)
VBOOST
Strip Line
Antenna
BACKLIGHT
D1450- D1457
LED´s
R1450- R1457
BL SINK
BLUE_TX
Bluetooth
5
BLUE_RX
33
25 BT_ANTENNA
BLUE_CTSB
(from/ to U301 BT,
29
Neptune - BT - Neptune 10 IO_REG
BLUE_RTSB
31
Communication and Wakeup)
21 BTRF_REG
BLUE_WAKEB
11
U301
BLUE_HOST_WAKEB
9 16
BLUE_CLK_ENB
Y300
(from Neptune/ PCap) RESET_OUT
15
22
(from PCap) CLK 32KHZ
12
27 28 30 32
BB SAP RX
(framesync)
BB SAP FS
(from/ to Neptune
This resistor is IN the
Serial Audio for Ringtone
(clock)
BB SAP CLK
and Voice Audio) Charger accessory and
BB SAP TX Neptune PCap
is used for identification
USB/ RS232
Communication
Neptune PCap
Communication
BATTERY
BATT FDBK
CHARGER
Headset
Internal EXT_BPLUS
Jack
MIC BATT CONN.
J1240
J1200
1 HJACK_DET (to PCap IO) J2
MIC BIAS 1
M1700
A, B INT_MIC+
HJACK_MIC H2
(tx) (rx) M11
(tx) (rx) PRI SPI BATT_I
4 SEC SPI
G2
3 2 4 1
USB/RS232 CNTL. ON (One Wire Bus
CODEC POWER T16
HJACK_SPKR CNTL. EXT BPLUS (External B+ Sense)
MIC BIAS 2 K2 CODEC
IO Neptune PCap LOGIC AD to Neptune)
13 BIT R17 (Battery Sense)
3 16 BIT LOGIC FAIL DET. BATT+
L2 (communication) Neptune PCap LOGIC
OWB
GND
HAND SPKR- PHONE T15 (Over Volt. Sense)
STEREO
2 Communication CONV. RAW_EXT_B+
J4
Alert
U5 THERM THERM BATT+
HAND SPKR+ D/A
AUDIO
(to PCap AD Converter)
Speaker K2
M13 ISENSE
AMPL.
CE
ALERT-
BATT_I
(to Neptune) F1
LOGIC_SENSE
1
Color definition only for this section !
Conn.
J1260 ALERT+ VR951
S
(to PCap)
ON2 2
H1 Main Charge Path
D
(to SIM PD)
J1400 K13 BATT DETB
CHARGE G
B+ support without Ext Charger
AUDIO_OUT R924
EXT_OUT
Q950
CHRGC
CONTR. R15 B+ support with Ext Charger
15 F2
AUDIO_IN THERMBIAS
16 K7 S
N8
G
MAIN_FET
D
SWB+
N15
SWB+_EN IO BPLUS (Key Source
Q952
U980
7 for PCap IC)
R16 MIDRATE
BPLUS
Logic Battery to BPLUS
USB PWR
OVER
OV GATE Switch
B3 U900
6
USB PU VOLT.
N13
C4
D
R940 PCAP3
D+ D+ CNTL.
23
USB
EXT BPLU to BPLUS G
4 B4
24 1
LED D4 MIDRATE
Q953
NC Switch
D- D- INTERF.
5
A5
22 3 CNTL. B3
NC
S
( from/ to PCap)
K17 BL SINK
BACKl.
RAW_BATT_FDBK BATT_FDBK
2 13 12
CR950
BL FB
R1459
CONTR. K15
RAW_DSEL2
BATT. G
DSEL2
10 16 9
EXT BPLUS
Q954
T11
RAW_DSEL1 RTC_BATT 2 1
D
(to PCap AD Converter
U8
( to Neptune)
11 8 DSEL1
17
and internal Charger)
J1701
RAW_DSEL0 S
Y900
U13 MEMORY
DSEL0
12 18 7
GND
HOLD
RAW_OPT1 (from Neptune) RAW EXT B+
E2 U10
OPT1
13 20 5 STANDBY (Overvoltage Protection)
(from Acesory Connector)
M9
RAW_OPT2
TIMER RAW EXT B+ to EXT B+
14 6 OPT2
19
CLK_32KHZ
RAW_HKSW SWITCH
(to Neptune and U301 BT)
14 HKSW T7
11
8
RAW_MUTE* C2 CLK 13 MHZ
MUTE*
9 15 10
V10 V9 V8 V7 V6 V5 V4 V3 V2 V1 (from Neptune)
WDOG
H12
FL1400
(from Neptune)
TX_START
P15
RAW_EXT_B+
ESD Protection
3 ( toPCap + Q954) L12 RESETB
Q901
1
1
17-20
3
REF_REG 2
Revision Overview
Rev.1.0: Initial Block Diagram
Rev.1.1:Updated following Part Designator: U800, J1350,
Servive, Engineering & Optimization 2005.05.23
CR950, L950 DNP
Rev.1.2: Remove signal between OSCA & OSCO, removed note
LEVEL 3 AL Block Diagram Rev. 1.4
at BT IC
V540, V551, V557, V330 San2ini Series
Rev.1.3: add product names
Rev.1.4: add product name V540
Alexander Buehler, Michael Mauderer Page 2of 2
R301
IO REG
R965
BB_SPI_MISO
PCAP CS
HJACK_DET
USB VPIN
USB VPOUT TXD
R962
CR951
BB SAP TX
BB SAP FS
BB SAP RX
BB SAP CLK
NC
NC
NC
NC
NC
NC
NC
AD6
NC
NC
NC
NC
(Bias)
F6
F5
F7
USB SE0
P8
BB_SPI_MOSI
E5
USB TXENB
T6
ON2
L9
C6
USB XRXD RTS
C5
R7
R6
H7
H8
K7
G7
G8
USB VMIN RXD
K9
IO REG
M8
BB-SPI_CLK
J12
PWR SW
L10
PCAP INT
R950
DET.
STEREO
VIB
VSIM
Switcher 3
Switcher 2
Switcher 1
B+ Sense
to Vibra
DRIVE
Boost Mode
Buck Mode
VHOLD_EXT_EN
B7
A6
A7
G17
M15
K19
U1
H17
B11
A12
G21
L17
H14
F3,E13........
NC
N20
NC
Buck Mode
NC
N19
( to Vibrator in Flip)
BPLUS
VSIM_EN
( 1,8V )
( 2,775 )
VCO_REG
( 2,775 )
BB_IO_REG
H15
(only used in PCap)
( 1,8V )
BTRF_REG
( 1,8/ 3V )
VSIM
( 2,775V )
RF_REG
( 1,275 )
GA VCC
( 5,6V )
VBOOST
( 1,875V )
VBUCK
( 1,875V )
VMEM_IO
( 1,575V )
REF_REG
( 2,775V )
AUD_ REG
( 2,775V )
IO REG
( 1,3V )
VVIB
POWER CUTS VCC


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