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| i.MX 6 Series Applications Processors Błock Diagram

System Control

Secure JTAG

PLL, Osc

Clock and Reset

Smart DMA

CPU Platform

ARM* Cortex™-A9 core
32 KB l-cache per core	32 KB D-cache per core
NEON per core		PTM per core

256 KB-1 MB L2-cache

IOMUX

Timerx3

Multimedia

PWM x4

Hardware Graphics Accelerators

l | Vector Graphics

....................

......... . . • i . • . . • - - -

3D

Watch Dog x2

2D

Power Management

Power	f Temperatura
Supplies	Monitor

Video Codecs

l X#pp30 EnćŻDec ]

Audio

ASRĆ"

Intemal	Memory
ROM	RAM
Security
RNG
^: TrustZonc ^:	■ Secure RTC |
i Ciphers :	eFuses

i r"

' • lnversion/Rotation

Imaging Processing Unit

i ;Resizingand Blending!^: Image Enhancement j;

• ; ■/. ........................

* .

Display and Camera Interface

[' HDM[ and PHY'j ' 24-biVRGB,' LVDS (x2)'} : ;m!p«dsi;    \20-bit csi'

I‘‘'MlPICSI2 ''': r.........EPDĆ..........•

Connectivity

MMC 4.4/ SD 3.0 x3	i USB2HSIC Host x2
MMC 4.4/ SDXC	I MIPI HSI ...._____________1
UART x5, 5Mbps	S/PDIF Tx/Rx
	i PCIe 2.0 i (1 -lane)
l^2C x3, SPI xŚ
	: FlexCANx2 i i MLB150+ : DTCP
i ESAI, l^2S/SSI x3
3.3V GPIO	• 1 Gb Ethernet i : + IEEE1588 i
Keypad
	j NANDCntri. i ! (BCH40) j
................. S-ATA and j PHY 3Gbps j
	I LP-DDR2, : DDR3/ I LV-DDR3 ; x32/64, ; 533 MHz ;
USB2 OTG and PHY USB2 Host and PHY