SHIBA reset 1012

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SHIBA Circuit Review

Outline

 Block Diagram

 Power Sequence and reset signal timing

 Power block diagram

 Power on / reset block diagram

 SMI/SCI/SWI Interface

 Clock block diagram

 Audio block diagram

 SMBUS block diagram

 Charge function block diagram

 Placement

 GPIO Table

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Block Diagram

MARVELL

ENE

LINE OUT

LINE OUT/SPDIF

MAC

RGMII

C51M

CRT/TV

MUX

PCIE x 1

EXPRESSCARD

Shiba Block Diagram(FF+)

5 in 1
Card reader

ATA 133

HyperTransport
16X16
6.4GB/S

LPC I/F

HD AUDIO

DDRII
667

AMD CPU

NPT Processor
Rev. F
S1 package

LCD

802.11a/b/g

Mini Card

ACPI 2.0

MCP51M

nVIDIA

8xUSB 2.0

PCI

HyperTransport+ UMA

nVIDIA

UP to 1920 X 1200

HyperTransport
8X8
2.4GB/S

PATA

HDD

ODD

SATA

R5C832

1* 1394
5 in 1 card reader

1394
Conn

Power
Switch

RICOH R5538

PCI-E X 1

PCI-E X 1

15

15

31

16

8,9

18,19,20,21,22,23

10,11,12,13,14

4,5,6,7

RICOH

DDRII 667 Channel A

USB x 2
USB x 1

USB 2.0

HD AUDIO
CODEC

CX20548

CX20549-12Z

AMOM

KBC

Touch
Pad

Thermal
& Fan

Int.
KB

8Mb
(1MB)

G792

FlashRom

LPC Bus

KB3910SF

Comsumer
IR

PCIE x 1/ USB2.0

Slot 0

DDRII
667

DDRII 667 Channel B

Slot 1

88E1116

10/100/1000 PHY

Bluetooth

MODEM

MIC IN

ANPEC APA2031

OP AMP

RJ45
CONN

RJ11
CONN

2CH SPEAKER

DOCKING

X Bus

PCI

HD AUDIO

SATA

RGB CRT

SVIDEO/COMP

CRT

TVOUT

LVDS Dual Channel

Capacitive
Button

INTERNAL MIC ARRAY

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Placement(Top)

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Placement(bottom)

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Power Sequence and Reset Signal

Timing

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Power Block Diagram

CHARGER

MAX8725

DCIN

BATT

AD
+

BT
+

VCC_CORE_S0

DCBATOUT

VCORE_EN

3D3V_S5
5V_S5

1D2V_S5
1D2V_CORE_S0

PWRS5_EN

1D8V_S3

0D9V_S3

LP2951

5V_AUX_S5

PM_RSMRST#

AO4422

AO4422

3D3V_S0

5V_S0

PM_SLP_S3#

PM_SLP_S3#

AO3416

AO3416

1D2V_HT_S0

1D2V_S0

PM_SLP_S3#

1D2V_HT_S0_EN

APL5508

2D5V_S5

APL5508

2D5V_S0

APL5912

1D5V_S0

G913C

3D3V_AUX_S5

MAX8760

SHDN#

MAX8734A

PWRS5_EN

ON3

ON5

PWRS5_EN

MAX8743

PM_SLP_S3#

ON1

ON2

TPS51116

PM_SLP_S3#

S3

S5

PM_SLP_S3#

CH521S-
30

CH521S-
30

SHUTDOW
N

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POWER ON/RESET BLOCK

DIAGRAM

PWRS5_EN

3D3V_AUX_S
5

5V_AUX_S5

DCIN

CHARGER

MAX8725

LP2951

G913C

AD+

DCBATOUT

KBC

ENE3910

MCP51

AO3416

C51M

S1 CPU

DDR II

AO3416

MAX8734A

1D2V_HT_S0_EN

PM_SLP_S3#

1D2V_CORE_
S0

1D2V_S0

1D2V_HT_S0

1

D

2

V

_S

5

TPS51116

MAX8760

1D8V_S3/0D9V_S3

1D8V_S3/0D9V_S3

CPU_CORE_S0

VCORE_EN

VRM_PWRGD

PM_RSMRST#

G792

SYS_PWRGD

1D8V_S3_PG

PM_SLP_S5#

PWRBTN#

PWRBTN#_E
C

PWRBTN#_MCP

1

-1

-2

-3

-4

-5

-6

-7

2

3

4

5

6

7

8

9

10

11

12

1D2V_HT_S0_PG

13

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SCI/SWI INTERFACE

GPWU0

ENE KB3910

PWM4

BAT_TH

ECSCI#

PM_RSMRST#

GPWU2

GPWU3

AD_IN

GPIO00

LPC BUS

PWRBTN#

ECSCI#

RSMRST#

EXT_SMI#

GPIO2B

SIO_PME#

PWM6

ECSWI#

GPU_BLON

EC_PWRBTN#

PWRBTN#_KBC

PWM5

MCP51

COVERUP

GPWU4

CIR_KBC

GPWU5

PM_SLP_S3#

ECSMI#

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M_B_CLK_DDR2/#

M_B_CLK_DDR1/#

M_A_CLK_DDR2/

#

M_A_CLK_DDR1/#

CLK_PCIE_2/#

CLK_PCIE_1/#

CPU_CLK/#

MCPOUT_200MH

Z/#

MCPOUT_25MHZ

Clock Block Diagram

MCP51

C51M

S1 CPU

NEW CARD

MINI CARD

DIMM

R5C832

KBC

ENE3910

PCI_CLK

LPC_CLK

MARVELL

88E1116

CLK25_MII

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Audio Block Diagram

SPDIF

MIC

Line-In/

Mic-In

HD AUDIO

SPDIF

POWER

SPDIF

CODEC

CX20549-12Z

Audio AMP.

APA2031

CDR
CDL
CD-GND

PORT-D

H.P. Jack

Line Out

2 Watt

2 Watt

2 Watt

AUD_MUTE

PORT-A

Internal
MIC
array

Switch

DOCKING

PORT-B

DIB

HAL.

CX20548

RJ11

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SMBUS Block Diagram

MCP51

SMBC_MCP

SMBD_MCP

3D3V_S0

2K7R

DDR

DIMM B

ID=A2/A3

DDR

DIMM A

ID=A0/A1

3D3V_S0

3D3V_S0

2K7R

KBC

ENE 3910

3D3V_AUX_S5

VCC

SMBC_KBC

SMBD_KB
C

10K

5V_S0

BTA_SCL_5

BTA_SDA_5

3D3V_S0

Batter
y

ID=16/1
7

4.7K

3D3V_AUX_S5

5V_S
0

Therm
alG792

ID=7A/7
B

5V_S
0

3D3V_S0

2K7R

2K7R

MINI CARD

NEW CARD

3D3V_S0

3D3V_S0

SMBC_MCP_1

SMBD_MCP_1

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Charger Function Block

Diagram

CHG_ON#

AIRLINE_VOLT

DA7

2

1

D41
CH521S-30-GP-U

M

A

X

1

9

0

9

_C

S

S

P

1

2

G163

GAP-CLOSE-PWR

1

2

G164

GAP-CLOSE-PWR

AD0

AD_IA

IINP

SMBUS

29

AD_OFF

IOPD2

DA6

GPIO25

SMBUS

AC_IN

42

KBC
ENE K3910SF

GPIO24

43

M

A

X

1

9

0

9

_P

D

S

MAX8725

DCIN

MAX1909_DCIN

M

A

X

1

9

0

9

_C

S

S

N

MAX1909_DHI

MAX1909_DLO
CHG_PWR-3

MAX1909_CSIN

PD

S

M

A

X

1

9

0

9

_P

D

L

CS

SP

CS

SN

REF

PD

L

BT+SENSE

DHI

DLO

CSIP

CSIN

BATT

M

A

X

1

9

0

9

_C

L

S

PKPRES#

CLS

Li
Battery

PIN 6

ICTL

AD7

CHG_I_SEL

ACDC_ ID

1

VCC

2

VCC

3

GND

4

GND

5

DCIN1

JST-CON5-8-GP

ACOK

1

2

3

4

5

6

7

8

S

S

S

G

D

D

D

D

U123

AO4407-1-GP

CHG_I_PRE_SEL

1

2

R1516

D01R2512F-4-GP

AD+ _ 2

1

2

3

4

5

6

7

8

S

S

S

G

D

D

D

D

U121

AO4407-1-GP

1

2

R975

100KR2J-1-GP

AD+

E

B

C

R1

R2

Q33

PDTA124EU-1-GP

CHG_ON#

3D3V_ AUX_ S5

1

2

R1531
100KR2J-1-GP

BT+

1

2

3

4

5

6

7

8

S

S

S

G

D

D

D

D

U124

AO4407-1-GP

GPWU3

DCBATOUT

1

2

3

4

5 6 7 8

S

S

S

G

D D D D

U127

SI4800BDY-T1

1

2

3

4

5 6 7 8

S

S

G

D D D D

S

U125

SI4431BDY-E3-GP

BT_TH

1

2

L58

IND-15UH-48-GP

1

2

R1524

D01R2512F-4-GP

AD_IN

AC_OK

1

2

R1539

0R2J-GP

AD_OFF

2

1

3

IN

OUT

R1

R2

GND

Q34

DTC114EUA-1-GP

AD1

BT_SENSE

1

2

C411

SCD1U16V2ZY-2GP

1

2

R357

100KR2F-L1-GP

1

2

R356

560KR2F-GP

AD_IA

BT_SENSE

CHG_I_SEL

MAX1909_ICTL

G

S

D

G

S

D

Q37

2N7002TPT-GP

G

S

D

G

S

D

Q38

2N7002TPT-GP

1

2

R1538

86K6R3F-GP

1

2

R1537

3K65R3F-GP

BT+

1

2

R1534

100KR2F-L1-GP

1

2

3

G

S

D

Q36

2N7002

1

2

R1533

100KR2J-1-GP

1

2

R1536

130KR2F-GP

M AX1909_ REF

M

A

X

1

9

0

9

_R

E

F

1

2

C1232

SC

1U

10

V3

ZY-

6G

P

1

2

R1530

36K5R3F-2-GP

1

2

R1529
49K9R2F-L-GP

MAX1909_ICTL

CHG_I_PRE_SEL

1

2

G165

GAP-CLOSE-PWR

1

2

G166

GAP-CLOSE-PWR

GPIO00

BT_TH


Document Outline


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