Simulacion En Proteus
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O ISIS Release 7.01.02 (Build 3692) (C) Labcenter Electronics 1990- 2007.
O Source codę build completed OK.
Q Compiling design ‘D:\Docurnents and Settinqs\Belgitae$\Escriłorio\Smart Card 3D\SMART CARD.DSN1.
O Netlist compilation completed OK.
O Netlist linking completed OK.
O Partition analysis completed OK.
© Simulating partition [049C24E5]
0 PR OS PI CE 7.10.00 (Build 2628) (C) Labcenter Electronics 1993-2007.
© Loaded netlist ,D:\D0CUME~1\BELGIT~1\C0NFIG~1\Temp\LISA2621.SDF, for design ‘D:\Documents and Settings\Belgitaes\Escritori... O Adding +5V power raił for VCC © (SPICE) Startinq Gmin stepping: 120 steps O (SPICE) Gmin stepping completed
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Root sheet 1 |
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