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Ekctrical & Computer Eng ince ring: An International Journal < ECU) Volume4. N untber 3. Septeniber 2015

Iow power induslrial applications by using the multi thieshold distribuled sleep transistor network at Circuit lewi implemenlalion is proposing in this paper. In order to make obvious the piuposed archilecture of power efficienl RPLA. a 3- inpul RPLA which be eapable of performing any 2³ functions using the combination of 8 min terms is also designed and match up to the rcsull willi the comcnlional CMOS-RPLA by asing the Simulator TINA-PRO. The proposed Iow power rcvcrsible PLA be able to implemenl numbers of Boolean functions likc aoder/subtracior and it can be transfermed to peiformdesired function.The transient response or the spikes generalion in the proposcd design is also discussed.

2. Background

This section provides the eomplctc background of the lechnology used in the proposcd design. This paper shows the physical design of the RPLA constiluling by Iwo major technologies: Rewrsible logics and Power gating.

2.1. Overview of Reversible logics

This part of the section 2 provides the brief of the reversible gates used in the rewrsible programmable logie design. According to the theory of the rewrsibility in the digital logics. the logie musi have the equal number of inpuLs and outpuLs and they musi be bijective. Thal means. an pxq of reversible gatc consisting of p inputs and q oulpuls wilh design of each inpul assignmenl to a uniqucoulpul assignment and vicc versa OR there isone- to- one mapping frorn the inputs to the oulpuls and vicc- versa[5] and p=q |4). Theie aie varieties of the revcrsible gates likc Feynman gatc <FG). Toffolli gate (TG). Fredkingate (FRG). Peres gale (PG). New gale (NG. MKG. HNG and TSG. MG) [3]. Wilhoul discussing the all reversible gates. this paper describe only the MUX gate and Feynman gate as bolh gates wilh changed configuration arc used in the RPLA.

2.1.1 Feynman (Jatę

The 2x2 rcvcrsible gatc shown in Fig.2 callcd Feynman gate |2]. This gate is also documcnted as controlled- not gate (CNOT) having two inputs (A. B) and two oulpuls (P. Q). The oulputs are delined by P=A. Q=A XOR B .To copy a signal. this gate can be used in the design to remów fan-out as fan-oul is not pcmiilted in rcvcrsible logie circuits. Quanlum cost of a Feynman gatc

Ls I.

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Fig.2. 2x2Rynnvan gatc structurc

2.1.2 MUX Gate

The pictorial repiesentalion of 3x3 rewrsible gate MUX (MG) gatc is shown in Fig.3 13]. This gate is a conservativc gale having thrce inputs (A. B. C) and thiee outpuLs (P. Q. R). The outpuLs of the gate are delined by P=A. Q=A XOR B XOR C and R= A’C XOR AB. iLs Quanlum cost is 4.

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