circuit cellar2002 09

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CIRCUIT

CELLAR

®

www.circuitcellar.com

T H E M A G A Z I N E F O R C O M P U T E R A P P L I C AT I O N S

$4.95 U.S. ($5.95 Canada)

INTERNET & CONNECTIVITY

Control Your Office From Home

5-Cent PSoC Modem

8051 Web Server Project

Killing EMI

#146 September 2002

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Digital Oscilloscopes

2 Channel Digital Oscilloscope

100 MSa/s

max single shot rate

32K samples per channel
Advanced Triggering
Only 9 oz and 6.3” x 3.75” x 1.25”
Small, Lightweight, and Portable

Parallel Port

interface to PC

Advanced Math options
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DSO-2102S

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DSO-2102M

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Each includes

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40 to 160 channels
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up to 512K samples/ch

Optional Parallel Interface

Optional 100 MSa/s Pattern Generator

LA4240-32K (200MHz, 40CH)

$1350

LA4280-32K (200MHz, 80CH)

$2000

LA4540-128K (500MHz, 40CH)

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LA4580-128K (500MHz, 80CH)

$2800

LA45160-128K (500MHz, 160CH)

$7000

www.LinkIns4.com

Link Instruments

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(973) 808-8990

Fax (973) 808-8786

Logic Analyzers

• 24 Channel Logic Analyzer
• 100MSa/S max sample rate
• Variable Threshold Voltage
• Large 128k Buffer
• Small, Lightweight and Portable
• Only 4 oz and 4.75” x 2.75” x 1”
• Parallel Port Interface to PC
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• Windows 95/98 Software

LA2124-128K (100MSa/s, 24CH)
Clips, Wires, Interface Cable, AC
Adapter and Software

$800

All prices include Pods and Software

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ould you live without the Internet? Think about it.

No more logging on for instant access to news, movie

times, florists around the world, mortgage approval, gam-

bling, auctions, vacation planning…. You would have to step

back about a decade in time, when surfing the information superhighway was

still a mysterious, confusing concept for most of the population. Not only would

you forgo instant access, but you would also have to get used to the middleman

again. No one wants to return to the days when to get information, you had to

go to some dreadful bureaucratic office or stay on hold for a half-hour repeated-

ly listening to, “I’m sorry, all of our representatives are busy helping other cus-

tomers. Please stay on the line.”

The Internet provides convenience in a time when everyone is desperate for

easy solutions. We all work long hours, so there’s little to no time to manage

personal affairs. Having access to the Internet is tantamount to the quintessen-

tial good life. With my busy schedule and vehement hatred of all things that

waste time, Internet access is right up there with attaining the American Dream

of owning my own home and land.

As the years pass, we’re experimenting in more adventurous ways on the

Internet, making it even better. That’s what makes our Internet & Connectivity

theme so interesting. Each time we prepare this theme issue, we’re impressed with

the writers’ ingenuity. They prove that there are no limits other than imagination.

Joan Slavet’s project (page 18) showcases a creative solution to an ordinary

problem, all with the help of the Internet. Using SMS messaging, he established

a system to remotely control his friend’s store. The project started as a means to

turn on and off the lights when his friend was away from his business (the subject

of our cover). As Joan’s work progressed, he decided to add other useful control

capabilities, such as adjusting the refrigerator’s temperature. Now, the shop

owner can command changes from his cell phone while anywhere in the world.

In store for you as well are “The PSoC 5-Cent Modem” (page 26), “Build

Your Own 8051 Web Server” (page 34), and “Internet Enabling Made Easy”

(page 62). In the first article, Rick Hood discusses how he designed a modem

for embedded applications. If you’re looking for a challenge, look no further than

Jim Brady’s article about using an 8051 to serve web pages. And, if you aren’t

up to the challenge yet, read about the basics of Internet enabling. After 20-plus

years of experience in the field, columnist Fred Eady is a valuable source of

information. He tackles this usually complex, expensive task and explains how

to make it uncomplicated and affordable.

With these articles, you’re sure to find new ideas to incorporate in your own

designs. When you do, you should contact me about publishing them!

4

Issue 146 September 2002

www.circuitcellar.com

CIRCUIT CELLAR

®

EDITORIAL DIRECTOR/FOUNDER
Steve Ciarcia

MANAGING EDITOR
Jennifer Huber

TECHNICAL EDITOR
C.J. Abate

WEST COAST EDITOR
Tom Cantrell

CONTRIBUTING EDITORS

Ingo Cyliax
Fred Eady
George Martin

George Novacek

NEW PRODUCTS EDITOR
John Gorsky

PROJECT EDITORS
Steve Bedford
Ken Davidson
David Tweed

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E-mail: dan@circuitcellar.com

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AUTHOR CONTACT:

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CIRCUIT CELLAR®, THE MAGAZINE FOR COMPUTER APPLICATIONS (ISSN 1528-0608) and Circuit Cellar Online are pub-

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One-year (12 issues) subscription rate USA and possessions $21.95, Canada/Mexico

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Circuit Cellar® makes no warranties and assumes no responsibility or liability of any kind for errors in these programs or schematics or for the
consequences of any such errors. Furthermore, because of possible variation in the quality and condition of materials and workmanship of read-
er-assembled projects, Circuit Cellar® disclaims any responsibility for the safe and proper function of reader-assembled projects based upon or
from plans, descriptions, or information published by Circuit Cellar®.

The information provided by Circuit Cellar® is for educational purposes. Circuit Cellar® makes no claims or warrants that readers have a right to
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The reader assumes any risk of infringement liability for constructing or operating such devices.

Entire contents copyright © 2001 by Circuit Cellar Incorporated. All rights reserved. Circuit Cellar and Circuit Cellar INK are registered trademarks
of Circuit Cellar Inc. Reproduction of this publication in whole or in part without written consent from Circuit Cellar Inc. is prohibited.

CHIEF FINANCIAL OFFICER

Jeannette Ciarcia

CUSTOMER SERVICE

Elaine Johnston

ART DIRECTOR

KC Prescott

GRAPHIC DESIGNER

Mary Turek

STAFF ENGINEERS

Jeff Bachiochi

John Gorsky

QUIZ COORDINATOR

David Tweed

TASK

MANAGER

Cover photograph Ron Meadows—Meadows Marketing

PRINTED IN THE UNITED STATES

c

The Good Life

jennifer.huber@circuitcellar.com

Editor’s Note: In Frantisek Bachleda’s article, “Digital Ignition System-Building Without a

Distributor” (Circuit Cellar 145), the ftp site address to access the code for the project

was not listed. The address is ftp.circuitcellar.com/pub/Circuit_Cellar/2002/145/.

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CANbus

Starter Packs

PCI/ISA/PCMCIA/PC104/

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DrDAQ

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WILKE TIGER MODULES

multitasking powerful BASIC building blocks

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See www.abidata.be for details

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6

Issue 146 September 2002

CIRCUIT CELLAR

®

www.circuitcellar.com

RISCy Business
Part 2: Impressive Student Designs

Jeff Bachiochi

Office Supervisor
A Control System Based on SMS

Joan Slavat

The PSoC 5-Cent Modem

Rick Hood

Build Your Own 8051 Web Server

Jim Brady

Automatic Blood Pressure Meter
TI Contest Article

Aleksey Britov, Alexander Makeenok, Sergei Khlebnikov, Vladimir
Lomakovsky, & Vitaly Zakharchenko

Killing the EMI Demon

Norman Rogers

I

ROBOTICS CORNER
Put Out the Fire—Detect Flames with the
UV TRON Sensor

Tom Baraniak

I

APPLIED PCs
Internet Enabling Made Easy

Fred Eady

I

FROM THE BENCH

SmartMedia File Storage
Part 4: Getting Your Data Inside

Jeff Bachiochi

I

SILICON UPDATE
Fast Times at the Forum

Tom Cantrell

26

COLUMNS

ISSUE

Task Manager
Jennifer Huber
The Good Life

New Product News
edited by John Gorsky

Test Your EQ

Advertiser’s Index
October Preview

Priority Interrupt
Steve Ciarcia
The Right Exposure

4

8

11
94

96

146

62

70

76

12

18

42

34

FEA

TURES

50

58

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www.atmel.com

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COMPLETE PCB SOLUTION

PCB123 announces a new product specifically

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downloaded easily for immediate design.

NEWS

8

Issue 146 September 2002

CIRCUIT CELLAR

®

www.circuitcellar.com

NEW PRODUCT

Edited by John Gorsky

FAULT-PROTECTED CAN TRANSCEIVER

The MAX3053 is a fault-protected controller area

network (CAN) transceiver. It is intended for telecom,
automotive, and industrial applications that use power
supplies as high as 72 V. Line faults or short circuits of
±80 V will not damage or latch up the MAX3053.

External protection devices are not needed. The

MAX3053 is guaranteed to operate at data rates up to

2 Mbps in High Speed mode.
In Slope Control mode, the
device transmits data at up
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Designed to withstand many different types of

faults, the MAX3053 features ±80-V fault protection,
thermal shutdown, and current-limiting circuitry to
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Enhanced ESD protection is featured on the CAN bus
lines to provide immunity up to ±8 kV.

Prices start at $1.51 for 1000-piece quantities.

Maxim
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This software provides seamless integration with its

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LOW-COST 10-MHZ PULSE GENERATOR

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The unit offers Manual mode, which allows one

pulse to be generated each time a push button is
pressed. It also features a normal or inverted polarity
push button, and External Triggering mode, which
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pulse output with
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The Model 4030

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Does your fl ash design idea have what it takes to win?

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10

Issue 146 September 2002

CIRCUIT CELLAR

®

www.circuitcellar.com

HINGE-STYLE SAFTEY INTERLOCK

The unique Hinge-Style Safety Interlock Switches are

integrated and encapsulated in a load-bearing hinge to
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The inherent physical protection provided by the

switches gives them superior performance to actuator-
operated safety switches, achieving a rating of IEC IP67.
The hinge-style switch can support an axial load of 750
N (165 lbf) and more than 1000 N
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switches also feature positive-open-
ing safety contacts (IEC 60947-5-1).
Cat 4 protection can be achieved by
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The hinge-style switches are simi-

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Banner Engineering Corp.
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NEWS

NEW PRODUCT

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www.circuitcellar.com

CIRCUIT CELLAR

®

Issue 146 September 2002

11

Problem 5

What is the function of the following

circuit?

Contributed by Naveen PN

Problem 6

The Microchip PIC processors use

bank-switching to address more than the minimum

amount of data memory (e.g., more than 128 bytes on

a PIC16XXX). What are some of the advantages of

this approach?

Contributed by Dave Tweed

Problem 7

How do you set up an if-then-else-

endif control structure in assembly language, assum-

ing the processor has conditional and unconditional

jump instructions?

Contributed by Dave Tweed

Problem 8

How do you do the if-then-else-endif

control structure if the processor has only uncondi-

tional jump instructions, and uses conditional skip-

next-instruction instructions in place of conditional

branches?

Contributed by Dave Tweed

Problem 1

What is the voltage across the

1-µF capacitor in the following circuit?

Contributed by Naveen PN

Problem 2

It has been shown before that a

multiplexer is a kind of "universal gate." Show

how to implement a 1-bit-wide full adder (three

inputs, two outputs) using only 8:1 muxes.

Contributed by Naveen PN

Problem 3

There are three switches to

control the bulb in a room. Draw a schematic

that allows each switch to turn on or off the bulb

independently.

Contributed by Naveen PN

Problem 4

The basic op-amps in the figure

shown below are ideal. Find V

OUT

and determine

the mathematical operation performed by the

circuit.

Contributed by Naveen PN

What’s your EQ?

The answers are posted at

www.circuitcellar.com/eq.htm

You may contact the quizmasters at

eq@circuitcellar.com

Te s t Yo u r E Q

CIR

CUIT

CELLAR

1K

+

10V

2K

1K

1K

1K

A

B

I

I

I

1µf

+

+

V2

V1

V

OUT

R2

R1

R1

V

01

R2

+

V

O

V1

V2

R

R

C

i1

i2

i

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12

Issue 146 September 2002

CIRCUIT CELLAR

®

www.circuitcellar.com

’ve always lived

in Connecticut, so

I feel a connection to

the term Yankee ingenu-

ity. Although the term has a north-
eastern connotation, which may be
attributed to the country’s population
density at the time the term was
coined, creativity isn’t limited to one
geographical area. Today, it may be
more politically correct to use the
term global ingenuity.

Circuit Cellar’s

contests consistent-

ly demonstrate that global ingenuity
lives, particularly because over half of
all the entries come from outside of
the U.S. Therefore, there is no discern-
able difference in the level of technol-
ogy used in these projects based on an
entrant’s domicile.

I’m encouraged to see U.S. engineer-

ing schools wandering from the normal
lecture-based method of instruction.
Lectured-based instruction is neces-
sary, however, by addressing real-
world problems, students learn how to
apply the equations they were taught
in the lecture hall. What better way to
do this than to take an idea through
the design process and into reality?

A laboratory-intensive curriculum

is a step in the right direction. When
imaginations are given free rein, proj-

ects take on a more personal nature
and students develop a special sense of
pride in their work. When was the last
time your kid came home from school
and said, “Look what I learned today”?
If anything, you had to force the infor-
mation out of your child by withhold-
ing food. It’s much more likely that
you’ll hear, “Look what I made today,”
without the need of a coaxing carrot.

If you missed the first part of this

series on Cornell University’s Atmel
Design Logic 2001 contest submis-
sions (Circuit Cellar 145), I encourage
you to go back and read it after you’re
finished here. I get warm fuzzies
knowing our younger audience is tak-
ing things so seriously. Does this
mean our jobs will soon be in jeop-
ardy? Don’t think of them as competi-
tion, they’re just helping to increase
the ingenuity pool.

ELECTROPHYSIOLOGICAL
STIMULATOR

Tools for research have been greatly

improved, thanks to the digital realm.
This is certainly true for the biological
research sector. The combination of
sophisticated software packages and
digitally controlled electronics has led
to the development of extremely accu-
rate and highly flexible tools. Professor
Bruce Land (br14@cornell.edu), teacher
of the Microcontroller Design (EE 467)
course at Cornell, entered such a
device in the Atmel contest. He devel-
oped an electrophysiological stimula-
tor that included a Matlab GUI that
was written to allow you easy control
of the stimulation parameters.

An Atmel AT90S8515 microcon-

troller received instructions via its seri-
al port to control output pulse timing.
As you can see in Figure 1, the output
pulse train is determined by three
variables: pulse count, pulse delay (off
time), and pulse duration (on time).
The pulse train can be initiated once
via a push button or it can be repeated
automatically. A repeated pulse train
includes a pulse train separation time.

One of the most important issues

concerning the application of electrical
stimuli for neuron research is signal
isolation. Not only can system noise
have a negative affect on the experi-
ment, but there are also safety issues

RISCy Business

i

Last month, Jeff gave
us a glimpse into the
minds of several engi-
neering students
whose projects were
entered in the Atmel
Design Logic 2001
contest. This time
around, he describes
four more designs and
the project-oriented
curriculum that nur-
tured them to fruition.

Jeff Bachiochi

FEATURE
ARTICLE

Part 2: Impressive Student Designs

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Obviously, safety is a primary concern
for any equipment directly connected
to a live subject. Although battery
operation has total line isolation prop-
erties, good circuit isolation can also
be achieved by proper circuit design.

WIRELESS COMMUNICATION

Although pagers address an impor-

tant need, oftentimes you probably
wish you could reply to a page mes-
sage. Two-way paging can be accom-
plished today with a cellular phone or
wireless e-mailing. How about a limit-
ed-range wireless device that doesn’t
require a monthly charge? After ask-
ing themselves that same question,
Johnny Tseng (jjt9@cornell.edu) and
Ajay Deonarine (add4@cornell.edu)
answered that need.

Each stand-alone communicator

requires an AT90S8515 microcontroller,
a Holtek HT-648L decoder and HT-640
encoder, an Entron TWS434 transmitter
and RWS434 receiver, a 4 × 20 character
LCD, and a 3 × 4 keypad.

A conversation protocol assures

message reception by requiring
acknowledgement responses from the
called unit. The separate 434-MHz
transmitter and 434-MHz receiver
handle RF communication. When the
data pin is high, the transmitter’s RF
carrier is turned on.

to consider when dealing with connec-
tions to line-powered devices. Isolation
is accomplished by using a Burr Brown
5- to

±

15-V DC/DC converter (see

Figure 2). The pulse output gates the
converter on and off. The rise and fall
times of the DC/DC converter that is
controlled by the output pulse train
are in the 50-µs range. This is much
faster than the neuron bandwidth, but
less than the minimum pulse duration
(100 µs) of the stimulator.

The amplitude of the pulse train is

handled via the pulse width modula-
tion (PWM) output of the micro. A
0 to 50% PWM duty cycle output is
filtered to produce a 0- to 2.5-V con-
trol voltage. This control voltage is
applied to an op-amp/transistor cir-
cuit, creating a 0- to 30-mA controlled
current source for the LED of an
H11F1 optocoupler. The FET receiver

acts as a variable resistor in series
with the DC/DC converter’s out-
put. LED photons perform isolated
control of the FET. The pulse out-
put amplitude can be controlled
from 0 to 25 V (0 to 100%).

The micro also produces an addi-

tional output. A sync output pulse
is created at the beginning of each
pulse train (multiple syncs in Repeat

mode). The sync pulse is handy for
triggering an oscilloscope or some

other testing device (see Photo 1).

The PC makes sense as a user inter-

face to lab equipment these days
because no lab is without one. There
is a significant reduction in the cost of
a product that does not incur keypad
and LCD hardware costs, so take
advantage of what’s already available.
The combination of available software
and hardware can really shorten your
development cycle.

According to Professor Land, a stim-

ulator is an analog device that was
limited to a few waveforms just
10 years ago. The microcontroller can
guarantee a real-time response, while
a PC generates the user interface.

Because teaching makes large

demands on batteries, Professor Land
found that this novel isolation circuit
eliminates the problem of dead batter-
ies for students in the laboratory.

Figure 2—A simple transistor is used as an RS-232 inverter into the RX input of the Atmel microcontroller. A linear opto-FET handles the output attenuation of the DC/DC converter.

Repeat time

Sync pulse

Delay
time

Duration

Pulse train

Delay
time

Figure 1—You have control of the stimulation parame-
ters via a Matlab GUI.

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multiple timers, flexible I/O, and hard-
ware interrupts. However, they had to
make some I/O trade-offs in order to
fully interface the RF circuits. So, they
limited the keypad to a 3 × 4 matrix.
This requires you to make multiple
key presses to obtain some characters.

Code development was performed

in C with CodeVision’s development
tools. Johnny and Ajay felt it was nec-
essary to develop in a higher-level lan-
guage than assembly because of the
project’s intricate software protocols.
If they had more time, they would
have used a larger LCD to view addi-
tional (and larger) messages.

HOME AUDIO CONTROL

Routing audio and video cables is a

guy thing. Let’s see, cable goes into
the VCR and then into the TV.
Nintendo’s video enters the TV AUX
and audio through the stereo’s amp.
The VCR’s audio goes into the TV,
and then the TV’s audio goes into the
stereo. Or is it the TV’s audio into the
VCR? Did you follow that? What’s
needed is the Home Audio Control
center developed by Jeffrey Tyhach
(tyhach@stanford.edu) and Jason
O’Connor (jmo17@cornell.edu).

Atmel’s AT90S8515 microcontroller

makes it all happen. With this system,
one of four audio sources can be rout-
ed into the stereo’s audio inputs (see
Figure 3). A Texas Instruments
SN74LV4052 dual four-channel analog
mux handles the source switching
after the source signals are biased to
2.5 V. AC coupling the mux output

removes this bias. The audio
sources can be commanded via
the ’8515’s IR transmitters.
The micro generates a gated
40-kHz clock by enabling an
output port pin (IR output) to
toggle the timer, compare, and
clear. With pulse-coded IR sig-
nals, a logic 0 is represented
by a 600-µs burst of 40 kHz
followed by 600 µs of silence,
while a logic 1 is represented
by a 1200-µs burst of 40 kHz
followed by 600 µs of silence.

The IR output signal passes

through a digital mux using
the same two-channel selection

control signals as the analog

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The micro places a parallel byte of

data on the Holtek encoder’s data port.
The transmission of the data byte is ini-
tiated by raising the encoder’s TE input.
The transmission packet contains four
pieces of information: a pilot (or
silence) period, sync period, address
code period, and data code period. The
address code period contains 10 bits of
address taken from the state of its
10 address input pins. The bit time of
the encoder’s transmission is set exter-
nally with a resistor. Thus, the trans-
mission of a single byte requires a cer-
tain amount of overhead. The RF
receiver’s data output is high when an
RF carrier is being received. The Holtek
decoder receives all the data from the
RF receiver, but rejects everything
that does not conform to its
format. The decoder’s received
address code period must
match the 10-bit address on its
address input pins before the
received data code period is
considered to be good. Data is
read from the data outputs
after the decoder’s VT output
bit rises. The micro uses VT as
a signal to read the data byte
via its input port.

The 3 × 4 keypad is scanned

by the ’8515. To allow these
12 keys to perform alphabetic
entry, a couple of keys were
designated as shift 1 and shift 2.
When either key is pressed

prior to any other, the second
key takes on an alternate (or
shifted) designation. This
allows for 10 single-stroke
designations and 20 two-
stroke designations.

The 4 × 20 character LCD

allows you to read incoming
messages and compose outgo-
ing messages. An expiration
timer helps recover from
being stuck in a loop waiting
for an operation that may
never occur (i.e., an acknowl-
edgement from a unit that it
is out of range or off).

This wireless messaging

project did not require a cen-
tral station for communica-
tions. The idea was to let
portable devices communi-

cate with each other independently.
One advantage (or disadvantage) is
that this application allows all the
code to be the same for each device.
Johnny and Ajay agreed that because
all units run the same code, the code
was designed to encompass all possi-
ble events. This made coding and
debugging difficult.

The use of the Holtek encoder and

decoder chips relieved the micro-
processor from having to deal with
raw receiver output. Only data that’s
sent using matching address codes on
both the transmitting and receiving
device ever get to the micro.

The two designers discovered that

implementation was easy because of
several clever features in the micro:

Satellite

unit

Satellite

unit

Base

unit

Amplifier

Sony Mini Disc

Sony CD

PC Winamp

Tuner

16

16

Audio

in 1

Audio

in 2

IR out 1

IR out 1

IR out 2

Audio

in 3

UART

link

Audio

in 4

Audio

out

Figure 3—Look at how the external audio equipment interfaces with
the Home Audio Control Center. Multiple satellite control units allow
for the control of the audio center from different locations.

Robot

arm

Potentiometers

Robot arm motors

Reed relay switches

AT90S8535

Manual

control box

Photosensors

Mechanical

connections

Mechanical

connections

Training

push-pull button

Replay

push button

Figure 4—This block diagram shows how the project’s circuitry breaks the
original link between the manual control box and the robot arm’s motors.

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mux. This allows the IR transmissions
to be routed to the appropriate source
and separate IR LED transmitters.

Support is included for Winamp,

which is a common PC audio MP3
player via a serial port. When Winamp
is the active source, it sends title infor-
mation to the micro through the serial
port. The microcontroller scrolls this
on its single-line, 16-character LCD. A
4 × 4 keypad lets you choose an audio
device and command the source via
preprogrammed IR commands. An
expanded array of keypad functions is
available when using a shift key on the
pad. Multiple keypads and LCDs may
be added as satellite controls. Because
LCDs have busy feedback, busy bits
(bidirectional bit 7) from all LCDs are
OR’d into a single port input bit to
produce an “any LCD busy” input bit.

Jeffrey and Jason wanted to create a

device that could be controlled from
anywhere in a house. They decided that
the best way to do so would be to
devise a bus protocol for the keypad
and LCD so they could be located at
practically any distance from the audio
equipment. However, finding a feasible
way to accomplish this proved to be
difficult and time-consuming. So, they
implemented a parallel approach and
allowed other design issues to take
precedence. In the end, the parallel
approach wasn’t elegant, but Jeffrey and
Jason conceded that it was functional.

Most of the code was developed

using C. The IR transmissions required
a bit more attention. For the regions
where timing was critical, they wrote
the assembly code directly.

Jeffrey and Jason found that their

LCD panels were unusual, but every-

thing worked well after they learned
that the 16-character single-line dis-
play was actually mapped into two
separate areas.

At present, their design acts only as

a router for audio. If they had more
time, however, they would have tried
to design control over volume, auto
fade, and tone qualities.

The more time you spend in front of

your computer, the more you’ll proba-
bly like Winamp’s features. These guys
considered the audio source to be as
important as their normal stereo gear;
and the special attention they gave to
that interface demonstrates its value.
Receiving song titles and times, as
well as controlling what was played,
turned out to be a new, thought-pro-
voking experience for both of them.

ROBOTIC POSITION FEEDBACK

Although robots have not put us all

out of work, they’ve taken the monot-
ony out of many industrial production
jobs. Robots can work around the clock
without coffee, and their importance
has opened up new fields of opportunity
for those who are interested in robotics.

A number of inexpensive robotics-

related learning tools (and some toys)
are available from numerous sources.
Philip Ching (pc59@cornell.edu) and
Metha Jeeradit (mj48@cornell.edu)
used Jameco’s OWI 007 robot arm kit
for their Robotic Position Feedback
project. The OWI 007 is a five-axis
robotic arm that’s operated by five
two-position switches, which apply a
positive or negative voltage to one of
the five DC motors.

An Atmel AT90S8535 microcon-

troller serves as the arm’s brain, so to
speak. The operation requires the sep-
aration of the control buttons from
the motors (see Figure 4). The buttons
become inputs to the micro, while the
motors are controlled by the micro via
reed relays on output bits. Philip and
Metha enhanced the original open loop
system by adding sensors to each axis
of the robotic arm’s movement. Feed-
back from the sensors allows the actu-
al position of each axis to be read back
by the micro through its input bits.

Two sensor types were used in this

project, resistive and opto. The inter-
nal 10-bit ADC reads three resistive

Photo 1—The top trace shows a sync pulse displayed
at the center of the trace. The second channel dis-
plays a train of two 2-ms pulses with 3-ms delays
across the project’s isolated output.

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sensors (potentiometers) as analog
voltages. The positions of the remain-
ing two joints are sensed by two sets
of LED/phototransistor pairs (see
Figure 5). As the joint moves, a clear
strip of plastic with black marks is
moved between the sensors. The prop-
er spacing of the marks, based on the
spacing of the sensors, allows the
micro to determine the direction of
movement and relative position.

Three modes of operation are

included: Normal mode passes button
commands to the motors; Training
mode is similar to Normal mode, but
the final position of each axis is
stored; and Playback mode returns the
arm (each axis) to the position stored
during Training mode.

In a perfect environment, a robot

might perform a task successfully with-
out any feedback. There are so many
potential problems with an open-loop
scheme that few engineers would be
foolhardy enough to use it; that is,
unless you wish to run the risk of
making a flawed shift of widgets (e.g.,
no hole because of a broken drill).
Feedback gives the system confidence
that things are the way it thinks it is.

Philip and Metha found the poten-

tiometer to be robust in providing
joint position for the shoulder, elbow,
and gripper. The optosensor was ideal
for detecting the rotational position of
the base and wrist.

They experimented with Hall effect

sensors and magnets as another con-
tact-less solution; however, their exper-
iment was unsuccessful and took up
too much time (two weeks worth of
experimentation). In addition, they
found it difficult to create a masking
strip for the optosensors. Because the

microcontroller has A/D
inputs, sensing the poten-
tiometer’s position turned
out to be easier than count-
ing and adjusting pulse
counts to determine position
with the optosensors.

Reed relays kept the motor

interface simple. The appli-
cation was written in small
increments, starting with
Manual mode. This afforded

them the opportunity to
check out the push-button

control inputs and the motor enabling
reed relay outputs. Ah, another vote
for starting with small tasks and
building up gradually into the great
application in the sky. Every race
begins with a carefully placed first step.

CU’S DESIGN CURRICULUM

Professor Land does more than teach

the EE 476 course at Cornell. He sees to
it that each student can take what’s
presented in the textbooks and apply it
to solve a real problem. This is much
more than theoretical problem solving.
Professor Land believes in project-ori-
ented courses because they afford stu-
dents the freedom to make mistakes
and correct them in the context of an
incomplete specification. He explained
that students become extremely moti-
vated when they can pick their own
projects to stimulate the real world.

Atmel and Cornell seem to have a

successful relationship. According to
Professor Land, the RISC-like archi-
tecture, simple I/O model, low power,
and easy flash memory programming
make the AVR an attractive tool to
implement in a teaching environment.
You can find a link to Cornell’s engi-
neering web page on Atmel’s web site.

The short three-month course packed

in some intense groundwork toward a
final project. Preliminary assignments
included: timing and interrupt-driven
code; reaction time measurements; a
Cricket call generator; a security sys-
tem with keypad entry and concurrent
serial administration; a sine wave gen-
eration; and a thermostat with an ana-
log sensor and fan control.

The course’s software focus was on

C, which can be used with embedded
assembler routines to optimize for

Jeff Bachiochi (pronounced BAH-key-
AH-key) is an electrical engineer on
Circuit Cellar’s engineering staff. His
background includes product design
and manufacturing. He may be
reached at jeff.bachiochi@circuit
cellar.com.

RESOURCES

EE 476 Microcontroller Design
course information
instruct1.cit.cornell.edu/courses/
ee476/

Professor Bruce Land, Cornell
University
www.nbb.cornell.edu/neurobio/
land/

SOURCES

AT90S851/8535 Microcontrollers
Atmel Corp.
(408) 441-0311
www.atmel.com

HT-648L Decoder, HT-640 encoder
Holtek Semiconductor, Inc.
www.holtek.com

OWI 007 Robot arm kit
Jameco Electronics
(800) 831-4242
www.jameco.com

TWS434 Transmitter, RWS434
receiver
Reynolds Electronics
(719) 269-3469
www.rentron.com

SN74LV4052 Analog mux
Texas Instruments
(800) 336-5236
www.ti.com

speed. Obviously, Professor Land
placed an emphasis on timing-related
issues and task scheduling.

I wish to thank Professor Land not

just for his help in pulling off this fea-
ture, but also for providing the kind of
opportunities that will make a differ-
ence for his students. You can visit
Professor Land at 42

°

26.836’ north,

76

°

28.744’ west. If you don’t have GPS,

you can stop by W246 Mudd Hall,
Tower Road, Cornell University, Ithaca,
NY. Yes, I’m ready to go back to school
now, especially if these are the kinds
of challenges that await a student.

I

Mechanical flap
from base or wrist

To

microcontroller

input

To

microcontroller

input

.

.

.

.

.

.

Figure 5—For some joints, optical encoders were designed using dis-
crete LEDs and phototransistors. Optical barriers that are as wide as
the distance between device pairs can provide directional information.

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his project start-

ed with a request

made by a friend of

mine who owns a small

corner shop. He said that he wanted to
be able to turn his store’s lights on
and off without actually being in the
building. I knew that systems to per-
form such tasks exist and that they’re
usually operated with a normal (fixed)
phone. My friend, however, wanted to
be able to use his mobile phone
because he didn’t want to have to
locate a telephone each time he need-
ed to turn on or off his shop’s lights.

Initially, I wasn’t sure about the pos-

sibility of sending tones from a mobile
phone after establishing a call to a
control system. The cost of a call from
a mobile phone was also an issue.
Usually, it’s cheaper to send an SMS
message than establishing a call. So,
with the help of a GSM modem and a
few ICs, I developed a system that
allows my friend to control his shop’s
lights with short message service, or
SMS (not Microsoft’s SMS).

Later, I added the possibility of sta-

tus notification to the system.
Basically, if a refrigerator’s tempera-
ture reaches a certain level, the sys-
tem sends notification without requir-
ing my friend to make a call. The

most important feature, however,
allows him to control the shop from
any location (provided his mobile phone
works), and then receive confirmation
that certain actions were completed.

After I had the control system run-

ning, I realized that I could easily con-
trol other things by changing a little
in the hardware. Also, I changed the
firmware to include more commands,
most of which were protected by a pass-
word (I’ll explain this later), and imple-
mented a list of authorized phones.

New firmware releases included the

possibility of dynamically changing the
text messages and multiple notification.
Essentially, when my friend receives
notification that a certain action has
been performed, other phones, such as
his wife’s, receive the same notice.

HARDWARE

The Supervisor is built around two

PCBs and a GSM modem. The whole
set is assembled in a standard metal-
lic case and powered by a wall
adapter (see Photo 1). You can see the
Supervisor’s building blocks in Figure 1.

The main board is basically an

AMD SD186ES demonstration board
that’s slightly modified (see Photo 2). I
decided to use the Am186 family of
microprocessors because I was con-
cerned about the code size needed to
implement the Supervisor’s function-
ality (i.e., all of the text processing).

So, starting from the AMD SD186ES

demo board’s schematics, I took out
the LEDs that are usually found in
those boards (I needed those PIOs for
other purposes). I also changed from
an Am186ES to an Am188ES because
an 8-bit bus width was enough. This,
in turn, simplified the task of finding

Office Supervisor

t

Joan developed an
SMS-based system
that allows his friend to
control the lights in his
corner store via a cell
phone. Soon there-
after, Joan found that
minor changes in the
system’s hardware
and firmware afforded
him other options like
monitoring the refriger-
ator’s temperature.

Joan Slavat

FEATURE
ARTICLE

A Control System Based on SMS

Photo 1—The Supervisor has a metallic case.
Therefore, the GSM modem antenna has to be placed
outside the metal casing.

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Out of the eight input chan-

nels, two of them have a spe-
cial meaning. Channel number
four is used to read the status
of an on-line or off-line switch.
This assures that no command
will be processed while an off-
line condition is detected.
Channel number eight is used
for testing purposes. I protect-
ed the input channels with a
series resistor and decoupling
capacitors. You can see the
input circuitry in the auxiliary
board’s schematics. If you
have experience in protecting
inputs, then you would prob-
ably suggest adding tran-
szorbs, removing the polarized

capacitor, and adding pull-up and pull-
down diodes. I haven’t done much
testing with this input circuitry
because the input signals I expected
to handle were clean.

The boards are joined via a connector

that resembles a type used for PC-104. I
included signals not found in the origi-
nal PC-104 bus. I wanted all of the PIO
signals available on the auxiliary board.
By changing the hardware on that
board, I can adapt the Supervisor to
handle different input signals and differ-
ent numbers of outputs while main-
taining its main functionality.

THE DEVELOPING SYSTEM

I developed the software in a PC

platform. I used AMD’s E86MON
monitor, Paradigm’s locate and debug
utilities, a standard C compiler and
linker, and a terminal program.

In addition to providing the schemat-

ics for the demo boards on the Am186
family, AMD supplies the source code
for the monitor. AMD grants you the
right to distribute and modify it as long
as the copyright notice is not altered.

The monitor provides you with a

simple way of loading programs into
the flash memory, starting from a hex
file. In addition, it provides you with
a debugging utility to easily trace a
program, examine memory locations,
and alter register contents.

Few changes in the E86MON source

code are needed to adapt it to the
Supervisor’s main board. Basically,
you have to change the clock frequen-

16-bit wide RAM and flash
memory devices (or using two
8-bit chips).

Regarding the reset circuit, I

kept the TL7705 by Texas
Instruments. This chip pro-
vides a reset signal for the
microprocessor and auxiliary
board with the help of two
resistors, a capacitor, and a
push button. Alternatively,
you can use an RC network
plus a diode because the micro-
processor *RES input pin has
Schmidt trigger characteristics.

The main board contains the

Am188ES micro, 128 KB of
flash memory (Am29F010), and
128 KB of RAM. You can down-
load complete diagrams for this board
from the Circuit Cellar ftp site. I will
not explain this board in detail
because connecting those ICs is pretty
straightforward. However, I’ll say a
word or two about the microprocessor.

I chose the Am188ES instead of the

Am188ER (or other Am186 family
member) because it features two serial
ports. One port is used to connect to
the GSM modem, and the other is used
for debugging purposes. Later on, I’ll
describe the development system I used.

The auxiliary board basically con-

tains interface circuitry between
microprocessor PIOs and the external
world. The RS-232 drivers for both
channels are powered by a single 5-V
supply. And eight digital input chan-
nels contain protection circuitry in
order to avoid damaging the micro-
processor. Also included are three out-

put channels through latching relays,
status LEDs, DIP switches, and a volt-
age regulator. Both boards are assem-
bled in Photo 3. The schematics for
this board are also posted on the
Circuit Cellar

ftp site.

For the output channels, I used

latching relays because they provide
an interesting behavior for this partic-
ular application. Suppose you activate
a certain device with an output chan-
nel (e.g., a lamp). After a blackout, you
would have to activate it again by
sending a new SMS message if the
relay in the output can’t remember its
state prior to the blackout. A latching
relay maintains the state it had before
the blackout. Newer firmware ver-
sions keep a copy of the current out-
put status in flash memory. Therefore,
after reset, the previous statuses are
set again in the outputs.

Main board

Am186ES, RAM flash memory

Input

circuitry

Input

circuitry

Input

circuitry

Latching

relay

Latching

relay

Latching

relay

x

x

x

Status LEDs

Serial port

Serial port

GSM modem

Input

sensors

Paradigm debug

Figure 1—Check out the Supervisor’s building blocks.

Listing 1—This is the AT command sequence to select a message server and send an SMS message.
It’s assumed that the

PIN is 5555.

AT

OK

ATZ

OK

AT+CPIN?

+CPIN: SIM PIN

AT+CPIN=5555

OK

AT+CSCA=+34607003110

OK

AT+CMGS=+34670572626

> This is a test message

OK

background image

Alternatively, you can try modifying
the hex file. With the help of the map
file, it’s not difficult to find where the
40000000L constant is stored.

Whether you use the modified or

unmodified version of the E86MON,
you should be able to see the wel-
come message from the E86MON
after you program the flash memory,
plug it into the PCB, and apply power.
At that point you’ll know that the
main board works and is ready to
accept a program you wish to run.

To load programs, send the hex file

using an ASCII protocol in the termi-
nal program. After successfully
receiving it, the E86MON will record
its starting address in flash memory.
Following reset, the monitor will
check if a program has been loaded in
flash memory. If so, it will start exe-
cuting it.

During the debugging phase, the

program that will be stored in flash
memory is called PDREM.HEX. This
program provides the necessary inter-
face to the Paradigm debug utility (to
be run in a PC).

Generating PDREM.HEX for a spe-

cific board is a simple task. By modi-
fying the DCOMMS.C file, you can
choose the clock speed, data rate, and
serial port number. No major compil-
ing problems will arise because
Paradigm debug let’s you choose a
compiler version during installation.

After loading PDREM.HEX into

flash memory, you might want to ver-

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cy and remove the code that lights the
LEDs in the demo board. The micro-
processor PIO pins that drive the
LEDs are used in the Supervisor for
different purposes. To remove the
code that drives the LEDs, you need
to alter two routines,

PostLEDs()

and

AutoBaud().

In its original form, the monitor can

adjust the data rate in the serial port
to one of the incoming characters. So,
the pattern in the LEDs will change as
you type in characters. This is the code
that you need to remove. The modified
E86MON source code is posted on the
Circuit Cellar

ftp site.

I used the Am188ES microprocessor;

however, you can choose a different
member of the Am186 family because
the monitor will still be able to identi-
fy the microprocessor. Regarding the
RAM and flash memory, the monitor
will find its size and position within
the 1-MB addressing space. Try not to
use flash memory from a manufacturer
other than AMD, because the monitor
will not be able to identify it and will
refuse to program it. Otherwise, you
will have to modify in the FLASH.C
module to include the identification of
the new flash memory device.

When compiling the modified

source code, you will need Microsoft
Visual C++ V.2.0. I tried using other
compilers (mostly Borland versions),
but there was no way to compile the
source code. It’s not that the code
provided by AMD contains errors,
but that you can find lines such as:

typedef unsigned char BYTE
#define ROM _based ( _segname

(“_CODE” ))

typedef const BYTE ROM ROMBYTE;

Most compilers will report such code
as erroneous (even older versions of
the Microsoft C++ compiler did the
same). I contacted AMD’s technical
support. They said that the best thing
to do was to find that specific version
of Microsoft compiler.

If you don’t have that C compiler

version handy, you can still use the
monitor in its unmodified form
(EMON321B.HEX file). If you do this,
stay with a 40-MHz frequency and
reprogram the PIO at a later time.

ify that it works by using a utility
(RTTEST.EXE). This utility will thor-
oughly test the serial port because
debugging is achieved through the
serial port. Don’t proceed if an error is
reported by this utility.

As soon as the debugging phase is

over, the PDREM.HEX file needs to
be erased from the flash memory, and
the Supervisor firmware will be
downloaded to the flash memory.

SENDING SMS MESSAGES

Sending SMS messages with a GSM

modem is a simple task. Basically,
you need to select the message server
and send the message itself. This func-
tionality is provided by an enhanced
AT command set in the modem.

Before sending the commands to the

modem, you may have to unlock it by
issuing the personal identifier number
(PIN). Listing 1 shows the AT com-
mand sequence needed to send an SMS
message. I used a GSM modem con-
nected to a PC and a terminal program.

In case you want to start sending

SMS messages before I explain the AT
commands involved, I need to say a
word about the cable you’ll need to
connect the modem and PC. I would
suggest using a cable that connects all
of the relevant signals in a serial port.
You definitely need to connect the
RTS, CTS, DTR, and DSR.

The

AT+CPIN? command is used to

find out if the modem needs to be
unlocked. Following this inquiry, the

Listing 2—To retrieve SMS messages from the GSM modem, use this AT command sequence. If no mes-
sage is available, an ERROR string is returned.

AT

OK

ATZ

OK

AT+CPIN?

+CPIN: SIM PIN

AT+CPIN=5555

OK

AT+CNMI=0,0,0,0,0

OK

ATS0=0

OK

AT+CMGL=4

ERROR

AT+CMGL=4

+CMGL: 1,"REC UNREAD","+34670572626","23/04/02 08h46m52s"

This is a test message

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AT+CSCA=+34607003110 command
will select a message server. Finally,
AT+CMGS=+34670572626 will prompt
you with the character “

>”, inviting

you to type in the text of the message.
A carriage return will end the text
entry and send the message. You don’t
need to select the message server again
to send additional messages.

The modem configuration needed

to receive SMS messages is basically
the same. However, a couple of issues
should be considered.

I don’t want the modem answering

incoming calls, just SMS messages.
Therefore, the

ATS0=0 command will

prevent the modem from answering
an incoming call.

Also, I don’t want the modem send-

ing notifications of new SMS messages
received. I will poll the modem for new
messages. The

AT+CNMI=0,0,0,0,0

command instructs the modem not to

send new message notifications. Note
that periodically, the microprocessor
will poll the modem using the
AT+CMGL=4 command. The modem
will answer this command with a
text string containing all of the mes-
sages that have been received
(unread and previously read ones)
and not deleted.

If no message is available, the

modem will answer an error string.
Take a look at Listing 2 to see the
results of those commands.

INCOMING MESSAGES

As I mentioned earlier in the arti-

cle, the Supervisor will poll the
modem to check if new messages
were received. If one or more messages
have been received, the

AT+CMGL=4

command will retrieve them from the
modem. Note that a typical answer to
the command will be:

Listing 3—Note that for programming and erasing flash memory, there are two main routines. The
BiosUpdateFlash routine is called as a result of the software interrupt.

*****************************************************************

This routine is executed as a result of the software interrupt.

The parameters are on stack but in a different position. wPSW,

wBP, and *ptrFAKE account for the offset of the original parame-

ters in the stack.

*****************************************************************

#pragma argsused

void far interrupt BiosUpdateFlash( WORD wPSW, WORD wBp,BYTE

far * ptrDummy,BYTE bOper,WORD wSeg, WORD wOff,BYTE bDatum,BYTE

far * bRes )

{

switch ( bOper )

{

....................

}

}

*****************************************************************

This routine is the common entry point for all the functions that

update the contents of the flash memory. Here are the parameters:

bOper is the operation to be done on flash memory (erase and pro-

gram); wSeg is the segment of the address where a byte is to be

programmed; wOff is the offset; bDatum is the datum to be pro-

grammed; *bRes is the address of a variable to hold the result.

*****************************************************************

#pragma argsused

void far BUpdateFlash( BYTE bOper, WORD wSeg, WORD wOff, BYTE

bDatum, BYTE far * bRes )

{

asm mov sp, bp

//Deletes local variables that the compiler might have alocated

asm int FLASH_PROG_INT

//Software-initiated interrupt

}

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+CMGL: 1,"REC UNREAD","+

34670572626","23/04/02 08h46m52s
"<CR><LF>This is a test message

Extracting the relevant information
from the string above is simply a mat-
ter of text processing, so be sure to
have routines such as

'InStr$',

'Trim$', or 'Left$' (for the Visual
Basic enthusiasts) handy.

You need to obtain the message

number, phone number of the sender,
and contents of the message itself.
I’ve always thrown away the date and
time, although you may consider
keeping them in order to implement
an activity log inside the Supervisor.
Beware that there is no comma
between the date and message text.
The phone number will be used to
check if the message received comes
from an authorized user. The text of
the message is passed to upper soft-
ware layers for further decoding.

The message number (i.e., the num-

ber after

+CMGL:) is used for message

deletion. The

AT+CMGD=x command is

used for this purpose. Here, “

x” is the

message number you want to delete.
You have to do this deletion because
after reading a message, the modem
will only change its status from REC
UNREAD to READ. The

AT+CMGL=4

command will always retrieve a mes-
sage until you delete it.

THE FIRMWARE

The purpose of this article is not to

explain the entire set of
commands that can be
implemented in the
Supervisor and operated
from a mobile phone.
However, I will summarize
some of them in an effort
to explain certain features
that need to be implement-
ed in firmware to properly
handle those commands.

The text of an SMS mes-

sage to activate a certain
output has the form
a+s+pwd. Here, “s” indi-
cates the sensor number
(one to eight), and “

pwd” is

a four-letter password
(token) that you should
know. The password is

used to prove that you’re authorized
to perform an action. Accordingly,
d+s+pwd deactivates a certain out-
put. When the password concept
appears, a command to change the
password is needed:

c+xxx+yyyy+xxxx+yyyy

Here, “

xxxx” and “yyyy” are old and

new passwords. Recent firmware ver-
sions also include commands to change
the various texts in the SMS messages
that the Supervisor may send as an
answer to a certain command. You
may have more than one Supervisor
installed and want to add text to iden-
tify the one from which you receive a
message. To provide this functionali-
ty, I had to keep the data/text in non-
volatile memory. Obviously, flash
memory was the only choice.

Programming data into flash memo-

ry may look like an easy task, especial-
ly after consulting the datasheet. To
do this, you write an autoselect
sequence, select the address, write
the data, and wait for an unlock sta-
tus. However, a problem appears
when you realize that it is impossi-
ble to program a flash memory
device with a program that’s stored
in the same device.

Note that as you send the above

sequence of commands, the micro-
processor is doing fetch cycles to
this same device to read the new
instructions to be executed.

Therefore, the flash memory device
will never understand that you are
trying to program it.

At this point, you have two options.

The first is to use a second flash
memory device to store the configura-
tion, which is selected using a differ-
ent chip select (CS) signal. Your sec-
ond option is to run the program from
RAM while you are programming (or
erasing) the flash memory device.

I chose the latter of the two options.

Basically, you need to copy the vari-
ous routines involved in flash memo-
ry programming from flash memory
to RAM, jump to execute the rou-
tines in RAM, and jump again to
execute the code from flash memory.
Using an unconditional jump (

jmp)

instruction is impossible because you
won’t know the RAM address from
which to execute the piece of code at
compile time. I used software inter-
rupts to jump to a specific address
because the interrupt will fetch the
address of the service routine from
the interrupt vector table. The table is
loaded at run time.

Next, you have to consider whether

or not other interrupts need to be
serviced as you are programming the
flash memory (most likely, timer rou-
tines). If so, the code for those rou-
tines needs to be copied from flash
memory to RAM. Provided that those
routines will be run from RAM, the
vector interrupt table needs to be
updated to point to RAM.

After all this preparation,

you can issue the software
interrupt. The two routines
involved in calling the soft-
ware interrupt and updat-
ing (programming or eras-
ing) the flash memory are
depicted in Listing 3.

Figure 2 shows the con-

tent of the stack after call-
ing both routines. Notice
that the parameters in
each routine aren’t the
same. The extra parame-
ters account for the return
addresses and program sta-
tus word (PSW).

After the flash memory

has been updated, you

need to update the vector

ip

cs

wPSW

wBP

ip

cs

bOper

Offset

Segment

Datum

ip of bRes

cs of bRes

wPSW as declared in the BioUpdateFlash routine

Return address for UpdateFlash routine (ptrDummy)

Operation to be performed in flash memory (erase or program)

Address where Datum is to be programmed

Datum to be programmed

Address for the return value

Figure 2—Take a look at the content of the stack after calling both routines. Notice
that the parameters in each routine are not the same. The extra parameters account
for the return addresses and the PSW.

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CIRCUIT CELLAR

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23

table to point to the code in
flash memory before resuming
the normal execution of
Supervisor code.

There’s another issue that needs

to be addressed when keeping the
configuration in flash memory. In
order to alter the information in
flash memory, you have to erase a
whole sector, usually 16 to 64 KB,
while you’re using a few hundred
bytes to store the configuration.
Again, copying the configuration
from flash memory to RAM, alter-
ing the RAM contents, and pro-
gramming the configuration will
prevent you from loosing parts of it.

I also included a Test mode, which is

initiated by sending an

i+xxxx mes-

sage or closing switch number eight.
Depending on which action initiated
the test, the Supervisor will act accord-
ingly. If the test is initiated by an
incoming SMS message, the Supervisor
will send a complete status report. If
Test mode is initiated by switch num-
ber eight, no message will be sent and
the Supervisor will periodically light

the LEDs and check for the presence of
the modem. No action is performed
on outputs during the test because
you might have devices connected to
those outputs.

Because you might have more than

one Supervisor unit installed or want
a clear indication of which input or
output is active, a way of naming the
input and outputs is also provided
(other than by number). Messages
sent by the Supervisor that report

input and output status use
names instead of numbers.
Even the whole unit can be
given a name.

Despite the fact that the

schematics show eight inputs,
so far I’ve built units using
only three inputs. Therefore,
three DIP switches remain
unused. In recent firmware
versions, I used them to
define input sensor behavior
(i.e., whether the message is
sent on the rising or falling
edge of the input signal).

FUTURE DIRECTIONS

The Supervisor has been working for

some time now. I’ve experienced
some problems because of the GSM
network itself.

SMS messages aren’t delivered

instantaneously. Normally, it takes a
few seconds for the message to be
delivered and get back the answer,
however, I’ve experienced longer
delays. Therefore, checking the signal
strength by using the

AT+CSQ com-

Photo 2—The PCB for the main board is not densely populated. I had
to accommodate the PC-104-like connector.

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mand before going on-line would be an
improvement. Right now, I’m working
on adding monitoring capability to the
Supervisor. Suppose the Supervisor
controls an automatic drilling machine
and that you have received a broken
drilling tool condition message. Some
machines have a mode in which they

Photo 3—This is what it looks like when the main
board and daughterboard are assembled. The daugh-
terboard is a two-sided PCB that can be easily modi-
fied to accommodate various needs.

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SOURCES

Am186ES Demo board, Am188S
microprocessor, E86MON moni-
tor, SD186ES demo board
Advanced Micro Devices, Inc.
(408) 732-2400
www.amd.com

Takamisa relays
Fujitsu Components America, Inc.
(408) 745-4900
www.fcai.fujitsu.com/relays

TL7705 Supply voltage supervisor
Texas Instruments, Inc.
(800) 336-5236
www.ti.com

GSM Modem
Wavecom S.A.
+33 146290800
www.wavecom.com

can be remotely monitored with a PC
(i.e., to start a change drilling tool pro-
cedure). In this monitoring mode, the
Supervisor will accept an incoming call
and act as a cable. The characters
received from the GSM modem are for-
warded to the second serial port (where
the automatic machine is connected).
Accordingly, characters received from
the machine (second serial port) are for-
warded to the GSM modem.

I

RESOURCES

GSM 07.07 Telecommunications
system (Phase 2+), AT command
set for GSM mobile equipment
European Telecommunications
Standards Institute
www.etsi.fr.

Wavecom, “GSM Modem WM01-
G900 User’s Manual.”

Joan Slavat holds an MS in Computer
Science and a BS in Electronic
Engineering. He is a freelance engi-
neer for Code-3. In addition to elec-
tronics, he’s interested in astronomy
and enjoys tracking satellites on
clear evenings. Joan may be reached
at jsalvat@code3.es.

SOFTWARE

To download the code, go to
ftp.circuitcellar.com/pub/Circuit_
Cellar/2002/146/.

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espite the aston-

ishing proliferation

of wireless connec-

tions, plain old telephone

service (analog POTS) still delivers on
price and availability. Credit card ter-
minals and home security systems
provide two of the older, more passé
examples of embedded applications.
But growth in connectivity fuels new
ideas and fosters novel expectations.
Let’s listen in on a dialogue between a
well-connected soft drink vending
machine and its supplier.

Host modem: “Hello?”
Vending machine: “Machine 127

here. Today’s sales were great, but I’m
starting to run low. The temperature
reached over 90

°

F by noon for the last

three days, so I increased prices by
$0.25. Should I raise it another $0.15
until my supplies are replenished?”

Host modem: “Fine. And raise the

refrigeration temperature 5°F at night
to cut costs.”

Embedded modems are different

from the stand-alone modems found
in PCs. Typical embedded modems
don’t have an attached terminal, and
the user interface (if any) is simplified.
The modem need only offer a few sim-
ple commands and options—far fewer
than implemented by the common

Hayes command set. In addition, an
embedded system and its host tightly
script the exchange of information.

Because the content exchange is rel-

atively brief, high data rates are unnec-
essary. Transmitting 1 KB (which is a
lot for many embedded designs) of
information at 300 bps usually takes
less time than negotiating a high-
speed modem connection. Cost and
reliability remain the dominant con-
siderations, and 300 bps provides
robust performance under conditions
that give high-speed modems fits.

Low data rates provide cost savings

in the design of modem and telephone
line interface, also known as the data
access arrangement (DAA). Low-speed
modem chip sets often rely on an
inexpensive but dedicated microcon-
troller. The Cypress PSoC microcon-
troller provides an unprecedented path
to further cost reduction, thanks to its
ability to dynamically reconfigure its
peripheral capabilities.

Dynamic reconfiguration means

that designers can tailor a single
device to a particular application and
then change functions on the fly,
reusing the same peripheral resources
for a completely different task. For
example, a PSoC device at the heart of
an embedded application can easily
morph into a modem, transmitting
and receiving data. When the data

The PSoC 5-Cent Modem

d

If you’re thinking about
adding a modem to an
embedded design,
there’s a smorgasbord
of microcontrollers on
the market for you to
choose from. But, as
Rick explains, a PSoC
microcontroller is the
smart choice for mini-
mizing the cost and
maximizing the func-
tionality of your design.

Rick Hood

FEATURE
ARTICLE

Photo 1—This PCB was designed for an enclosure
with a simple keyboard to facilitate dialing and interac-
tion with a remote PC. Components required to imple-
ment the modem and dialer are outlined is red.

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27

mitted continuously. All data-related
timing is provided locally and refer-
enced to this transition. The FSK mod-
ulator simply converts an outgoing seri-
al bit stream into the time sequence
of corresponding frequencies and the
demodulator performs the inverse task.

UARTs convert between byte-paral-

lel data and a serial stream with start
and stop bits. UART receivers assess
the value of an incoming bit by test-
ing its value at or around the middle
of the bit time. For correct interpreta-
tion of a stop bit tested at 95% of the
way through a 10-bit sequence (halfway
through the tenth bit), the sum of all
timing errors across the connection
must not exceed 5%. Sources of error
include timing inaccuracies in the
transmitter and receiver, as well as
errors induced by line impairments.
Inter-symbol interference, the overlap-
ping of the mark and space frequen-
cies, also contributes to the error.

PSoC MODEM OVERVIEW

The PSoC modem project imple-

ments three major functions: a trans-
mitter, a receiver, and the optional
dual-tone multifrequency (DTMF) gen-
erator for dialing. The transmitter
contains a hardware modulator and
software for start/stop framing and par-
allel-to-serial conversion. The receiver
contains the demodulator. It can be
configured for an off-chip UART or for
an internal UART implemented in soft-
ware or by a digital PSoC communica-
tions block. Figure 1 illustrates the par-
tition of each of these functions into
hardware and software components.

DTMF DIALER

The PSoC modem project organizes

and specifies all DTMF Dialer hardware
resources and related options within a
distinct configuration labeled “Dialer.”
This configuration (or hardware over-
lay) can be dynamically loaded just
prior to dialing a telephone number.

transmission is complete, it can return
those same peripheral assets to their
primary functions in less than a mil-
lisecond. For many applications this
means the modem is essentially free.

BACK TO BASICS

To fully understand how this works,

it’s necessary to start with a brief
overview of the PSoC architecture.
The PSoC MCU includes configurable
analog and digital hardware blocks
(known as PSoC blocks). Unlike a
block of programmable logic, digital
PSoC blocks implement a predefined
set of 8-bit functions. For wider func-
tions, two or more blocks may be
chained together. For example, two 8-
bit PSoC blocks may be combined to
create a 16-bit counter. Analog PSoC
blocks contain op-amps with resistive
feedback or switched capacitor arrays.

PSoC Designer, the integrated devel-

opment environment (IDE) for PSoC
microcontrollers, includes a complete
library of user modules, or predefined
peripherals. You can download PSoC
Designer from the Cypress web site.
User modules are represented graphical-
ly in PSoC Designer’s Device Editor,
where they can be selected and assigned
to specific PSoC blocks. Examples of
digital user modules include timers,
counters, pulse width modulators
(PWM), pseudo-random sequence gener-
ators (PRS), and cyclical redundancy
checkers (CRC). User modules for com-
munication include UART and SPI
functions. Analog user modules pro-
vide amplifier, DAC, ADC, and filter
functions. PSoC Designer automati-
cally generates firmware to configure
the PSoC blocks and provides APIs to
speed development.

BUILD A 5-CENT MODEM

This article outlines a project to

implement a Bell-103 and V.21 com-
patible 300-bps modem using a PSoC
microcontroller. The project, shown in
Photo 1, uses the Cypress CY8C26443
in addition to a minimal number of
external capacitors and resistors. The
MCU costs no more than traditional
fixed-peripheral microcontrollers, so
the cost of adding a modem to an
embedded design can hover in the
vicinity of $0.05 (excluding the DAA).

MODEM BASICS

The DAA isolates and protects the

telephone system and modem hard-
ware from each other. FCC Part 68
regulates DAA requirements in the
U.S. Commonly, a transformer cou-
ples analog signals and voice band sig-
nals between the modem and tele-
phone system. Optically isolated logic
signals provide simple status and con-
trol. Typically, the DAA asserts RING
to signify an incoming call (not to be
confused with the analog Ring signal
paired with Tip to form the Telco
line). To answer a call or pick up the
line in order to dial out, the modem
asserts an OFFHOOK signal.

Bell-103 and V.21 standards specify

full-duplex communication using fre-
quency-shift keying (FSK). The
modem that originates the connection
transmits data on a lower pair of fre-
quencies and receives data from the
answering modem on a higher pair.
Table 1 gives the frequencies mandat-
ed by the two standards.

Mark and space designate the upper

and lower frequencies in each pair,
respectively. In the absence of data,
modems send the mark frequency. A
byte to be transmitted is framed with
a leading start bit and a trailing stop
bit. Following the start bit, data trans-
mission proceeds to the least signifi-
cant bit first. The mark frequency rep-
resents a one bit and space represents
zero. Transitions between the two fre-
quencies should be phase continuous
to minimize noise. Intuitively, this
means that when the frequency
changes, the waveform should change
in the smoothest possible fashion.

Data arrives asynchronously by defi-

nition, but when the transmission of a
byte begins, bits should arrive at the
nominal data rate. Assigning the space
frequency to start bits and the mark
frequency to stop bits ensures that
each byte begins with a mark-to-space
transition, even when data is trans-

Bell-103 (Hz)

V.21 (Hz)

Space

Mark

Space

Mark

Originate

1070

1270

980

1180

Answer

2025

2225

1650

1850

Table 1—Take a look at the tone pairs for transmitting data. They are calculated in hertz. Mark and space desig-
nate the upper and lower frequencies in each pair.

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image to meet the out-of-band noise
requirements of FCC Part 68.

This user module employs a sine

wave look-up table and the techniques
of a numerically controlled oscillator.
The time period set by the interrupt
rate corresponds to a specific phase
angle for each of the two frequencies to
be generated and summed. Each phase
angle corresponds to a forward dis-
placement in the table (modulo the
table size) from one sample to the next.
The sample for the lower frequency of
the pair is scaled by –2 dB and added to
the sample for the higher frequency to
obtain the output value for the DAC.

Two more user modules complete

the Dialer configuration. The instance
name “GainBuf” was assigned to the
first of these user modules; it was
mapped onto PSoC block ASA23. In
this case, a multiplying DAC based
on switched capacitor technology was
selected rather than a programmable
gain amplifier with resistive feedback.
Either would suffice, but selecting the
multiplying DAC simplifies the con-
nection from the DTMF DAC. The

The PSoC blocks employed by the
dialer are later reused by the transmit-
ter, but in a completely different way.

The configuration named Transmitter

keeps its requirements, settings, and
options separate from those of the
Dialer. PSoC Designer IDE automati-
cally generates source code to swap
between these configurations. Photo 2
shows the transmitter configuration
window cascaded on top of a window
displaying the DTMF Dialer overlay.

PSoC Designer incorporates a DTMF

generation user module. Instantiation
of this peripheral within the Dialer
overlay greatly simplifies implementa-
tion of the Dialer’s functionality. The
instance, mapped onto PSoC blocks
DCA07 and ASB13, appears in Photo 2.
This user module provides a wave-
form generator integrating a 6-bit
DAC and an 8-bit timer to generate
interrupts at the output sample rate.
By setting the user module parameters
for a 32-kHz update rate and adding an
external RC filter, you can limit har-
monic distortion to less than 2% and
provide sufficient rejection of the

DAC provides 6-bit resolution of the
multiplicand and two different output
ranges. This offers finer control than
the PGA. The PGA, on the other hand,
offers gains of up to 16 over eight times
greater than the multiplying DAC’s
maximum gain of 31/16.

Convenience suggests selection of

the final user module in this configu-
ration, DialerClk. This user module
instantiates an 8-bit timer to serve
the two PSoC blocks assigned to the
Dialer user module. Reasons beyond
the scope of this article dictate the
time base for the Dialer user module’s
DAC to be at least four times faster
than the update rate and, in any case,
no slower than four times 32 kHz.
Note that full details may be obtained
from the DAC6 user module sheet,
which is best viewed from within
PSoC Designer. Upper bounds on the
time base preclude direct use of the
fixed 24- and 48-MHz system clocks.
However, dividing the 24-MHz sys-
tem clock by 75 with an 8-bit timer
produces a 320-kHz output that’s
suitable for update rates of 32 kHz.

AD422 (Requires 9VDC) $79.00
AD422-1 for 110VAC

89.00

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• Converts bi-directionally

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• Plug in and go. No software

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background image

30

Issue 146 September 2002

CIRCUIT CELLAR

®

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TRANSMITTER DETAILS

A DAC-based implementation of an

FSK modulator offers several attrac-
tive advantages, including the reuse of
DTMF generator code and mainte-
nance of its inherent phase continu-
ity. An alternative strategy proved
more desirable, however, because it
entailed little code space and required
minimal CPU overhead while using
the same number of PSoC blocks.

This alternative approach uses a digi-

tal block to generate a square wave
with a 50% duty cycle at the mark or
space frequency, and smoothes it with
a switched capacitor filter and an exter-
nal RC pole. This is easily achieved
by using a PWM user module, which
requires an input clock and two param-
eters: period and duty cycle. Period is
the divisor of the source clock that sets
the output frequency for a given input
clock. Setting the duty cycle parameter
to half the value of the period yields
the intended result of 50-50.

Two interesting and additional tech-

niques are used to achieve excellent
phase continuity while minimizing
inter-symbol interference. The basic
idea of the first technique is to hold the
PWM period fixed and modulate the
source clock. The second is to use the
modulated source frequency not only
to clock the PWM, but also to clock
the switched capacitor band-pass filter.

It isn’t immediately obvious that

the first technique achieves excellent
phase continuity. Each clock cycle
causes the down-counter to be decre-
mented by one. The key to understand-
ing maintenance of phase continuity
is the realization that the down-count-
er measures the phase of the output
just as as it measures time by counting
clock ticks. If the PWM input clock
suddenly changes its frequency with-
out resetting the down-counter, the
resulting output frequency changes
with the same instantaneous phase
angle (i.e., same count) relative to
both the old and new frequencies. The
larger the period of the PWM, the
finer the granularity of the phase angle
at which the changes take place.

In the modem implementation, a

second digital PSoC block, XmtFreq,
provides a variable time base for the
PWM XmtScale (see Photo 2). Together,
the two divide a 2.4-MHz system clock
to the mark and space frequencies. For
bell 103 originate tones, the XmtFreq
period is set to 16 or 19 as required for
the mark and space frequencies, respec-
tively. The period of the PMW is set
to 118. This results in a frequency
error less than 0.1% in both cases.

In addition to clocking the PWM,

the output of XmtFreq is also routed
to the clock used by the XmtBPF fil-
ter. As previously mentioned, this

causes the filter to shift its center fre-
quency in lock step with the output
frequency, which provides two advan-
tages. First, the group delay also
tracks the output frequency. This lim-
its the extent of the overlap and
under-lap of the two frequencies in
the output of the filter. The second
advantage is that you can use a band-
pass filter with a narrow bandwidth.

Although a low-pass filter also

could have been implemented, the
band-pass transfer characteristic ini-
tially exhibits transition-band roll-off
at 6 dB per bandwidth octave per pole,
and later approaches the 6 dB per
octave roll-off of a low-pass design.
This extra roll-off helps limit the con-
tribution of the lower odd harmonics
to the out-of-band noise.

An interrupt service routine (ISR),

driven by an 8-bit timer (HostComm),
controls start/stop bit generation and
data serialization. Because this ISR
provides other important services, it
could be assigned to either the trans-
mitter or receiver overlay. Both are
loaded during modem operations
because they must execute in parallel.

HostComm interrupts occur at

2400 Hz, so only one out of every
eight interrupts must decide whether
or not to transmit another bit. Every
1/300 of a second, HostComm’s ISR
performs a 1-bit shift of the data byte,
forcing the next bit into the carry bit
of the CPU’s flag register. The value
appropriate for generating the mark or
space frequency is placed in the
XmtFreq period register as determined
by the carry flag.

RECEIVER IMPLEMENTATION

POTS circuits may attenuate the

signal by 40 dB or more by the time it
spans the network. So, separating the
received from the transmitted signal
is of first importance. The receiver con-
figuration uses a differential amplifier
to subtract the transmit signal from
the composite transmit/receive wave-
form. Even though 60 dB of rejection
is possible, it’s sensitive to line
impedance. Thus, 10 dB of rejection is
a more realistic figure.

Following the differential circuit, a

four-pole band-pass filter provides an
additional 20 to 25 dB of rejection.

Data

access

arrangement

PGA

Receiver

Time
base

Sequence

Phone

number

DTMF

dialer

Software

Transmitter

Serializer

Dynamically

reconfigured

overlays

Off-hook Ring

BPF

Timer

PWM

mDAC

Wave

generator

Sum

Software

AGND

SIN

table

Scale

n

x

z

–1

UART

Rx

UART

Rx

Zero

crossing

BPF

FIR

x

Software

∆∑

Figure 1—“Modem” derives from the contraction of the words “modulator” and “demodulator,” functions implement-
ed in the transmitter and receiver sections. The DTMF dialer uses the same hardware peripheral blocks subse-
quently reconfigured to implement the transmitter. Shading identifies features implemented in software.

background image

Beyond this, the detection algorithm
demonstrates good tolerance to mod-
erate levels of cross talk from the
transmit channel. Next, an 8-bit delta-
sigma ADC digitizes the input at 7500

samples per second. This provides
25 samples per bit time.

The foundation of the differential

detection algorithm rests on the
trigonometric identity,

Generally, mixing two sine waves pro-
duces two new sine waves—one at the
sum of the two original frequencies
and another at a frequency equal to
the difference between them. Next,
suppose that one is merely a time-
delayed version of the other,

β = α + ϕ

The equation becomes:

The sum term is double the original
frequency, and the difference term
reduces to a DC offset that depends
on the phase shift induced by the time
delay. For a given frequency, different
time shifts produce different offsets.
Conversely, for a fixed time delay, dif-
ferent frequencies will produce different
offsets. Restated, if you correlate the
received signal with a time-delayed ver-
sion of itself, then the DC offset pro-
duced at the mark frequency will differ

www.circuitcellar.com

CIRCUIT CELLAR

®

Issue 146 September 2002

31

Photo 2—These partial Device Editor views show the Dialer and the Transmitter configurations. A configuration
can customize just a few PSoC blocks, pins, busses and/or global parameters, or even the entire device.

background image

32

Issue 146 September 2002

CIRCUIT CELLAR

®

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RESOURCES

J. Bingham, The Theory and
Practice of Modem Design

, John

Wiley and Sons, New York, NY,
1998.

Clare, Inc., “CYG20XX Cyber-
gate,” DS-CYG20XX-R1, 2000.

Cypress MicroSystems,
“CY8C25122, CY8C26233,
CY8C26443, CY8C26643,”
CMS100002A, 2002.

——— “PSoC Designer: Integrated
Development Environment User
Guide,” CMS10005A, 2002.

SOURCE

PSoC Designer, CY8C26443
microcontroller
Cypress MicroSystems, Inc.
(425) 939-1000
www.cypressmicro.com

Rick Hood earned an MSCS from the
University of Washington in 1993. He
joined Cypress MicroSystems in April
2000. You may reach him at
frh@cypressmicro.com.

from that at the space frequency.
Using a digital filter to eliminate
the 2

α

frequency component

leaves just an offset that distin-
guishes between mark and space.

For optimum discrimination,

choose a delay that maximizes
the difference between the offsets:

The calculation is simple. For

the Bell 103 answer-mode pair,
2025 and 2225 Hz, a 22-sample
delay appears optimal, but 15 sam-
ples come close. Modeling the
algorithm with Matlab provided an
opportunity to test the effects of
frequency error, transmit rejec-
tion, and signal-to-noise ratio
(SNR) on the performance of the
algorithm. Photo 3 shows graphi-
cal output from the model.

OPERATIONAL SUMMARY

The modem performs well in a vari-

ety of circumstances. Bit error rates
(BER) better than 10

–7

have been

measured under ideal circumstances.
Photo 4 depicts live operation of the
demodulator under somewhat trying
circumstances. Future plans include
formal evaluation of performance
under standard test conditions.

The PSoC Multiply/MAC unit facili-

tates implementation of the autocorre-
lation and the digital filter routines by
reducing the amount of code and num-

MARK

SPACE

ber of CPU cycles. At 24 MHz, the
CPU overhead required to support
operation of the modem falls under
20% while continuously streaming
full-duplex data. The differential detec-
tion algorithm accounts for most of
it. Approximately 3 KB of flash mem-
ory and 64 bytes of RAM are required
for a basic modem implementation.
Depending on the options selected, five
to six digital PSoC blocks and nine
analog PSoC blocks are consumed
during modem operations. The pin
count ranges from nine to 11 depend-
ing on the choice of UART receiver.

All PSoC blocks can be
dynamically reconfigured
for arbitrary purposes after
modem operation ceases.

GO RECONFIGURE

A functional, robust

300-bps modem based on
the PSoC microcontroller
is feasible in many embed-
ded designs. Furthermore,
it can be accomplished
inexpensively without
adding hardware other than
the DAA required by every
modem (no data pump, no
controller chip, and no
external active filters). This
clearly shows that dynamic

reconfiguration of peripheral
assets can simultaneously
increase functionality and reduce
part costs. The PSoC architecture
provides the ability to change
designs radically, in midstream,
without changing or adding parts
both during the development
process and later in the field.

Designing with a PSoC micro-

controller places the emphasis
on “Programmable System,” not
just programmability. The over-
all complexity of the project
described here differs little from
what you would encounter using
a traditional microcontroller and
other necessary components.
PSoC Designer IDE helps reduce
system-level complexity through
a consistent graphical user inter-
face, tight integration between
its hardware and software devel-
opment environments, a design

flow that facilitates easy movement
between them, and built-in user mod-
ule documentation.

I

Photo 3—The top graph shows noise and cross talk from the trans-
mitted signal that have been added to the receive signal (in magen-
ta). The middle graph shows the results of filtering the differential
detector’s output with a perfectly clean input and with the noisy sig-
nal from the previous graph. A 30-tap FIR was applied to the clean
output, and an 8-tap FIR to the noisy output. The bottom graph
reproduces the clean waveform and superimposes the result of
applying a zero crossing detector to the output of the 8-tap FIR.

Photo 4—The lower trace displays the input to the 8-bit delta-sigma
ADC; the upper trace displays a direct logic output of the differential
detection algorithm. The analog input exhibits evidence of significant
transmit signal cross talk resulting from an induced impedance mis-
match between the modem and the phone line.

background image

Use the Cypress PSoC

instead of an MCU for

more flexibility, fewer parts and lower cost.

The versatile PSoC

Programmable System-on-Chip

microcontroller, winner of EDN magazine’s Innovation
of the Year Award in the 8- and 16-bit microcontroller
category, is the world’s first MCU that lets you custom
configure the exact part you need.

Graphically select, place, and interconnect
the peripherals you want and adapt the
architecture with PSoC Designer

software.

Dynamically reconfigure a single PSoC
chip multiple times—changing functionality
on the fly in any application.

Reduce BOM cost by reducing the number
of external components.

MCU

later.

There are many more blocks to work with—

and thousands of MCU configurations. To learn more

about our innovative PSoC solutions and to enter a

drawing to win a free PSoC Development Kit

(a $1495 value), visit:

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our extensive mixed-signal library.

Cypress, PSoC, Programmable-System-on-Chip, and PSoC Designer are trademarks of Cypress Semiconductor Corporation. ©2002 Cypress Semiconductor Corporation.

background image

34

Issue 146 September 2002

CIRCUIT CELLAR

®

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his article grew

out of an experi-

ment to see how hard

it would be to build an

8051 web server and write a minimal
TCP/IP stack. It seems like everything
is serving web pages these days, so
why not an 8051? It was not easy, but
it was a fun project. After a few
months of studying ARP and TCP, I
had something up and running.

In this article, I’ll explain how I built

an 8051 web server and describe what I
learned along the way. I’ll also discuss
timing and performance. If you want to
follow along, download the source
code from the Circuit Cellar ftp site.

COMPONENTS

I wanted an 8051 with

enough RAM to hold a
full-sized Ethernet frame
of 1.5 KB, and with ana-
log inputs so it could do
something useful. The
Cygnal parts were my
first choice. The
C8051F005 is fast, and it
has a 12-bit A/D convert-
er and 2.4 KB of RAM.
The C8051F005’s 32-KB
flash memory is large
enough for a reasonably

sized program plus a few web pages.
At first I thought its lack of a conven-
tional bus would be a problem, but it
turned out to be no problem at all.

The Cygnal 8051 makes up for being

just 8 bits with its speedy 25-MIPS peak
performance. The Ethernet controller’s
RAM adds additional buffering capabili-
ty for incoming frames, which is key
for allowing the CPU time to process
a frame while more are received.
Browsers running on fast machines can
easily fire out two or three Ethernet
frames within a millisecond!

For the Ethernet controller, I looked

at the Realtek RTL8019AS and the
Cirrus Logic CS8900A. The former is
inexpensive and NE2000-compatible,
but I’ve used many Cirrus parts over
the years, so I went with the CS8900A.

The CS8900A’s 4 KB of RAM is

enough to hold a number of incoming
frames. As with any Ethernet con-
troller, the datasheet for it is long and
there are many registers to set up. So,
I sat down and read through the data-
sheet to figure out how to talk to it.
By looking at a sample driver, which I
downloaded from the Cirrus web site,
I was able to create an interface in C,
compile it to assembly, and then
hand-optimize the assembly code.

So that’s it, almost everything in

two chips. I added an RS-232 port that
runs at 115.2 KB for debugging, even
though I found Cygnal’s full-speed
emulator to be more than adequate.

BENCHMARKING

The first thing I did when I got the

Cygnal evaluation board was run the
trusty sieve benchmark on it. [1] First,

Build Your Own 8051
Web Server

t

Building your own web
server can be a diffi-
cult task, especially if
you proceed without
proper direction and
the right parts for the
job. Fortunately, Jim
has finished an 8051
server and he’s eager
to walk you through
his project. With this
tutorial, you can avoid
common difficulties.

Jim Brady

FEATURE
ARTICLE

Photo 1—The Cygnal C8051F005TB sits atop my breadboard at the upper-
right. The top ribbon cable connects the 8051 CPU to the CS8900A
Ethernet controller while the lower ribbon cable carries analog signals.

background image

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CIRCUIT CELLAR

®

Issue 146 September 2002

35

of the CS8900A and the corresponding
impedance-matching components for
the 10BaseT interface. I kept wire
lengths to a minimum in the area
between the CS8900A and the RJ45
Ethernet connector.

A thermistor bridge circuit allows

the ratiometric measurement of both
power supply voltage and tempera-
ture. Using a ratio prevents 3.3-V
power supply fluctuations from affect-
ing the temperature measurement.
After linearizing the thermistor char-
acteristic, the firmware displays tem-
perature on the web page.

ETHERNET I/O

Listing 1 shows the assembly code

that reads Ethernet frames from the
CS8900A. Less you think this bit-
banging approach is inefficient, con-
sider that the Cygnal I/O speed is
40 ns while the maximum access time

of the CS8900A is 135 ns. The
CS8900A access time imposes the
limit, not the 8051. I suspect this
method of data transfer is at least as
fast as conventional 8-bit bus I/O.

Figure 1 shows the interface between

the CPU and Ethernet controller. 8051
port lines P1.0 to P1.2 select the CS8900
address. Only three lines are required
because most of the CS8900’s regis-
ters are indirectly addressed. Pulsing
port pins P1.3 and P1.4 generates read
and write strobes. 16-bit data is trans-
ferred in and out of ports 2 and 3.

My first design used the interrupt

output of the CS8900A to interrupt
the 8051 when an Ethernet frame
arrived. The problem with this is that
Cirrus Logic recommends reading
everything out of the chip in the
interrupt service routine. Because the
CS8900A has more RAM than the
8051, I went with polling and only
read the most recent frame. This way
the CS8900A can queue a number of
frames while the 8051 pulls them out

I soldered a 22.1184-MHz crystal onto
the board and wrote a function to
make the CPU use it instead of the
slower on-chip oscillator.

Most of its Cygnal 8051’s instruc-

tions execute in one or two clocks, as
compared to 12 or 24 clocks for stan-
dard 8051s. So, I expected good per-
formance, and indeed the C8051F005
runs the sieve benchmark about 19
times faster than a standard 8051. It
also ran faster than most 16-bit CPUs
I’ve tested, which is impressive because
much of the sieve is 16-bit operations.

To be fair, I should mention that the

Cygnal 8051 has the advantage of run-
ning entirely out of internal memory.
But the results are still representative
of what I could expect of the various
CPUs in this application. To run the
sieve on the C8051F005, I had to scale
it down to fit into RAM, and then
scale the result to allow comparison
to other CPUs. You can see the test
results in Table 1.

BUILDING THE BREADBOARD

Photo 1 shows my breadboard with

the Cygnal eval board mounted atop it.
The board is part of the Cygnal P/N
C8051F005DK package (about $99). It
also includes an RS-232-to-JTAG inter-

face to program the 8051’s flash memo-
ry, IDE, and a full-speed emulator. My
breadboard holds the CS8900A, associ-
ated Ethernet I/O, thermistor circuit,
and RS-232 interface. To hold the
100-lead TQFP CS8900A, I used an
RDI/Wainwright solder mount board.

I connected the evaluation board to

my breadboard with two ribbon
cables, one for analog and the other
for digital. In order to keep the ribbon
cables short to reduce cross talk, I cut
off the prototyping area of the eval
board. In addition, I added a 22.1184-
MHz crystal and cut the trace that
connected the crystal to the I/O con-
nector. I did this to make sure noise
could not get into the oscillator.

The Ethernet transformer and asso-

ciated circuit design in Figure 1 was
taken directly from the CS8900A
datasheet. The eval board operates
from 3.3 V, so I used the 3.3-V version

CPU

Crystal (megahertz)

Sieve—10 loops (seconds)

Cygnal C8051F005

22.1184

0.43

Intel 80C51

11.0952

8.2

Intel 80C196 (16 bit)

18.4320

1.3

Philips XA-S3 (16 bit)

22.1184

1.0

Table 1—The Cygnal 8051 is much faster than a standard 8051, and even faster than some 16-bit CPUs. The Keil
compiler was used for the 8051s, Tasking was used for others, and a large memory model for all.

Listing 1—This code reads an Ethernet frame from the CS8900A. The Cygnal 8051 is so fast that NOPs
must be inserted to meet the CS8900A worst-case access time.

*****************************************************************

This fragment reads the incoming frame from the CS8900A.

Call from C as read_frame(UINT xdata * buf, UINT len).

R6 and R7 point to buf, and the length is in R4 and R5.

*****************************************************************

RSEG ?PR?_READ_FRAME?CS8900

_READ_FRAME:

MOV

DPL, R7

//Set up data pointer

MOV

DPH, R6

LOOP:

MOV P1, #018H

//Take CS8900A CS low, set address

CLR P1.3

//Take CS8900A RD strobe low

NOP

//Allow for CS8900A access time

NOP

//Each NOP is 45 ns at 22.1184 MHz

NOP

MOV A, P2

//Read low byte into port 2

MOVX @DPTR, A

INC DPTR

MOV

A, P3

//Read high byte into port 3

MOVX @DPTR, A

INC DPTR

//Advance data pointer

MOV P1, #038H

//Take RD strobe, chip select high

DJNZ R5, LOOP

//Decrement, loop again if needed

DJNZ R4, LOOP

RET

background image

desirable to hold the entire segment
in RAM to compute its sum. But here
again, if the segment is small, this is
not a problem. You can also handle IP
processing in a small memory space,
as long as you do not try to reassem-
ble fragmented incoming messages.
And you do not need to, because the
other machine’s TCP layer will limit
the size of the message it sends. Only
UDP will send you large, possibly
fragmented messages, and I’m not try-
ing to support that here. To serve a
web page, the only other protocol you
need to worry about is ARP.

A web server must handle ARP

requests because you will receive
them when the other end wants to
find out your hardware address. You
also need to originate your own ARP
requests in order to find out the hard-
ware address of the device you are

36

Issue 146 September 2002

CIRCUIT CELLAR

®

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and processes them one at a time. I
configured the CS8900A to capture
only the frames directed to my MAC
address, plus broadcast frames. If the
8051 had to deal with every Ethernet
frame on a busy network, it would be
in big trouble.

CAN IT BE DONE?

Can a CPU with only 2 KB of RAM

really handle large Ethernet messages
and the complexities of protocols such
as TCP and ARP? Surprisingly, it turns
out that even a few hundred bytes
would suffice. Small RAM footprints
work with TCP because you can tell
the other end to limit the message size.
TCP can, for example, advertise a maxi-
mum segment size of only 100 bytes.

TCP checksums are computed over

the entire TCP segment and placed
near the beginning of it. This makes it

sending to. Of course, you could sim-
ply reply back to the same hardware
address that sent you the frame, but
this would only work for a server (not
a client) on a local network. In addi-
tion, this would get complicated with
multiple simultaneous connections.

ARP is a simple protocol that can

cause big problems for a small server.
An ARP request must be sent, and a
reply received, while a regular mes-
sage is waiting to be transmitted. One
send buffer no longer suffices. You
need more space (i.e., enough RAM to
hang on to the message-in-waiting),
and you must buffer the outgoing and
incoming ARP messages. It’s a good
thing that ARP messages are only
64 bytes long. Figure 2 shows how
ARP fits into the flow of things, as
well as the flow of an Ethernet frame
through the various protocol layers.

Figure 1—The left side shows part of the Cygnal C8051F005TB target board. On the right is my CS8900A Ethernet interface, temperature-sensing bridge, and RS-232 port.

background image

www.circuitcellar.com

CIRCUIT CELLAR

®

Issue 146 September 2002

37

The firmware is written so that the
functions in each protocol layer are
concerned only with that layer.

WHAT DO YOU NEED?

My web page includes a JPEG image,

which the browser loads after the
HTML portion. Most of the browsers I
tested establish a single connection to
load both parts of the page. Netscape
4.7, however, opens two separate con-
nections to the server, and the loading
of the HTML page and image overlap
to some extent.

Each connection comes from a dif-

ferent port on the browser’s machine.
To handle this situation, I put all con-
nection-specific information, such as
client IP address, client port number,
sequence number, ack number, and
TCP state into a structure that’s
indexed by the connection number.
Each element of this structure can be
thought of as a connection.

When a TCP segment arrives, I

check to see if it matches an existing
connection and use the state informa-
tion for that connection. That allows
the web server to handle simultane-
ous connections from the same PC or
from multiple PCs.

Beyond ARP, IP, and a TCP state

machine to handle simultaneous con-
nections, what do you need, and what
can you safely leave out? TCP has a
long list of goodies, such as algo-
rithms to estimate the best time-out,
avoid congestion, assemble out-of-
order segments, and so on. I made a
list of about 20 such items. The truth
is that I am serving web pages to vari-
ous browsers and multiple PCs simul-
taneously, but I’ve implemented only
a few of these capabilities. So, I am
content for now, and I have a 20-item
to-do list for a rainy day.

EMBEDDED WEB PAGES

My program uses 22 KB out of the

32-KB on-chip flash memory, leaving
enough room for my 7-KB web page.
Access to on-chip flash memory is
fast. For more storage, the obvious
choice would be an SPI serial EEP-
ROM. 64-KB devices are inexpensive,
and they can be clocked in the 2- to
5-MHz range, depending on the part.
Using the built-in SPI port on the
C8051F005, set to provide a 2-MHz
SPI clock, my 7-KB web page could be
transferred into the 8051 in about
30 ms. This would add about 50% to
the time needed to serve the page.

Web pages for embedded systems

need capabilities that simple static web
pages do not, such as dynamic data and
two-way capability. Dynamic data is
handled by inserting a tag in HTML.
A tag number is included to tell the
server what variable to insert. Two-way
communications is provided using a
form, which is a standard HTML con-
struct that allows the browser to send
selections back to the web server.

One purpose of a small web server

like this is to make a product easy to
use. A little eye candy is nice, and
web pages for embedded systems
would do well to have one or more
images to make them attractive.

Photo 2 shows my web page, as pre-

sented on an MSIE browser. This page
is bidirectional in that it both displays
data and has radio buttons to turn an
LED on the breadboard on and off.
The state of the buttons is sent to the
web server in a post message and can
be easily extracted. The 0.8-KB HTML
portion of the page and 6.2-KB JPEG
graphic combine for a total of 7 KB.
This page is used as the basis for com-
parisons later on in the article.

RUN-TIME PROFILING

Web pages are for human consump-

tion, and 100-ms response times appear

Verify TCP checksum,

parse TCP header

TCP

State

Machine

Parse IP

header

UDP or

ICMP

To appropriate

message handler

Verify IP checksum,

check for TCP and

header options

Fragile

IP

Parse

Ethernet

header

Verify incoming frame

is per RFC 894

CS8900
Receiver

ARP

Reply

Parse

HTTP

header

Request

Add entry to table,

allow waiting message

to be sent

Send ARP response to

provide Ethernet

address

Look in ARP table and

send ARP request if not

in table

Add IP header and its

checksum. Get

hardware address

Allocate memory and

copy web page

Get

page

Allocate memory and

copy image

Get

image

Turn on or off LED

Post

Add TCP header and its

checksum

Add Ethernet header to

outgoing frame

CS8900A

Transmitter

ARP request

ARP reply

Parse

ARP

header

Ethernet network

Figure 2—As a message goes up the left side of the flow chart, two checksums are verified before reaching the TCP state machine. Web page requests generate an HTML
page or image, and then two checksums are added going down the right side. ARP message flow is shown in the central portion of the chart.

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38

Issue 146 September 2002

CIRCUIT CELLAR

®

www.circuitcellar.com

snappy. Using the Finisar (formerly
Shomiti; go to www.finisar.com for
more information) Surveyor Lite, I
measured the time required for my
8051 web server to serve the 7-KB
web page to a 500-MHz Pentium
machine running MSIE 5.5. [2] It took
60 ms. In contrast, it takes my 100-
MHz Pentium server running Apache
about 32 ms to serve the same page.
This demonstrates that the response
of the 8051 is respectable. For these
measurements, I had to clear the
browser’s page cache each time to
make sure my browser was actually
transferring the web page rather than
just displaying a cached version.

To figure out how much time my

web server spent doing various tasks, I
added debug code that set a port pin
when the CPU began the task and
cleared the pin when it completed the
task. Because many of the tasks I was
interested in run a number of times
while serving the web page, I had to
add up all the pulse on times. This was
hard to do with a oscilloscope, so I used
an 82C54 timer chip. The 80C51 port
pin output drives the 82C54 gate input.
When in the high state, the 82C54
counts transitions from a 1-MHz oscil-
lator. This provides accumulated pulse-
width times with 1-µs resolution. I set
up another 82C54 counter to count the
number of times an event ran. Run
times are summarized in Table 2.

The total of 47.4 ms falls short of

the 60 ms it takes to transfer the page.
When I added up the intervals between
the 8051 sending an Ethernet frame
and the browser’s 500-MHz Pentium
responding, I came up with 8.5 ms.
This accounts for most of the differ-
ence. It’s mind boggling, but true, that
the 8051 is waiting for a Pentium.

Searching for and

replacing tags is the
most time-consuming
task. My web page
uses tags as place-
holders for dynamic
values, such as tem-
perature. When it
serves the page, it
searches for these
tags and then replaces
them with the appro-

priate value.

It turns out that the

strstr() func-

tion is the time hog. After some
investigation, I found this to be true
in general of

strstr(). This makes

sense because it has to parse through
a lot of text, comparing each letter of
the text to the corresponding letter of
the search string. It may have many
partial matches before it finally finds
a complete match. One way to speed
up the process would be to tightly
limit the search range of

strstr().

Another approach would be to keep
an index of offsets to the tags, but the
index would need to be changed each
time a page was added or modified.

The second most time-consuming

task is copying the web page from
flash memory to RAM, using

mem-

cpy(). Why not just skip this step and
copy directly from flash memory to
the CS8900A? Again, the tags are the
problem; they need to be replaced
with actual values, and you can’t
replace them while in flash memory.
Perhaps a faster approach would be to
copy directly from flash memory to
the CS8900A, looking for tags as you
copy. But then you would have a
thorny problem with the TCP check-

sum. It’s computed over the entire
segment, but must be inserted at the
beginning of the segment.

It’s interesting to note that the

checksum is computed a whopping
38 times to transfer a single web page.
This transfer is made up of 19 Ethernet
frames, 11 from my 8051 server and
eight from the browser. It takes three
frames to establish the connection,
two frames to transfer the HTML page,
eight frames to transfer the image, and
six frames that are just acks. For both
incoming as well as outgoing frames,
two checksums are computed: one for
the IP header and the other for the
TCP segment, which makes 38 check-
sums. I was glad I used assembler for
the checksum code!

I can’t help but wonder how much

a 16-bit CPU would speed things up,
just by virtue of its being 16 bits.
The checksum would certainly run
faster because the sum is done over
16-bit chunks. Also, CS8900A I/O is
16 bits. Other tasks, such as mem-
cpy() and strstr(), may need custom
library code, because many 16-bit
compilers default to doing these oper-
ations 1 byte at a time.

MEMORY USAGE

Of the 2.4 KB of RAM on the 8051,

the lower 256 bytes are used for fre-
quently accessed variables. The
2048-byte area of additional on-chip
memory is addressed as XDATA
memory. Incoming and outgoing mes-
sage buffers are dynamically allocated
from this space. Dynamic allocation
is unusual for an 8-bit CPU, but it
makes sense here because sometimes
the incoming frame is large and the
outgoing frame is small (occasionally,
it can also be the other way around).
At other times, the outgoing frame
must be held in memory while an
ARP message is sent and received.
The firmware uses dynamic alloca-
tion using the library functions

mal-

loc() and free(), provided with the
Keil C compiler. With this approach,
no more RAM is tied up handing
Ethernet frames than there needs to
be at any given moment.

When it was all said and done, I had

consumed 29 KB of the 32-KB flash
memory. This reminds me of some-

Table 3—Here you can see the footprints of various
parts of the code.

Description

Code space

TCP/IP

9.5 KB

Web page including image

7.0 KB

HTTP server

3.8 KB

ARP

2.5 KB

C Library

2.9 KB

UDP

1.4 KB

CS8900A I/O

1.0 KB

RS-232

0.5 KB

Analog

0.3 KB

Priority task switcher

0.3 KB

Total

29.2 KB

Task

Times run

Accumulated time

(milliseconds)

Search and replace tags

6

23.8

Copy buffers

8

9.1

Write to CS8900A

11

4.6

Parse incoming HTTP headers

2

4.5

Compute checksums

38

4.4

Read from CS8900A

8

0.6

TCP state machine

8

0.4

Total time

47.4

Table 2—As you can see, searching for and replacing tags consumes the
most time. To serve a single web page, 19 frames are sent and received.

background image

www.circuitcellar.com

CIRCUIT CELLAR

®

Issue 146 September 2002

39

esting to port the code to
a 16-bit DSP chip and
compare performance to
this fast 8051. Most DSPs
have enough RAM. It
would also be nice to
have a modular-size
TCP/IP stack and create
an API like the big boys
have. This will surely
require more than 32 KB,
but lo and behold, 64-KB
flash memory 8051s are
already here.

I

REFERENCES

[1] J. Gilbreath and G. Gilbreath,

“Eratosthenes Revisited: Once
More Through the Sieve,”
BYTE

, January 1983.

[2] E. A. Hall, Internet Core

Protocols

, O’Reilly &

Associates, Inc., Sebastopol,
CA, February 2000.

SOURCES

CS8900A Ethernet controller
Cirrus Logic, Inc.
www.cirrus.com

C8051F005 Mixed signal MCU
Cygnal Integrated Products, Inc.
www.cygnal.com

C compiler
Keil Software, Inc.
www.keil.com

RDI/Wainwright solder mount
board
RDI/Wainwright
www.rdi-wainwright.com

RTL8019AS
Realtek Semiconductor Corp.
www.realtek.com.tw

thing I heard once about projects
expanding to fill available space. The
details are shown in Table 3. The
TCP/IP portion is small as stacks go,
but remember that I have implement-
ed only a subset of TCP/IP here.

FUTURE DIRECTIONS

All things considered, I’m glad that

I picked a part with 2.4 KB of RAM.
A CPU with a few hundred bytes
could do the job, but I wouldn’t go
through the trouble. It would be inter-

Jim Brady is an embedded systems
engineer living in southern Oregon.
He has 20 years of experience design-
ing with microcontrollers and device
networks. You may reach him at
jimbrady@aol.com

SOFTWARE

To download the source code, go to
ftp.circuitcellar.com/pub/Circuit_
Cellar/2002/146/.

Photo 2—Seeing is believing! The web page and image served by the
8051 can be seen in the browser window. The on/off buttons control the
state of an LED on the breadboard.

background image
background image
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42

Issue 146 September 2002

CIRCUIT CELLAR

®

www.circuitcellar.com

he BAT-31 blood

pressure meter is

intended for systolic

and diastolic blood pres-

sure measurement with simultaneous
pulse rate measurement. For systolic
and diastolic pressure measurement,
the oscillometric method is used.

Take a look at Photo 1 for an overall

view of the meter. The device consists
of two parts: a cuff and an electronic
unit. The cuff must be placed tightly
around a patient’s arm above his
elbow and connected to the electronic
unit via the attached air tube.

The cover of the electronic unit

contains two buttons for device con-
trol and a transparent window through
which the LCD screen is visible. The
buttons are labeled “I/O” and “Start.”
The LCD shows numeric measure-
ment results and various icons indi-
cating the meter’s state. The internal
parts of the electronic unit are pre-
sented in Photo 2 and Photo 3.

A battery consisting of four AA cells

powers the device; they’re placed in a
compartment that opens to the bottom
side of the unit. Between measure-
ments, the device is in Low Power
mode and consumes less than 10 µA.

To turn on the meter, you have to

press the I/O button for a short period

of time. The device then wakes up and
displays the LCD test when all of the
screen segments are highlighted. After
about 2 s, the LCD shows the maxi-
mum pressure to which the cuff will
be inflated; it stays in this state for 2 s.
If you don’t press a button, the device
goes into Ready To Measure mode,
during which the current pressure in
the cuff is displayed. At the same
time, a buzzer produces a sound,
which indicates that the device is
ready for measurement.

Every time you press the Start button

while the maximum pressure is dis-
played, the value of the maximum pres-
sure changes by 5 mmHg. When the
Start button is held down, the pressure
value is automatically incremented in
steps of 5 mmHg. After the increment-
ed value achieves 285 mmHg, it
jumps down to 100 mmHg and then
continues to increase. The moment
the Start button is released, the last
indicated value is stored for use in fur-
ther measurements in current and suc-
ceeding measurement sessions. This
value should be set 30 to 40 mmHg
above an expected systolic pressure. If
you set this value too low, the meter
automatically increases it by 40 mmHg
during a measurement, but the new
value won’t persist between meas-
urement sessions.

If for some reason the pressure in

the cuff reaches 300 mmHg, the
microcontroller opens the controlled
air vent to rapidly deflate the cuff. By
quickly pressing the I/O button, you
can stop all of the processes and turn
off the meter.

In Ready To Measure mode, press-

ing and holding the I/O button for
2 s brings the archive records to the

Automatic Blood
Pressure Meter

t

Thanks to the popu-
larity of TI’s MSP430
and all of the entrants’
ingenuity, the Ultra-
Low Power Flash
MCU MSP430 Design
Contest was a suc-
cess. Read on to find
out how these five
gentlemen from
Ukraine captured
Second Place in the
stiff competition.

Aleksey Britov, Sergei

Khlebnikov, Vladimir

Lomakovsky, Alexander

Makeenok, & Vitaly

Zakharchenko

FEATURE
ARTICLE

Photo 1—Take a look at the finished product. This
view of the Automatic Blood Pressure Meter shows
the electronic unit box lying on the plastic air cuff.

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CIRCUIT CELLAR

®

Issue 146 September 2002

43

PRINCIPLES OF OPERATION

Figure 1 shows a block diagram of

the blood pressure meter. All of the
device’s functions are controlled by an
MSP430F135 microcontroller.

The CPU core clock frequency is sup-

plied by DCO, which is continuously
adjusted by the Timer B, Channel 0
interrupt handler. The handler uses the
stable 32,768-Hz signal from the LFX-
TOSC crystal generator as a reference.
Thus, stable MCLK and SMCLK clocks
are provided, and they can be used for
time interval measurements.

The pressure sensor is a capacitor

with a moving plate. The distance
between plates changes proportionally
to the applied pressure. The capacitor
is included in an RC generator, and the
oscillating frequency also changes with
applied pressure. Timer A and Timer B
peripheral blocks accomplish sensor
frequency measurements. Channel 2 of
Timer B generates a timer window of
8 ms. Timer A counts pulses from the
pressure sensor. During a Timer B out-
put signal transition, a current value of
Timer A’s counter is captured to the
CCR0 register. The instantaneous fre-
quency is calculated from this value.

The instantaneous frequency needs

smoothing as it experiences fluctua-
tions. We used a first-order digital
recursive filter. Its equation is:

f

smoothed

= 2

–n

f

instant

+ (f

smoothed

– 2

–n

f

smoothed

) [1]

where n is the number that deter-
mines the averaging period.

This filter requires only one memo-

ry cell, which is the advantage of such
a filter over moving average filters
because they require multiple cells.
On the other hand, its coefficients are

LCD. Each record is displayed in two
or three steps. First, the record num-
ber is displayed (zero corresponds to
the most recent record). If the record
contains an unsuccessful measure-
ment, the error number is displayed
after the record number. In addition,
the systolic and diastolic pressures
are displayed and followed by the
pulse rate.

All of the values are shown in a

cycle, each of which is presented on
the LCD for 2 s. You can press the
Start button to bring the next record
to the display.

The blood pressure meter can

function under PC control. For this
purpose, a UART connector is
installed; it should be connected to
the computer’s COM port by a cable
with an RS-232 transceiver. The
cable’s end connector can be mated
to the unit’s UART connector
through the rectangular hole in the
battery compartment’s base. In this
mode, the unit is powered from an
external power supply through the
same UART connector.

You can set the maximum pressure

value in the PC program’s window to
specify a name for the file to which
the internal data will be written and
to initiate measurement by pressing
the Start button in the program’s win-
dow. During a measurement, the PC
program receives calibration data,
measurement conditions, and raw
pressure sensor output data from the
unit. The received data may be ana-
lyzed for further algorithm enhance-
ments. You can review the blood pres-
sure meter’s specifications in Table 1.

LDO

3.3 V

MSP430F135

Comparator A

+

Int
Ref

Low battery
INT

Timer A

TACLK

Channel 0

CCR0

DCO

Adjust

Timer B

TBCLK

Channel 0

Channel 1

Channel 2

UART

MCLK

SMCLK

CPU core

RAM
Flash

memory

UTxD0
URxD0

DCO adjust

INT

Buzzer INT

Capture

ACLK

LFXTOSC

32,768 Hz

P6.7
P6.6
P6.3

LCD driver

CS
WR
DATA

COM

SEG

3

18

P1.6

P1.5

LCD

114

81

Systolic

Diastolic/pulse

P1.3

P1.4

Air compressor

Controlled

pressure

vent

Vent hole

Pressure

sensor with

frequency output

JTAG and
Bootstrap

loader

connector

TxD

RxD

UART

Connector

Buzzer

3.3 V

Capture TA0

P4.5

P4.6

Human

hand

Cuff

Air

tube

Start

I/O

Battery 6-V

+

Figure 1—As you can see from the diagram, an MSP430F135 microcontroller performs parts control and data pro-
cessing with extremely low power consumption.

Table 1—Here are the basic specs for the Automatic Blood Pressure Meter.

Systolic/diastolic pressure measurement range

20–280 mmHg

Maximum pressure

300 mmHg

Pulse rate range

30–180 pulses per minute

Pressure error bound

±3 mmHg

Temperature range

10–35°C

Power supply voltage

4.1–6.4 V

Current consumed from battery:

• during cuff inflation

450 mA

• in Low Power mode

<

10 µA

Size (without cuff)

125 × 78 × 40 mm

Weight (without batteries)

250 g

background image

ning of the measurement. The sam-
pling period is determined by the
Timer B, Channel 2 output period; it
is constant and equals 8 ms. Thus,
any time interval may be determined
with a resolution of 8 ms. The trans-
lation of a sample number into mil-
liseconds is accomplished with three
left shifts of the sample number.

When the program detects rising pul-

sation amplitudes, it stores the current
value of the sample counter and begins
to count detected pulsations. After
diastolic pressure is bypassed, the pro-
gram calculates the time interval as
the difference between the current
sample counter and stored value multi-
plied by the Timer B, Channel 2 output
period. Then, the pulse rate is calculat-
ed as the number of detected pulsa-
tions divided by the time interval and
converted to pulses per minute:

[2]

The measurement ends

when the amplitudes of a
specified number of succes-
sive pulsations drop below a
threshold. Take note that the
threshold is determined by
multiplying the maximum
pulsation amplitude by a
specified coefficient.

After that, the program

moves on to the calculation of
systolic and diastolic pres-
sures. The systolic pressure is
obtained at the point where

44

Issue 146 September 2002

CIRCUIT CELLAR

®

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degrees of two, so it doesn’t
require multiplication.

The current pressure value is

calculated from the instantaneous
frequency. Because the sensor’s
frequency-pressure response is
nonlinear and changes from sam-
ple to sample, each device goes
through a calibration procedure.
The frequency is calculated by
using a quadratic approximation of
the sensor response, which you’ll
learn more about in the sensor cal-
ibration section of this article.

During cuff inflation, the

device measures instantaneous
pressure and displays it on the
LCD. When the pressure achieves the
specified maximum value, the con-
troller turns off the air compressor.
Then, the air steadily leaves the cuff
through the vent hole, which limits
the pressure drop rate to 2 to 5 mmHg
per second. You can see a typical pres-
sure curve in Figure 2. When the air
pressure in the cuff drops down to the
systolic pressure level, it becomes
nonmonotonic and pulsates in accor-
dance with blood pulses.

The beginning of each pulsation is

indicated by a local minimum of pres-
sure drop curve. Each pulsation is char-
acterized by two parameters, amplitude
and pressure difference, which must be
stored for further processing. Also, each
pulsation amplitude is stored in a byte
with resolution of 0.0625 mmHg.
Storing a full pressure value that corre-
sponds to a pulsation beginning would
require 2 bytes of memory per pulsa-
tion. To reduce memory requirements,
we stored the difference between cur-
rent pulsation pressure and the next
pulsation pressure. A single byte is
enough to store this difference with res-
olution of 0.5 mmHg. The pulsation
parameters are illustrated in Figure 3.

As the pressure steadily drops with

time, the amplitude of air pressure
pulsations increases, reaches it’s maxi-
mum, and then decreases. After the
air pressure drops below the diastolic
pressure level, the pulsations almost
disappear. By plotting the pulsation
amplitude versus pressure, you’ll
obtain a bell-like curve (see Figure 4).

A counter of frequency samples rep-

resents current time from the begin-

the curve crosses the systolic
threshold on the right-hand side
of the bell. The diastolic pres-
sure is obtained at the point
where the curve crosses the dias-
tolic threshold on the left-hand
side of the bell. If a crossing
point does not coincide with an
available pressure-amplitude
pair, the linear interpolation is
used to obtain a more accurate
value. Note that the program
will increase the maximum
pressure value by 40 mmHg and
go into cuff inflation if the first
pulsation amplitude is greater
than the systolic pressure. Then,

the entire measurement procedure is
repeated, and the obtained results
are stored in the archive and dis-
played on the LCD.

SENSOR CALIBRATION

The capacitance of the pressure

sensor is inversely proportional to the
distance between its plates:

[3]

where

e is the dielectric constant, S

equals plates squared, d

0

is the initial

distance between plates, k is the coef-
ficient, and P represents the applied
pressure. When this capacitance is
used in an RC generator, the genera-
tor’s output frequency is:

[4]

Therefore, the generator’s output fre-
quency is a linear function of applied
pressure:

2380

2400

2420

2440

2460

2480

2500

74

75

76

77

78

79

Pulsation amplitude

Pulsation local minimum

Pulsation local maximum

Pulsation pressure difference

Sample number

Pressure (mm Hg)

Figure 3—The estimation of pulsation parameters is critical for

systolic and diastolic pressure measurement.

1500

2000

2500

3000

3500

30

40

50

60

70

80

90

100

110

Sample number

P

re

s

su

re

(m

m

Hg)

Figure 2—This graph shows air pressure in the cuff versus time. As

the air goes out of the cuff, the pressure goes down. The blood pul-

sations cause ripples of changing amplitude on the curve.

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CIRCUIT CELLAR

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Issue 146 September 2002

45

[5]

In reality, the manufac-

turing imperfections, stray
resistances, and capaci-
tances result in the pres-
sure-frequency curve’s
deviation from the ideal
straight line. Figure 5
illustrates the typical fre-
quency-pressure dependen-
cy for different tempera-
tures. Frequency values
are normalized to the fre-
quency at zero pressure
and at a temperature of
+25°C (77°F).

As you can see in Figure

5, it’s clear that in order to achieve an
accurate measurement, some sort of
approximation of the sensor’s
response must be found. This approxi-
mation also must take into account
the temperature dependency of the
response. On the other hand, such an
approximation should be based on a
minimal number of calibration
points. After investigating slice-linear
and quadratic approximations, we
chose a quadratic approximation (see
Figure 6).

Calibration data consists of at least

three pressure-frequency pairs: one for
zero pressure, one for intermediate
pressure, and one for maximum pres-
sure. If there is more than one interme-
diate point, the C coefficient is calcu-
lated as the average of the values for
each intermediate pressure.

For calibration, the blood pressure

meter must be connected via an air
tube to a pressure reference device.
This process may be fully automatic
if the reference device has an output
signal indicating transitions from one
pressure level to another. The device’s
firmware contains routines that
implement calibration and store cali-
bration data in internal MSP430 infor-
mation flash memory.

The coefficients A, B, and C are cal-

culated in advance, before going to
measurement, and only the first for-
mula is used in real-time calculations.
It requires five floating-point arith-
metic operations: one subtraction, one
addition, and three multiplications.

HARDWARE

The meter’s hardware is based on

the MSP430F149 (prototype version)
or MSP430F135 (current version)
microcontroller and uses few addi-
tional parts. Because these micro-
controllers contain almost all of the
peripheral blocks necessary for the
device, its schematic is rather sim-
ple. You may download the schemat-
ic from the Circuit Cellar ftp site.
The best way to study the schematic
is to look at it along with the dia-
gram illustrated in Figure 1.

The VD1 diode protects the elec-

tronic circuit against inverse battery
polarity. The air compressor and con-
trolled air vent currents don’t flow
through this diode, so the voltage
drop across it is small and allows the
circuit to function down to the deep
battery discharge.

The LDO regulator DA1 provides

a stable power voltage for the
MSP430 and pressure sensor genera-
tor (DD1) independently of the bat-
tery discharge level. Because of the
MSP430’s extremely low current
consumption while in Active mode,
as well as the fact that it usually
stays in Low Power mode LPM3, the
power dissipated on the LDO regula-
tor is insignificant.

The implementation of the X1

(JTAG) and X3 (bootstrap loader) con-
nector as a PCB edge connector elimi-
nates the necessity of installing addi-
tional connectors, simplifies PCB
assembly, and reduces cost. The LCD

driver (DD3) is inevitable
with the MCUs currently
in use, but the developers
hope that the appearance of
new MSP430F43x family of
chips would make it
unnecessary.

The MOSFET switches

with extremely low on-
resistance DA2 turn the air
compressor on and off. In
addition, they make the
controlled air vent open
and close under the
MSP430’s control. Because

all of the MCU’s ports are
inputs after reset, the
switch’s gates are tied to
ground by resistors R2 and

R3 to ensure their off state.

The circuit consisting of resistor

R1 and diode VD2 reduces current
consumed by the controlled air vent
during cuff deflation. When the
MCU turns on the air compressor,
the current flowing through VD2
simultaneously makes the controlled
air vent close. After the air pressure
in the cuff reaches the prescribed
level, the MSP430 turns the second
MOSFET on and the first MOSFET
off. The current flowing through the
second switch is limited by the
resistor and holds the air vent
closed. This current is much less
than the current necessary to close
the vent. Because the air vent stays
closed and consumes current
throughout the measurement cycle,
this technique provides significant
battery charge saving.

50

60

70

80

90

100

110

120

130

0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1

Pressure (mm Hg)

Normalized amplitude

Diastolic pressure

Systolic pressure

Diasotolic threshold

Systolic threshold

Figure 4—When the air pressure in the cuff goes down to systolic pressure, pulsation

amplitude begins to increase. After achieving its maximum, it decreases and the dias-

tolic threshold becomes very low. The air pressures at which the amplitude crosses cor-

responding thresholds give the systolic and diastolic pressure values.

0

50

100

150

200

250

300

0.92

0.93

0.94

0.95

0.96

0.97

0.98

0.99

1

30˚C

35˚C

45˚C

Figure 5—The pressure sensor’s output signal fre-

quency is a nonlinear function of pressure and shows

significant temperature dependence. The frequency

decreases as the temperature goes up. The vertical

axis refers to normalized frequency, and the horizontal

axis to pressure in millimeters of mercury.

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46

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CIRCUIT CELLAR

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The pressure-sensitive element is

the capacitor C1. The distance
between the plates of the capacitor
C1 is proportional to the applied
pressure. The capacitor is included
in the loop-back circuit of the RC
generator, which is built on DD1
gates. The oscillating frequency fluc-
tuates in the range from 2 to 4 MHz
(at zero pressure) down to 1 to
2 MHz (at 300 mmHg) depending on
the sensor sample.

R10, C10, R12, R11, C11, and R13

circuits are RC filters suppressing
the bouncing of buttons when
pressed and released. MSP430 I/O
ports allow for not only the reading
of the current button state, but also
can fix the state change between the
moments when the program analy-
ses its state.

The CPU’s internal comparator is

accurate enough to be used for bat-
tery voltage monitoring. One of its
inputs is tied to the internal voltage
divider, which provides the voltage
of V

CC

/2 (1.65 V). R15, R16, and C12

form a low-current voltage divider

with an output voltage that
drops below V

CC

/2 for a bat-

tery voltage less than 4.1 V.
The R15 and R16 values are
a trade-off between low-cur-
rent consumption and the
error introduced by voltage
drop caused by the compara-
tor’s input leakage current.
When the battery voltage
drops below 4.1 V, the com-
parator generates an inter-
rupt, which is handled by
the program.

The X2 connector is

intended for connection to a
personal computer and
entering a self-test mode.
One of the self-test modes
provides a calibration procedure.
The meter goes into Self-Test mode
when the RXD input is held low at
the moment when the device is
turned on by pressing the I/O but-
ton. In addition, R17, R18, R19, and
R20 provide ESD protection and the
necessary input-voltage bias when
the UART connector it disconnected.

A Piezoelectric buzzer is used to

indicate the Ready To Measure mode
and pulsation detection during meas-
urement by sound. Because the cir-
cuit’s supply voltage is low, in order
to make the sounds louder, the
buzzer is connected in Differential
mode. The signals on its plates pro-
duced by MSP output port change in
opposite phase so that the whole volt-
age change across the buzzer is twice
the supply voltage.

FIRMWARE

The blood pressure meter’s firmware

is written in MSP430 assembly lan-
guage. For its development, the
MSP430 Kickstart tool and the FPP430
floating-point library were used.

You may download the main pro-

gram flowchart from the Circuit
Cellar

ftp site. Because the program is

large, it’s implemented as a module
set. Each module is implemented as a
separate source file with the corre-
sponding header file. All of the files in
a module are gathered in a separate
directory whose name is the same as
the module’s name. The purpose of
each module is described in a com-
ment at the beginning of each file.
The most important comments were
translated into English. The rest of
comments are in Cyrillic and may be
displayed improperly. The modules
are listed in Table 2.

If you want to compile the source

code, all necessary files are in the
Project_TI090\Source_code directory.

where:
f0

Frequency at zero pressure during

calibration is at about 25˚C

f(0)

Frequency at zero pressure measured at a

measurement session beginning

f

C

Current frequency

P

MAX

Maximun calibration pressure (should be

close to 300 mm Hg)

P

INT

Intermediate calibration pressure

(in the range from 0 to P

MAX

)

K Temperature

coefficient

C

C

MAX

MAX

MAX

MAX

MAX

MAX

MAX

MAX

INT

INT

INT

INT

Figure 6—You can use this quadratic approximation to determine

the sensor’s response.

Module name

Module purpose

ARXIV.S43

Store the last 10 results in internal archive in the information flash memory;

display current results and results from archive

CLOCK.S43

Control MSP430 clock system; adjust DCO frequency (uses 32,768-Hz crystal

as reference); implement program delay of N ms

FPPV4IAR.S43

MSP430 floating point package

I2C.S43

Implement I

2

C interface (required only when Philips LCD driver is used)

IEEE_MSP.S43

Convert number from IEEE STD 754 format to MSP430 floating-point format

and visa versa

IZMEREN.S43

Set maximum pressure before measurement; implement Manometer mode

before measurement cycle; inflate cuff before measurement; measure sys-

tolic and diastolic pressures and pulse rate

LCD.S43

Control LCD driver on logic level (independent of LCD driver type); driver type

is selected in header file MAKET.S4H. An appropriate control file (see below)

is included in this file by the #include directive.

PCF8566.S43

Control Philips LCD driver on the physical level

HT1621B.S43

Control Holtek LCD driver on the physical level

430F4xx.S43

Control MSP430 internal LCD driver (not yet developed)

MAIN_PRG.S43

Main program; call to all other functions; switch the pressure meter to Low

Power mode after measurement; implement interrupt vector table

MAKET.S43

Define all macros, names, constants and masks for hardware control; initialize

MSP430 hardware; erase/write to MSP430 information flash memory; define

all control constants for the pressure meter program

SENSOR.S43

Store pressure sensor calibration data; calculate coefficients for sensor

response approximation; receive signal from pressure sensor; calculate and

low-pass filter instantaneous frequency; calculate instant pressure

TESTS.S43

Implement self-tests and calibration routine (runs as one of the tests)

UART_FON.S43

Initialize and control MSP430 UART hardware; receive packets from the PC;

transmit packets to the PC

Table 2—Because the program is so large, it’s implemented as a firmware module set. As you can see, each mod-

ule has its own purpose.

background image

Sergei Khlebnikov is a researcher in
the CAD department of NTUU-KPI
in Kiev, Ukraine. He earned his engi-
neering diploma from National
Technical University of Ukraine
(NTUU-KPI) in 1993. His interests
include the hardware design of
embedded systems based on DSP
and microprocessors, and software
utilities for CAD PCB layout systems.

Vladimir Lomakovsky is currently
the technical director of REBUS in
Kiev, Ukraine. He received his engi-
neering diploma from the Lvov
Polytechnical Institute. Vladimir is
interested in the design of medical
devices, as well as the development
of pneumoautomatic parts, construc-
tions, and algorithms.

Alexander Makeenok is a senior sci-
entific researcher at the International
Research and Training Centre in Kiev,
Ukraine. He holds an engineering
diploma and PhD from the National
Technical University of Ukraine
(NTUU-KPI). His interests include
the design of CAD systems for DSP
and microcomputers, and control and
telemetry over the Internet.

Vitaly Zakharchenko is the director
of REBUS in Kiev, Ukraine. He
received an engineering diploma from
National Technical University of
Ukraine (NTUU-KPI). His primary
technical interests involve the devel-
opment and production of medical
diagnostic equipment.

Aleksey Britov is a researcher in the
CAD department of NTUU-KPI in
Kiev, Ukraine. He received an engi-
neering diploma from the National
Technical University of Ukraine
(NTUU-KPI). His technical interests
include the design and implementa-
tion of hardware and software digital
signal processing, and DSP and
microcomputer-based embedded sys-
tems design.

www.circuitcellar.com

CIRCUIT CELLAR

®

Issue 146 September 2002

47

SOURCES

MSP430F135 Microcontroller,
Kickstart
Texas Instruments, Inc.
(800) 336-5236
www.ti.com

SOFTWARE

To download the code, go to
ftp.circuitcellar.com/pub/Circuit_
Cellar/2002/146/.

Photo 3—Take a look at the blood pressure meter’s

electronic unit when the PCB is put aside (upside down).

Photo 2—We took off the blood pressure meter’s front

cover so you can see the placement of the electronic

block’s main parts. You can also see the top of the PCB.

To compile the project, you have to
make Project_TI090\Source_code a
current directory, load the
bp_meter.prj project file into MSP430
KickStart, and execute the menu com-
mand Project\Build All. The program
occupies 8798 bytes of flash memory
and requires 478 bytes of RAM.

For more information on our proj-

ect, stop by our web site at cad.ntu-
kpi.kiev.ua/~dsplab.

I

You may reach any of the authors at
dsplab@cad.ntu-kpi.kiev.ua.

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ome government

bureaucracies are

fairly nice, even if

you do have to wait for

two hours to meet with them. Other
bureaucracies are horrible. The
Immigration and Naturalization
Service comes to mind. To meet with
them, you have to line up the night
before outdoors in the cold. The FCC
is probably closer to the INS than to
the SSA. Why should you care about
the FCC, assuming that you’re an
electronics engineer who doesn’t own
a radio station? The answer is found
in the Code of Federal Regulations
(Chapter 1, Part 15, Subpart B—
Unintentional Radiators). [1] You can
read the regulations online at
www.access.gpo.gov/ecfr/. These are
the regulations that say you have to
prevent excessive radio emissions
from digital devices, which usually
means a microprocessor-based system.

If you read these regulations closely,

you’ll realize that they are really stu-
pid. There’s no nicer way to put it. For
example, you’re prohibited from operat-
ing a device unless you first test it for
compliance with the regulations for
unintentional emissions; however, it
isn’t feasible to develop a digital device
without operating it, and it’s illegal to
operate it without first testing it. So,
it’s actually impossible to legally
develop a microprocessor board.

In addition, the regulations blithely

outlaw vast swaths of the cottage elec-
tronics industry. If you build a one-of-
a-kind microprocessor board and sell
it for, say, $500, you’re in violation of
the regulations unless you first spend
$5000 or so to have it tested. Thus,
small engineering consultantcies are
granted the privilege of conducting
their business in the same dignified
manner as pirate taxi operators and
undocumented farm workers.

This is the “we’re not taking any

garbage” school of regulation. Nobody
gets off on a technicality because
everyone is guilty if they do anything.
However, if you take a closer look at
the regulations, you’ll discover that
regulations apply to the little guys
who don’t have political pull. When
important industries come calling, it’s
“Yes sir,” “No sir,” and “How can we
be of assistance?” Home appliance
makers and automobile manufacturers,
to name two important industries, are
exempt from the regulation in Part 15.
Hmm, is that why my microwave oven
interferes with my cordless telephone?

The laws of government regulatory

evolution are at work here, favoring a
situation where the powerful are
unregulated, the weak are regulated,
and the regulations generate a sup-
portive constituency of people part-
nered up with the regulators. A huge
testing industry has grown up around
the FCC’s Part 15 regulations. The
industry is comprised of the test labs
that are charging you $500 per hour.
These people are the FCC’s loyal
courtiers, and they are a dependable
lobby in favor of more regulation.

The FCC’s method for measuring the

level of potential interference is based
on the use of a quasi-peak filter, which
was invented in the 1930s to rate inter-
ference for AM radio. There’s actually
no reason to suppose that the quasi-
peak filter is relevant to modern com-
munication technology; it probably
would be relevant for AM radio, but the
FCC doesn’t regulate emissions in the
AM band (unless they’re over 30 MHz).

The FCC recognizes class A devices

that are intended for use in offices and
class B devices intended for use in
homes. The regulation is strictest for
class B, specifying a signal level that’s

Killing the EMI Demon

s

Emissions regulations
can make it expen-
sive to get your micro-
processor boards to
the market. In an
effort to help us
reduce EMI testing
costs, Norman
reveals the EMI
reduction tricks Rabbit
Semiconductor devel-
oped for its second-
generation processor.

Norman Rogers

FEATURE
ARTICLE

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CIRCUIT CELLAR

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Issue 146 September 2002

51

sional representation in Washington,
it’s unlikely that their voices will be
heard. It may be that the people writ-
ing these regulations are not actually
aware that small companies exist.
Lobbyists for small companies never
come to visit.

THE STRUGGLE WITH EMI

When Rabbit Semiconductor intro-

duced its first microprocessor, the
Rabbit 2000, the company thought
that the customers wouldn’t have too
much trouble with EMI. The maxi-
mum clock speed was fairly low at
30 MHz, and Rabbit gave suggestions
in the design manual on how to avoid
EMI problems. But, it turned out that
the customers were mostly smaller
companies with limited expertise in
this fairly exotic area. They were
focused on the innovative products
that they were designing, not gob-
bledygook government regulations.

Many of the customers took their

product along with $5000 to a test lab,
but they subsequently found them-
selves going back to the drawing
board. Executives at Rabbit decided to
do everything they could to make it
impossible for the next-generation
processor, the Rabbit 3000, to flunk
the radiated emission tests. In the
process, they even found some solu-
tions that could be compatibly retro-
fitted to the first-generation micro-

low compared to television signal lev-
els. But as cable and satellite televi-
sion spread to more than 80% of U.S.
homes, the FCC’s testing procedure
becomes more and more irrelevant.

Does the FCC really care about inter-

ference? Does it care if its regulations
actually work to prevent interference?
I believe the FCC cares that people
think the regulations work. If the FCC
really cared, they could have done a lot
more to make the regulations less of a
burden and more cost effective. Of
course, the FCC’s friends in the test
labs would not appreciate such cost
effectiveness. Our cost is their revenue.

A simple regulatory change would

be to officially recognize that one
device or 1000 devices don’t deserve
the same heavy-handed regulation as
devices produced by the millions.
There is no reason at all to require the
testing of low-production devices. The
cost of regulation is burdensome, and
low-production devices will never cre-
ate much of an EMI problem because
they are used in such low numbers.
There are catch-all regulations and
laws that outlaw devices that create
interference problems that would still
apply for the rare extreme case.

Another simple change would be to

borrow an idea used in building codes.
Every pipe or beam doesn’t have to be
tested before it can be used. The build-
ing code permits the use of components
that meet certain specifications. For
example, pipe made of a certain materi-
al with a certain wall thickness may be
approved for the distribution of water.
The same technique could be used for
the regulation of unintentional radia-
tion from computer systems. For
instance, devices with a ground plane
and a clock speed of less than 30 MHz,
as well as meeting certain other
specifications, might be exempted.

This approach could be a lot cheaper

for regulation when low production vol-
umes are involved. Would this approach
be perfect? Of course not, but neither is
the current approach, which involves
many inaccuracies, dubious assump-
tions, and measurement compromises.

I’ll put forth another suggestion for

rationalizing the regulations. How
about allocating spectrum for EMI?
Most EMI comes from microprocessor

clocks, so it’s parked in a very narrow
band around the harmonics of the
clock. The harmonics of 6 MHz repre-
sent an interesting series because the
harmonics fall smack in-between all
the VHF TV channels, except for
channels 5 and 6 (72 to 88 MHz). The
harmonics at 90, 96, 102, and 108 MHz
fall exactly between FM stations. If a
clock frequency of 18 MHz is selected,
the harmonics miss channels 5 and 6
as well as all the other VHF TV and
FM stations (if you divide 6 MHz by
13 you get a clock frequency that’s
good for generating data rates close to
standard data rates).

Under a plan like this, devices using

a clock that is a harmonic of 6 MHz
would be regulated only on certain
harmonics because most of the har-
monics won’t interfere with anything.
Over a period of time, services con-
flicting with the harmonics of 6 MHz
could be moved to other frequencies
and the regulations could be harmo-
nized with radio spectrum allocation
in other countries. Life could get sim-
pler. Digital devices would be cheaper
and there would be less EMI. Are any
bureaucrats listening?

Can small companies, being more

numerous than big companies, influ-
ence the regulations? The answer is,
not much. There aren’t trade organiza-
tions representing small digital elec-
tronics companies, and without profes-

Charging path

+3.3 V

P

N

Crossover
current

CMOS
buffer

Discharging
path

A clock tree

Internal clock

Microprocessor
noise

20 dB per decade

40 dB per decade

f

Spectrum of typical
microprocessor noise

Flat

20 dB per decade

f

Typical radiated EMI spectrum

dB

dB

Figure 1—Here you can see the sources of EMI in a typical microprocessor and the resulting spectrum.

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52

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supply voltage. On-chip devices, such
as flip-flops, also contain internal
gates and buffers where both polarities
of the clock are present and contribute
to the current surge.

An additional current surge is relat-

ed to the crossover current when both
the N and P transistors in a CMOS
buffer are momentarily conducting dur-
ing a logic transition. The silicon chip
tries to suck in the required current to
service these fast transients through its
power supply pins. However, these
connections have inductance created
by the bond wires and lead frame, so
the voltage drops briefly on the die,
creating an on-chip power supply volt-
age drop with an amplitude on the
order of a few tenths of a volt and the
duration of a nanosecond or so.

If this same on-chip power supply

drives the output buffers that carry sig-
nal lines out of the chip, these lines
will also be infected with the fast puls-
es present in the power and ground sup-
plies. This is because the power supply
noise is directly transmitted through
the buffer power inputs to the output
lines. The on-chip current surges create
fast noise that passes out through the
power supply pins to the power and
ground planes on the PC board, further
spreading the infection.

The amplitude of the

harmonics of the periodic
noise pulses, at least at
lower frequencies, declines
inversely with frequency
(1/f). Unfortunately, the
effectiveness of a short
antenna, such as a PC
board trace, increases
directly with frequency
(~f). The result is that the
radiated EMI tends to be
flat across the spectrum.
Fortunately, the amplitude
of the harmonics starts
declining more rapidly
than 1/f; it’s more like
1/(f

2

) at some higher fre-

quency determined by the
finite rise time of the puls-
es in the pulse train. The
balance of these counter-
vailing effects is such that
the most trouble is often

found in the area of 100 to

processor to make that device much
better from the EMI perspective. The
cumulative effect of the improvements
turned out to be so effective that
Rabbit met the goal to make it nearly
impossible to flunk the government
EMI tests with a Rabbit 3000-based
product, even at 50-MHz clock speeds.

SOURCES OF EMI

EMI on a typical microprocessor

board is related to the clock. If the
clock is a square wave, it contains fre-
quencies at the clock frequency and
harmonics. A perfect square wave clock
would have harmonic frequencies at f,
3 × f, 5 × f, 7 × f, and so on. For a perfect
square wave, or any string of pulses
with a fast rise time, the strength of the
harmonics declines inversely with fre-
quency. So, the eleventh harmonic
would be one-eleventh as strong as
the fundamental frequency. This cor-
responds to a decline in harmonic
amplitude of 20 dB per decade.

Real time clocks are not perfect

square waves, and pulses do not have
infinitely fast rise times. As a result,
the higher harmonics of any real
waveform start dropping faster than
1/n at higher frequencies, generally
dropping as 1/(n

2

), or 40 dB per decade,

after the frequency is high enough.
You can see this in Figure
1. The antenna efficiency of
PC board structures or
cables increases 20 dB per
decade as frequency
increases and wavelength
gets shorter and closer to
the size of structures found
on typical PC boards. As a
result, the beginning part of
the radiated spectrum tends
to be uniform, the 20 dB
per decade decline in har-
monic strength being bal-
anced by the 20 dB per
decade increase in antenna
efficiency, until a high
enough frequency is
reached where the curve
takes a bend and harmonics
start declining at 40 dB per
decade zone (see Figure 1).
Above this frequency, the
radiated spectrum starts
declining by 20 dB per

octave. But, the amplitudes of the real
harmonics of a real device are often
quite irregular because of resonances
that weaken some and reinforce others.

What is not usually understood is

that the biggest source of EMI is not the
clock directly, but a train of pulses gen-
erated on both edges of the clock when
current surges into the microprocessor
for a nanosecond or two when the clock
transitions up or down. This pulse train
has a frequency that’s double the clock
frequency. It seeps out of the processor
chip into the power supplies and gen-
erally infects the board with high-fre-
quency EMI. It also gets into the output
lines emanating from the processor
package; therefore, it’s further spread
around the board and to cables and
devices connected to the board.

The current surges on both clock

edges are related to the clock tree. The
clock tree is a system consisting of a
branching network of buffers that dis-
tribute the internal clock around the
silicon die. Because these buffers drive
considerable capacitance and have both
polarities of the clock present, there is
a surge of current on both edges of the
clock. This occurs as current flows
into the chip to charge up the capaci-
tance in the part of the clock tree that
is transitioning from 0 V to the power

Bond wires
1 nF

Core

6 nH

I/O ring

1 cm = 4 nH

1 nF

Power plane
capacitance
500 pF

Impedence ~0.5

at 100 MHz

Noise on

power

Noise on input
blocked by
saturated transistor

+3.3 V

Power supply
noise passes to output

P

N

CMOS buffer

Figure 2—The connection of separate power and ground pins for the core and I/O ring
of a processor is shown here. A PC board filter blocks core noise from power planes.
You can also see how I/O buffers spread power supply noise.

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CIRCUIT CELLAR

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Issue 146 September 2002

53

sor will spread EMI. The EMI that
tries to come out of the power pins for
the core can be blocked by a combina-
tion of decoupling capacitors and PC
board trace inductance. This keeps the
PC board power planes a relatively
clean source of power for the proces-
sor I/O ring. The design team figured
this feature decreases EMI amplitudes
by 10 dB, which is a factor of three in
EMI electrical field strength measured
by the prescribed calibrated antenna.
This is a lot because it’s common to
flunk the tests by 5 dB.

REDUCTION TRICK #2

Most microprocessors have I/O and

memory devices connected to the
same bus with distinct control signals
for the devices. Generally, there is a
lot more activity at a higher frequency
for the memory devices. The Rabbit
3000 has an option to use separate
pins for memory and I/O devices, both
address and data. The advantage is
that the physical scope of the high-
speed memory bus is limited to the
memory devices. A separate address

and data bus handles I/O cycles and
has a much lower average operating
frequency. In particular, the address
lines toggle only during I/O bus
cycles, greatly limiting the emissions
from the I/O bus. This avoids the sit-
uation where the fast-toggling
address and data lines of the memo-
ry bus have to be run all over the
printed circuit board of a large sys-
tem. This scheme also limits the
capacitive loading on the memory
bus, which does not have to extend
to numerous I/O devices.

REDUCTION TRICK #3

A line spectrum is the spectrum

generated by a square wave clock or by
a train of short pulses. All of the ener-
gy is concentrated in a narrow spectral
line at the harmonic frequencies.

When the FCC EMI measurement

tests are performed, the spectrum
analyzer measures the amplitude of
the signal from a 120-kHz wide filter
that is swept across the frequencies of
interest. With a line spectrum, all of
the energy in a single line passes

300 MHz for lower-speed 8- and 16-
bit microprocessor boards.

Decoupling capacitors and the

intrinsic capacitance of the power and
ground planes can be used to short
circuit or filter noise on the power
supply. However, this technique loses
effectiveness above 100 MHz, because
the decoupling capacitors have
inductance of about 1 nH, giving an
effective resistance of about 0.5

at

200 MHz. The large currents involved
will develop millivolt-level voltages
across such capacitors.

REDUCTION TRICK #1

A key feature used in the Rabbit

3000 to mitigate the problem of noise
on the I/O lines is the provision of
two sets of power supply pins. One
set is used for the processor core; the
other is for the output drivers that are
located in the I/O ring on the periph-
ery of the die (see Figure 2).

If the I/O buffers are supplied with

the same power that is made dirty by
the fast transients in the processor
core, every output pin of the proces-

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54

Issue 146 September 2002

CIRCUIT CELLAR

®

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through the filter, resulting
in a strong signal. If the
energy in the line could be
spread out over a wider fre-
quency, say 5 MHz, only
one-fortieth the energy
would pass through the 120-
kHz wide filter, considerably
reducing the reading (by
16 dB in amplitude for one-
fortieth of the energy). This
is what a clock spectrum
spreader does. It modulates
the clock frequency by a lit-
tle so as to smear out the
spectral line in frequency.
The idea to do this for the purpose of
reducing EMI was patented by Bell
Labs in two patents during the 1960s.

There are numerous ways to modu-

late the clock frequency. One method
is to use a voltage-controlled oscilla-
tor and phase-lock loop so that the
frequency sweeps back and forth at a
low modulation rate (e.g., 50 kHz).
Another method is to insert random
delays or dithers into the clock. These
methods are all covered in the original
Bell Labs patents. The Bell Labs peo-
ple were probably interested in EMI
because telephone switches involve a
large amount of equipment in a small
space. In addition, it’s conceivable
that the early computerized switches
suffered from EMI problems.

We installed a clock spectrum

spreader in the Rabbit 3000 based on a
combination of digital and analog
techniques. The spectrum spreader
reduces FCC-style EMI readings by
around 20 dB, which is a lot.

A control system makes sure that

the modulated clock edge is never in
error by more than 20 ns compared to
where the clock edge would be if it
were not modulated. This prevents dis-
ruption in serial communications or
other timing functions. For example, a
UART operating at 460,000 bps can tol-
erate about 500 ns of clock edge error
before it will be near to generating
errors. This is far less than our 20-ns
worst error in clock edge position.

THE CONTROVERSY

Perhaps it’s because the spectrum

spreader solves EMI problems (it gives
an advantage of 10 to 20 dB) that it’s

not well accepted in some quarters.
Those in the anti-spectrum spreader
crowd argue that the use of spectrum
spreaders is a form of cheating
because the radio frequency energy is
still present but just spread differently
in the spectrum. It’s assumed that
changing the spectrum from narrow
band to broadband will simply spread
the interference around or even make
the total interference greater.

People holding competing points of

view have performed experiments in
an effort to demonstrate that spectrum
spreaders either increase or decrease
interference. But what both sides have
failed to realize is that there are dif-
ferent types of spectrum spreaders
that have different effects on different
forms of communications signals. It’s
important to realize that traditional
radio communication is being gradu-
ally displaced by new techniques root-
ed in digital technology.

The newer digital techniques are

generally broadband and transmit
redundant information. For example,
frequency hopping is a technique in
which the transmitter and receiver
hop from one frequency band to the
next in a predetermined pattern.
Interference on one or a few bands
will not have a noticeable effect
because the missing data will be
retransmitted or recovered by the use
of error correction techniques.

Another technique is Orthogonal

Frequency Division Multiplexing
(OFDM). This is used for digital radio
and television, particularly in Europe.
OFDM is also used for DSL Internet
service over copper telephone wires.

With this technique a wide
band is divided into hun-
dreds or thousands of nar-
row band channels, each of
which carries a slow data
signal. The bands are typi-
cally 1- to 10-kHz wide.

All of the data signals are

combined and error correct-
ed to create a fast datas-
tream. Because as much as
half of the transmitted
information is redundant,
this technique can suffer
considerable interference
and retain perfect transmis-

sion of the picture or sound. A big
advantage is that it’s resistant to fading
and multipath interference. OFDM is
made possible by cheap digital signal
processing that is now available via
ASIC’s. The digital technology makes
possible frequency analysis via tech-
niques such as the Fast Fourier trans-
form. In addition, the digital compres-
sion of sound and speech is achievable
via techniques such as MPEG.

Most spectrum spreaders modulate

the clock by sweeping the frequency or
phase back and forth in a regular pat-
tern. The repletion rate is typically in
the range of 20 to 100 kHz. However,
it’s also possible to modulate the fre-
quency or phase by a random signal or
a pseudo-random signal that does not
repeat, or if it does, it has a long repeti-
tion period. If the modulation is period-
ic so that the clock pattern periodically
repeats, then the spectrum will be split
into separate spectral lines separated by
the repetition frequency. If the modula-
tion is random or has sufficient ran-
dom noise in the circuit, then the spec-
trum will be smeared in a continuous
fashion. This can make a difference.

In an OFDM TV system, for exam-

ple, if a TV signal is transmitted in
8000 bands that are separated by 1 kHz
and the spread spectrum clock splits
the original clock into separate spectral
lines that are separated by 100 kHz,
then only one-one hundredth or per-
haps one-fiftieth of the channels in
the OFDM will be interfered with.
This is a degree of interference that
can be easily handled by the error cor-
rection facility. However, if the spec-
trum is continuously smeared, then

60

50

40

30

20

10

0

-10

-20

0

200

400

600

800

1000

Frequency MHz

dB µV per meter at 3 m

Spreader off

Spreader on
FCC Class B limit at 3 m

Figure 3—Take a look at the actual EMI measurements for a Rabbit 3000 RCM3010
core module board with clock spectrum on and off. Peak values are shown as dots.
Units are in amplitude dB relative to 1 µV per meter at a 3-m distance.

background image
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56

Issue 146 September 2002

CIRCUIT CELLAR

®

www.circuitcellar.com

SOURCE

Rabbit 3000 RCM3010 core module
Rabbit Semiconductor
(530) 757-8400
www.rabbitsemiconductor.com

REFERENCE

[1] Code of Federal Regulations,

Government Printing Office,
Washington, D.C.

be beyond the range of human hearing.

MORE REDUCTION TRICKS

There were other tricks that helped

to reduce EMI on the Rabbit 3000. For
instance, some of the internal clocks
are gated, so they’re only enabled
when needed. The use of gated clocks
reduces the amplitude of the current
surge into the chip.

The external processor bus is

designed so that it isn’t required to
run the clock around the PC board.

Norman Rogers is the President of Z-
World, Inc. and Rabbit Semiconductor,
which is a division of Z-World. He
holds a BA in physics from the
University of California at Berkeley
and an M.S. in physics from the
University of Hawaii. His technical
interests include C compilers and
microprocessor architecture. Norman
may be reached at nrogers@zworld.com.

it’s conceivable that every channel
would experience interference and the
TV picture would be lost.

The repetition frequency of the

modulator can also have an effect on
voice transmission. If the repetition
frequency is 5 kHz and a harmonic of
the clock falls in the traditional FM
band, then a 5-kHz whistle will be
heard in an FM receiver (this is some-
thing the ear is sensitive to). If the rep-
etition frequency is 50 kHz, then the
whistle may still be there, but it will

The clock is available at a dedicated
pin, but in most systems it is turned
off because it’s not needed. When it’s
needed (e.g., to provide a clock for an
FPGA), it can be supplied at full or
half the internal clock frequency.

Additionally, the external processor

bus cycles are not all the same length.
This breaks up the periodicity associ-
ated with the external bus.

An internal clock doubler allows

the external crystal oscillator to oper-
ate at half frequency. This reduces
EMI by lowering the frequency of the
external clock, which is physically
larger with large currents and thus in
great danger of generating EMI.

THE RESULTS

Figure 3 shows the EMI measure-

ments on a Rabbit 3000 RCM3010
core module, which is a small micro-
processor board operating at 29.5 MHz.
The EMI is virtually undetectable; it’s
far below the noise floor of the spec-
trum analyzer as used in the normal
FCC-mandated measurements. We
were able to use a special measure-
ment technique to ascertain where it
was and plot it on the graph.

I

RESOURCE

Rabbit Semiconductor, “PC Board

Layout Suggestions for the 3000
Rabbit Microprocessor, TN221.

background image

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58

Issue 146 September 2002

CIRCUIT CELLAR

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sentry robot

needs to be capable

of detecting a flame,

ideally at an early stage

when it’s still small and easy to
attack. The robot needs to be able do
this while ignoring background radia-
tion sources (e.g., sunlight) that might
cause false triggers. One of the neat-
est sensors for doing this is the
Hamamatsu UV TRON (formerly
UVtron) R2-868 ultraviolet (UV)
detector, which you can see mounted
in a protective metal fixture in Photo 1.
The UV TRON can detect a candle’s
flame from over 10

away, and it’s

often used as the main sensor for
robots in the Trinity College Fire-
Fighting Home Robot Contest.

THE SENSOR

The UV TRON consists of an anode

and cathode sealed inside a
glass tube filled with rare
gas. In the presence of a
flame, high-energy ultravio-
let photons are generated,
strike the cathode plate, and
release free electrons into
the gas-filled tube. When
the electrons hit the gas
atoms within the tube, they
produce more UV light,
which releases additional
electrons and initiates an
avalanche of electron

release. The additional electrons allow
current to flow between the cathode
plate and the anode wire loop. This
completes a circuit from the 220-pF
capacitor, through the UV TRON, and
through the 10-k

resistor, generating

a voltage pulse across the resistor and
discharging the capacitor (see Figure 1).

When the capacitor discharges the

chain reaction ends. After the capacitor
recharges and if a flame is still present,
another avalanche sequence will occur
and generate a series of pulses in
response to a flame. The frequency of
the pulse train depends on component
values and the flame’s intensity and
distance from the UV TRON tube.

The UV TRON’s window material

is made of UV transparent glass, and
the sensor’s spectral response is 185 to
260 nm. This narrow passband is
below that of sunlight and tungsten
light, but within that of a gas flame.
Special optical filters are not required,
which makes this easy to apply.
However, because the avalanche
process generates UV light, this may
trigger a nearby UV TRON. This is
important if more than one sensor is
used to pinpoint the direction to a
flame. You should then employ proper
optical shielding. Practically speaking,
because generally one UV TRON is
used, this concern is not a problem.

The UV TRON has a field of view

roughly

±

45° in both the horizontal

and vertical directions, looking for-
ward of the cathode plate toward the
anode wire. For complete coverage,
multiple sensors are necessary or the
one sensor can be scanned.

Hamamatsu manufactures a circuit

board (part number C3704) that pro-
vides all of the circuitry, including a

Put Out the Fire

a

You’re liable to burn
more than your
money if you build a
sentry robot incapable
of detecting a fire in
its earliest stages.
Tom introduces us to
the UV TRON ultravi-
olet sensor, and
explains how to build
an interface to it with
an 8-pin PIC12C672
microcontroller.

Tom Baraniak

ROBOTICS
CORNER

Detect Flames with the UV TRON
Sensor

Photo 1—The glass UV TRON tube is mounted in a protective metal
fixture. Your mounting technique will depend on the sensor’s location
on your robot. I recommend that you include something to protect the
glass sensor from accidental damage.

background image

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CIRCUIT CELLAR

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Issue 146 September 2002

59

the external controller pulls GP5 low,
the sensor circuit’s high-voltage sec-
tion shuts down and the PIC loops
and waits for GP5 to go back high.

Bit GP5 is also used by the PIC to

indicate that a fire has been detected
by driving it low and keeping it low so
long as the fire exists. At no time
should either the PIC or the external
controller actively drive this bit high,
because the other could be actively
driving it low. Instead, use the 10-k

resistor to effect logic high.

So, to summarize, if GP5 is pulled

high through the 10-k

resistor, the

PIC is enabled to drive the high-volt-
age section while monitoring the UV
TRON for flame detection pulses. If a
flame is detected, the PIC pulls GP5
low. The external controller uses this
as a signal to execute programs to deal
with the flame. If there isn’t a flame
and an external controller drives GP5
low, then the PIC shuts down the
high-voltage section and the UV
TRON circuit is disabled.

The sensor can function on its own

without the need for an additional
microcontroller. You can use it as part
of a fire detection system and to pro-
vide an audible alarm when it detects
the presence of a flame (see Figure 3).

HIGH-VOLTAGE REGULATION

As part of the high-voltage regula-

tion process, the ADC measures the
voltage from the high-voltage supply
through the voltage-divider resistor
network with analog input AN0.
Routine setflg compares the measured

high-voltage section, necessary to pro-
duce logic-level pulses in the presence
of a detected flame. Its disadvantages
include its cost, operating voltage, and
physical size. The latter limits the
mounting choices and takes up more
room than necessary.

You can build a complete interface

to the UV TRON, including a regulat-
ed high-voltage section, with an 8-pin
PIC12C672/4 microcontroller and a
few discrete components. Its advan-
tages are its low cost, small size, and
5-V operating voltage. The PIC pro-
vides drive pulses to a small high-
voltage transformer while monitor-
ing the high-voltage output. It varies
the pulses to maintain a constant
325 VDC to the UV TRON sensor. In
addition, the PIC monitors the pulses
produced by the UV TRON and deter-
mines if the number of pulses indi-
cates a flame or just noise. It signals
an alarm when appropriate.

THE CIRCUIT

The circuit is fairly simple (see

Figure 2). The key component is the
high-voltage transformer, T1, which is
part of a photo flash strobe kit made
by Rainbow Kits. You can purchase
the kit from Rainbow Kits, Radio
Shack, or several mail-order vendors.

The kit comes with four transform-

ers, but only two are needed to run
the strobe at 5 V. You can use one of
the remaining two transformers for
this project. Pay special attention to
the transformer’s connections as
shown in Figure 2 and Photo 2.

The PIC’s general-purpose I/O bit

GP4 drives the logic-level MOSFET
switch that powers the transformer pri-
mary. The secondary output is rectified
by a high-voltage, high-speed diode and
smoothed with a high-voltage capaci-
tor. That DC voltage is divided down
and monitored by the PIC’s analog
input port, AN0. The high voltage is
further filtered and current limited
before connecting to the anode of the
UV TRON tube. The recommended
operating potential across the anode
and cathode is 325 VDC (

±

25).

Note that the UV TRON tube has a

polarity, and the high voltage should
connect to the lead with the wire
loop inside the tube, not the lead with

the flat plate. As recommended by
Hamamatsu, the 330-k

current-lim-

iting resistor should be connected
within 2.5 cm of the UV TRON
tube. The cathode output from the
UV TRON is terminated by a paral-
lel resistor-capacitor combination.
Because the UV TRON output pulses
can exceed 5 V, a protection diode is
added from the cathode lead of the UV
TRON to the 5-V supply. The pulses
are monitored by the PIC through its
GP2 interrupt-capable input bit.

I urge you to be cautious when

you’re working with high voltage.
The capacitor can store a harmful
charge, so personal safety measures
must be practiced.

This circuit discussed here provides

the few microamps necessary to power
the UV TRON and not much more.
Keep this in mind when measuring
the high voltage because your multi-
meter may load the circuit to some
degree. The meter’s input current may
increase the voltage drop across the
10-M

divider resistor giving false

low readings. Power consumption is
approximately 7 mA when it’s run-
ning and about 1 mA when it’s off.

SOFTWARE

The UV TRON sensor circuit’s

power on and off control as well as
the flame-detected output signal use
the same I/O bit, GP5. This connects
to an open-collector control external
to the 8-pin PIC, which, in turn, con-
trols whether or not the UV TRON
circuit is on. Bit GP5 connects to the
external open-collector port, and is
pulled high through a 10-k

resistor.

A high level tells the PIC to generate
the high voltage for the UV TRON
sensor and to monitor for flames. If

Figure 1—The simplified schematic shows the current
path through the UV TRON sensor. When UV light
strikes the sensor, it essentially becomes a short cir-
cuit.

This discharges the 220-pF capacitor through

the 10-k

resistor and causes a voltage pulse across it.

Photo 2—The high-voltage transformer is shown with
its pins labeled to correspond to Figure 2.

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60

Issue 146 September 2002

CIRCUIT CELLAR

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sequence is skipped because the high
voltage is at least 324 V, negating the
need for an additional charge pulse.

The value of each of the 256 levels

of the ADC depends on its reference
voltage. Unless otherwise commanded
in software, the reference is tied to
V

CC

so that each bit is V

CC

/256. For a

5-V system this is 5/256 = 19.5 mV
per bit. If the power supplied is more
or less than 5 V, or if it changes with
load changes, then the bit value will
not be 19.5 mV.

Because the high-voltage output is

dependent on the bit voltage and mul-
tiplied by the transformer-winding
ratio, small changes in bit voltage can
effect large changes in the high volt-
age. For many applications, the exact
value is not critical. However, as a
regulator as applied here, it’s best to
have a fixed reference voltage so that

each bit represents an
absolute value that
won’t change with
power supply variations.

Thus, for this applica-

tion, the use of a simple
two-terminal voltage
reference is recommend-
ed (see Figure 2). Here,
analog input AN1 is
configured as an exter-
nal reference provided
by the 2.5-V LM385-2.5.

To calculate the num-

ber of bits that corre-
sponds to 324 V, you
must first calculate the

voltage to 324 V (hex 9A), but if it is
less, register adflag is cleared. If the
measured voltage is equal to or greater
than 324 V, register adflag is set with
its bit 0 equal to one.

During the main loop,

CKONOF, bit 0

of register adflag is checked. If it’s set
high, indicating the voltage is less
than 324 V, then GP4 is set high for a
period determined by the number of
NOP instructions in routine

DCDC.

With 16 NOP instructions running at
1 µs per instruction, the output is held
high for 16 µs. This sends a pulse to
the high-voltage transformer primary,
which generates a high-voltage output
pulse on the secondary, charging the
0.1-µF high-voltage capacitor.
(Experimentation shows that the
transformer performs best with a low
duty cycle, narrow pulse.) If register
adflag is not set, then the pulse output

Figure 3—The UV TRON circuit can be used as a stand-alone sensor to
signal an alarm when a flame is detected. When the switch is in the off
position, GP5 is held low, disabling the sensor. When the switch is in the
on position, GP5 is pulled high through the 10-k

resistor. If a flame is

detected, the PIC drives GP5 low and causes the audible alarm to sound.

Figure 2—Note the pin orientation on the high-voltage transformer T1. Be sure to wire the pins correctly.

background image

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CIRCUIT CELLAR

®

Issue 146 September 2002

61

Tom Baraniak attended University of
Wisconsin, Madison. Presently, he
runs the Electronics Shop for the
Chemical Engineering and Materials
Science Department at University of
Minnesota. As a kid he built his first
robot out of orange crates and coffee
cans. Today his materials are a bit
more sophisticated. You may reach
him at baraniak@spexotics.com.

SOURCES

Strobe kit
Electronic Rainbow, Inc.
(317) 291-7262
www.rainbowkits.com

UV TRON, C3704 circuit board
Hamamatsu Corp.
(908) 231-231-0960
www.hamamatsu.com

PIC12C672 Microcontroller
Microchip Technology Inc.
(480) 786-7200
www.microchip.com

RESOURCE

J. Fraden, Handbook of Modern
Sensors: Physics, Designs, and
Applications

, 2nd ed., Springer

Verlag, Heidelberg, Germany, 1997.

SOFTWARE

To download the code, go to
ftp.circuitcellar.com/pub/Circuit_
Cellar/2002/146/.

OTHER USES

The UV TRON needs only a low-

cost, high-voltage power supply to
operate. It’s simple to apply because it
doesn’t require any special optical fil-
ters. You can pinpoint the location of
a flame by limiting the UV TRON
sensor’s field of view and controlling
its position with a scanning mecha-
nism or by using multiple sensors.
This allows the robot’s guidance sys-
tem to hone in on the flame and
douse it if it’s equipped to do so.

The use of the flame sensor is not

limited to robotic platforms. You can
also implement it as part of a build-
ing’s fire protection system, or it can
be used to detect the presence, or lack
thereof, of a flame or pilot light (e.g.,
in a furnace or gas dryer).

I

resistor divider outputs:

Then, using the 2.50 V reference,

So,

FLAME DETECTION

Following the high-voltage pulse

sequence, the routine

CHKFIR incre-

ments a 16-bit counter comprised of
two 8-bit counters, windowl and win-
dowh. Then, GP2’s interrupt flag, bit
1 of register intcon, is checked to see
if a flame-detection pulse set it. If it
was set, the flame pulse count register
detcnt is incremented. If eight flame
pulses occur before the 16-bit counter
exceeds 8192, then this is interpreted
as a valid flame detection. Bit GP5 is
then configured as an output port and
driven low. The external controller
recognizes the low state as an indica-
tion of a fire and responds accordingly.

As long as a flame is detected, high-

voltage on/off control is ignored, and
the program continuously recycles to
monitor the flame. Because each of
the 8192 loops takes 120 µs, give or
take a few microseconds, cycling
through all of the loops takes about
1 s. Thus, eight pulses in this time
represent a flame pulse rate of about
8 Hz or greater.

If GP2’s interrupt is not set during

the flame checking routine, the 16-
bit counter is still incremented and
checked to see if it has reached
8192 counts. If not, the process of
regulating the high voltage and
checking for flame detection pulses
cycles again. This continues until
either there are eight flame pulses or
the 8192-count window is reached. If
there are eight or less flame counts
at the conclusion of the 8192 count
window, all the counters are reset to
zero and the process starts over by
checking GP5 to see if the power is
still commanded on.

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62

Issue 146 September 2002

CIRCUIT CELLAR

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o your remem-

ber all of the time

you spent trying to

figure out data rates, bit

counts, parity settings, and modem
command strings before you made
that first successful machine-to-
machine connection? Odds are that
after you figured all of that out, you
had to deal with a not-so-friendly
piece of terminal emulator software as
well. These days, Internet appliances
are reality, and attaching a device to
the Internet can be just as confusing
as that first attempt at getting online
if you don’t have the right tools to
accomplish the task.

Using the Internet for control and

data acquisition is becoming more
prevalent every day. Cermetek has
taken many of the gotchas out of
attaching electronic and mechanical
devices to the Internet. The
Cermetek 2124 Internet Appliance
Modem is a true out-of-the-box solu-
tion that doesn’t require you to have
in-depth knowledge of dial-up and
Internet protocols.

As you can see in Photo 1, the 2124

modem is a self-contained device that
houses a modem, agency-approved data
access arrangement (DAA), micro-

processor complete with external inputs,
flash memory, point-to-point protocol
(PPP), and Transmission Control
Protocol/Internet Protocol (TCP/IP)
stack. This combination of an internal
modem and Internet-oriented subsys-
tems allows the 2124 modem to operate
as a stand-alone Internet device or as an
Internet device that’s controlled by an
inexpensive external microcontroller.

Thus, with the introduction of the

2124 modem, the traditional personal
or SBC, along with the associated ded-
icated terminal and communications
software, are eliminated as required
Internet appliance components.
Everything the 2124 modem needs to
connect to the Internet and transfer e-
mail messages is contained within its
1.95

× 1.4

× 0.54

encapsulated body.

Changes to the 2124 modem’s oper-

ating parameters are made easily with
iNetWizard, a software application
that you may download for free from
the Cermetek web site. For those of
you with no fear, the 2124 modem can
be controlled and programmed by just
about any standard terminal or termi-
nal emulator application (e.g.,
HyperTerminal or TeraTerm Pro).

Using the 2124 modem can be as

easy or technically sophisticated as
you wish. Therefore, the power afford-
ed by the device can be seen and used
by those of you with the appropriate
set of skills, or hidden and used by
those who just want the darned thing
to work. If you’re interested in the
down and dirty details of the 2124
modem, I suggest logging on to the
Cermetek web site and studying the
application notes and datasheets.
Cermetek has gone to great lengths to
provide in-depth documentation for
the users of their modem products. If
you want to take a virtual test drive,
read on as I describe how to put a
2124 modem to work on the Internet.

Internet Enabling Made
Easy

d

Attaching data-trans-
ferring devices to the
Internet can be a bur-
densome task for IT
whizzes and novices
alike. However,
Cermetek’s 2124
Internet Appliance
Modem makes the
process a lot easier
and affordable,
regardless of the pro-
ject’s complexity.

Fred Eady

APPLIED
PCs

Figure 1—There isn’t any rocket science here. You
can catch most of the CH2124’s event signals with this
simple circuit.

background image

www.circuitcellar.com

CIRCUIT CELLAR

®

Issue 146 September 2002

63

controller without the need for addi-
tional RS-232 voltage conversion.

As a rule, PC serial ports expect

RS-232 levels, which is one of the rea-
sons why it’s useful to have RS-232
conversion circuitry native to the
2124 evaluation board. Most single
board computers also want to see a
true RS-232 signal. So, when design-
ing your 2124 modem system hard-
ware, be sure to take notice and
include some RS-232 conversion cir-
cuitry if your external SBC or micro-
processor complex requires it.

In addition to the V.24 interface,

the V.22bis modem can be reset using
a TTL logic-level signal applied to its
RST pin. An analog output is also pro-
vided by the V.22bis modem to allow
call progress to be monitored by exter-
nal analog circuitry. The 2124 eval
board uses an LM386 audio amplifier
IC for audible call progress monitoring.

In addition to the integrated V.22bis

modem, the 2124 modem includes an
internal microprocessor that interfaces
to a large block of internal flash memo-

ry. The internal microprocessor controls
the actions of the V.22bis modem and
processes I/O signals from the V.24 and
input sense interfaces. As you guessed,
the 2124’s internal microprocessor is
also responsible for manipulating the
TCP/IP stack logic and reporting the sta-
tus of e-mail transfers. Data necessary to
the modem’s e-mail application is held

in the flash memory.

If you take a closer look

at the Network Protocols
box inside the microproces-
sor box in Figure 2, you’ll see
five small boxes organized in
a flowchart manner. These
small boxes represent the
major functional areas of a
typical TCP/IP stack imple-

mentation. Don’t confuse
this with the Open System
Interconnection (OSI) model,
which is made up of seven
layers. The major TCP/IP

2124 EVALUATION BOARD

The 2124 modem is much like an

integrated circuit in that you simply
plug it into a socket and use its inter-
nal functionality by interfacing exter-
nal signals with its pins. If you need
to develop and certify a new 2124
modem application, you should pur-
chase a 2124 evaluation board.

The advantages of the evaluation

board include: on-board RS-232 termi-
nal interface circuitry; a regulated +5-
VDC power supply; a protected RJ-11
telephone line interface; audio circuit-
ry for easy audible call progress moni-
toring; call and modem status LEDs;
call status indicator circuitry; a Reset
button; an e-mail Send button; an e-
mail Status Clear button; and all of
the 2124 signals brought out to stan-
dard 0.1

center header pins.

You can incorporate jumpers to route

the modem control signals to the on-
board RS-232 circuitry if your applica-
tion requires it. Using the 2124 evalu-
ation board jumpers and signal pins
allows the hardware and software
designer to extend the 2124 signals off
of the evaluation board to custom
external electronics. In addition, you
can prove concepts and design ideas
before incurring the cost of preproduc-
tion or prototype printed circuit boards.

It isn’t too difficult to begin devel-

oping with the 2124 modem. First,
you have to plug in the included wall
transformer and attach a phone line.
Then, connect a user-supplied RS-232
interface cable between your PC and
the 9-pin serial connector on the eval-
uation board. After that’s done, you
can power up the evaluation board.

If the default values aren’t to your

liking, a simple iNetWizard
procedure allows you to
enter the destination e-mail
address and ISP phone num-
ber of your choice. By press-
ing the e-mail Send button
you will immediately pick
up the phone and send a pre-
loaded e-mail message to the
destination you selected
with iNetWizard.

Depending on the applica-

tion, visual call progress sta-
tus may or may not be
required. If you need visual

feedback on your custom 2124 modem
system board, the call status can be
captured with simple D-type latches
or a small area of logic inside a pro-
grammable logic device (PLD) and dis-
played via LEDs. Take a look at Figure
1 to see how the e-mail sent event
could be captured and displayed.

You can also sense the call status

with an external microcontroller,
which gives you almost unlimited flex-
ibility in reacting to the call progress
indicators. A bare evaluation board and
a 2124 evaluation board loaded with a
2124 modem are displayed in Photo 2.

2124 MODEM

Take a look at the 2124 modem in

Figure 2. The heart of the 2124 modem
is an integrated V.22bis 2400-bps
modem, which is supported by a DAA.
The DAA allows the integrated modem
to attach directly to the Public
Switched Telephone Network (PSTN)
using a standard RJ-11 interface.

The 2124 modem’s internal elec-

tronics can also communicate with
external serial devices using its stan-
dard V.24 5-V interface. All of the
standard modem control and data
signals are available on this inter-
face, and they’re offered at standard
TTL logic levels. The TTL logic-
level-compatible V.24 interface
allows the 2124 modem to interface
directly with a local external micro-

Photo 1—The Cermetek 2124 is a
true black box. Everything you ever
wanted in a modem is encapsulated in
this little black brick. The pins of this
Internet appliance modem are on 0.1

centers and can be soldered or sock-
eted to the mother ship PCB.

Photo 2a—Everything you would design into a home-brewed modem develop-
ment board can be found on the Cermetek 2124 evaluation board. Included are
power, phone line, and terminal interfaces, as well as status LEDs and a speaker.
b—And now, take a look at the board without the modem. Note the layout of the
modem module pins. The backside of the evaluation board supports the MAX237
RS-232 IC and some surface mount glue logic.

a)

b)

background image

SMTP language is quite simple. You
can actually use an uncomplicated ter-
minal session to talk to any SMTP
server with abbreviated human lan-
guage commands like HELO and QUIT.

Before any TCP/IP activity can

occur in most dial-up connections,
PPP must pave the way. PPP is
invoked after the 2124 modem dials
the ISP’s phone number. The remote
ISP system and PPP component of the
2124 modem’s firmware decide how to
send and receive the e-mail data or
any other data that will be transferred.
This is called PPP negotiation, which
consists of things like what terminal
type is being used and how big the
data blocks will be. During this
process, PPP also passes your pass-
word and user ID to the remote sys-
tem for verification.

After the ISP’s server has accepted

your password and user ID and the
PPP negotiations are finished, PPP
passes control to TCP/IP, POP3, and
SMTP-based applications. At this
point, the 2124 modem’s internal
microcontroller can send or receive e-

mail by using the communications
path that has been cleared by PPP and
TCP/IP. In addition, it can report the
status of the transfer by way of the
2124 modem’s external interfaces.

When the e-mail transfer is com-

plete, the applications inform the TCP
that they are finished. Then, the TCP
unplugs the socket it made to the ISP
mail server and drops the physical
(phone line) and logical (TCP/IP) con-
nections.

If your 2124 modem never had to

change the ISP phone number, ISP IP
address, destination e-mail address, or

64

Issue 146 September 2002

CIRCUIT CELLAR

®

www.circuitcellar.com

functional areas fit into the overall OSI
model, but aren’t totally related as they
are depicted here.

Post Office Protocol (POP3) and

Simple Mail Transfer Protocol (SMTP)
are used directly by Internet applica-
tions. POP3 is simply a way to retrieve
mail from a POP3 server. SMTP uses a
set of standard commands that use the
e-mail address information contained
in the 2124 modem flash memory to
transfer e-mail between the modem
and the ISP’s SMTP server.

The POP3 server is usually your

incoming mail server, and the SMTP
server is your outgoing mail server. The

Photo 3—This is how it’s done by hand. Notice that
the IP addresses are in hexadecimal format instead of
the usual dotted-decimal format. I’ll bet that everyone
who reads Circuit Cellar can do this and enjoy it. It’s
the nontechnical end-user that iNetWizard is aimed at.

Photo 4—This is a left-to-right, top-to-bottom, how-to-
send an e-mail window. Note that the Retrieve e-mail
button is disabled. That’s because the 2124 cannot pull
e-mail in. There are other variants of the Cermetek
iModem line that can.

JK

microsystems, Inc.

Visit us on the web www.jkmicro.com

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66

Issue 146 September 2002

CIRCUIT CELLAR

®

www.circuitcellar.com

e-mail message, this entire process
could have been done using only the
2124 modem, a switch closure or trig-
ger to activate the SEND E-MAIL pin,
a phone line, and a source of +5-VDC
power. The trigger could be a minimal
external microcontroller implementa-
tion or a reed switch inside a float
assembly monitoring the level of fluid
in a holding tank. The 2124 modem
has two TTL-level external inputs
that can be sensed with their status
being reported by a nonvolatile flash
memory resident e-mail message.

iNETWIZARD

iNetWizard is an application pro-

gram that takes the e-mail address and
IP data supplied by your ISP, which
you would normally plug in by hand
with individual iNet@T commands,
and enters it into the correct area of
the 2124 modem flash memory.

iNetWizard issues iNet@T com-

mands, which allow the entry of IP
and e-mail addresses, passwords, e-
mail message content, ISP
phone numbers, and ISP logon
user names. The difference
between iNet@T commands
and standard Hayes AT com-
mands is that the latter of the
two acts only on the modem.
iNet@T commands include
the AT command set function-
ality, as well as the ability to
manipulate the 2124 modem’s
microprocessor complex in a
single iNet@T command.

The 2124 modem is also

capable of being controlled via
standard AT commands. This
feature can be used for situa-
tions in which the 2124
modem is used as a standard

2400-bps modem. Most of the iNet@T
commands used to configure an e-mail
session are shown in the Hyper-
Terminal screen shot in Photo 3.

The first thing iNetWizard does is

query the attached modem module
connected to a serial (COM) port that
you specify, which, as you can see in
Photo 4, is a 2124 mounted on a 2124
eval board that’s serially connected to
COM1 of a PC. In this example, the
computer is running Bill’s Windows
98. Although iNetWizard also works
with Windows NT, it doesn’t play
well with Windows 2000 or Me (yet).

If there is any preloaded ISP infor-

mation contained within the C2124
modem, it’s displayed and includes
the incoming POP3 mail server IP
address, outgoing mail server (SMTP)
IP address, login username, logon
password (visible only as asterisks),
ISP phone number, and speed of the
queried iNet device. This is all includ-
ed in Photo 5.

At this point, I could change any of

the displayed information by typing in
a new e-mail server IP address, logon
name, and password, or ISP phone
number into the fields of the
Configure ISP Information window.
The iNet device value in this case
can’t be changed because it was dis-
covered by iNetWizard during the ini-
tial query procedure.

Clicking on the Update iNet

Device button in Photo 4 loads the

new data I entered into the 2124 modem.

This is significant because if I did not

use iNetWizard, I would have to issue
five iNet@T commands manually via
a terminal emulator to enter this data
into the 2124 modem’s flash memory.

Taking another look at Photo 4,

notice that the iNetWizard applica-
tion also contains mouse buttons for
composing and sending e-mail mes-
sages. Entering e-mail data and ulti-
mately sending the e-mail message is
a much more involved process if per-
formed manually with a terminal
emulator. By using the automated
data entry features of iNetWizard,
you can eliminate keystrokes and
fat-finger errors during the e-mail
programming process.

To give you an idea of what

iNetWizard does, a minimum of 12
iNet@T commands must be entered
manually to send an e-mail the first
time if no ISP data has been preloaded
into the 2124 modem. If you use
iNetWizard, sending an e-mail from
scratch involves four clicks of the
mouse plus some minimal data entry.

Click number three takes you to

Photo 6, where the actual e-mail
message and address information
are entered. The final click puts
the routers and servers to work.

I wanted to see what was

going on under the iNetWizard
covers. So, I fired up Frontline
Test System’s Serialtest Async
and captured the data flowing
between the iNetWizard and the
2124 modem. The trace is shown
in Photo 7, and guess what? Just
as you would expect, there are
@T commands all over the place.

GETTING ONLINE

Now that you know how to

send data-laden e-mail messages
with the 2124 modem, it’s time

Photo 5—This window points to my iModem.net
account. The phone number in the ISP phone window
is an Orlando, Florida number. There are also two
local numbers listed on the iModem web site for
Merritt Island, Florida.

Photo 6—There’s not much to comment on here. My
e-mail address is in the Destination window, and my
message is in the Message window. The e-mail Review
button shows another window with the incoming/outgoing
server IP addresses and message header information.

Photo 7—This part of the trace shows the e-mail addresses and parts of the
e-mail message being transferred to the CH2124 from iNetWizard. Notice
that the same AT commands entered by hand in Photo 3 are being issued
by iNetWizard.

background image

www.circuitcellar.com

CIRCUIT CELLAR

®

Issue 146 September 2002

67

Press4Service ISP service at
$2 per device for each month.
Cermetek’s Press4Service is
supported nationwide and
provides local phone access
from hundreds of locations.

I can tell you from experi-

ence that my nationwide-
enabled cell phone does not
work in Shelbyville,
Tennessee (I’m from
Fayetteville, Tennessee,
which is 30 miles down the
road), but your Internet
device can access
Press4Service locally from
Shelbyville. By the way,
there’s a jetport in

Shelbyville just in case you
want to go fishing with me at

Tims Ford Lake. If you choose
Cermetek’s Press4Service, you won’t
be flying there on a trouble call, so
bring your fishing gear because I don’t
do golf.

For the management and project

leaders, if you’re wondering how
much staff you’ll have to take on to
enter all of the necessary data to

to find an ISP. I can save you
some time here by telling
you what you will find before
you begin your ISP search.

Plan on spending from $9

to $23 per month for each
device if you get your
Internet appliance service
from one of your local ISPs. If
that’s a bit too much, strike a
deal with the local ISP to buy
a few thousand connections.
Make sure those connections
will work in California if
you’re on the East Coast. On
the other hand, if you live on
the West Coast, be sure the
connections work in New
York. If your local ISP can’t
cover both California and
New York, at least you have some of
the local clients covered.

Now, move on and perform the

same quantity buy in every state of
the union and little county seat you
plan on operating in. If you succeed,
the only problem left to solve is how
to get all those different phone num-
bers into a manageable database at

the central site. You had better talk
to the Gulfstream aircraft folks about
a private jet as well, because if you
call this a solution, you’re going to
be a travelin’ man. I know guys who
like the converted 737s, but the
Gulfstream V-SP would be my choice.

Or, you can log onto the Cermetek

web site and sign up for Cermetek’s

Input

sense and

output

pins

Send e-mail

Input 1

Input 2

E-mail accept

Network protocols

POP3

SMTP

TCP

IP

PPP

Flash

ROM

Extended

RAM

32K × 8

Serial

interface

V.24

EIA-232-E

or UART

Modem control

Error correcting

data compression

NVRAM

Serial interface

and buffer

Modulation

demodulation

Telephone

line

interface

PSTN

Modem interface

RST

SPK

V/O

+5V

TI

TXA

RXA

GND

RXD

RTS

DCD

DSR

RI

CTS

TXD

DTR

Microprocessor

Tip

Ring

Figure 2—The most important feature of the 2124 modem, with the exception of
the modem circuitry itself, is the network protocol stack. If you’ve ever done any
projects that require TCP/IP or PPP firmware, you know that implementing the
protocols is not a trivial task.

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68

Issue 146 September 2002

CIRCUIT CELLAR

®

www.circuitcellar.com

send e-mails from your remote 2124
modems, you’re only going to need
the services of your new jet’s pilot
and copilot. That’s because all of the
information needed to run out-of-
the-box is configured for free by
Cermetek when you place your
modem and Press4Service orders.

You can also forget about staffing

that new data center. Press4Service
uses a secure database server that
allows you to easily administer all of
your 2124 modems connected to the
Press4Service network with a standard
web browser and Internet connection.

Press4Service provides each 2124

modem with the capability to send an
e-mail or fax to the destination of your
choice. You can sign up for ftp and web
page update capabilities as well.

When you sign on for Press4Service,

you’re assigned a common e-mail
address. All of your Cermetek modem
nodes are pointed toward this address.
After an e-mail comes into the
Cermetek central Press4Service site,
it’s compared against the database
entries for the sending 2124 modem.
Then, it’s redirected to an address
specified in the sending 2124
modem’s database record.

As the owner of the account, you

have database authority to change the
redirection address at any time. By
simply specifying e-mail, fax, ftp, or
web site in the 2124 modem’s destina-
tion address, the e-mail can become a
fax or get routed to an ftp recipient or
web page on a HTML server. The bot-
tom line is that you don’t have to
change e-mail address information in
C2124 modems to route their data to
a different e-mail address. If you find
it necessary to change the e-mail-
related data in a remote 2124 modem,
iNetWizard provides the capability to
dial up the remote 2124 modem and
update its flash memory with your
new information. This is achieved just
as if you were directly attached.

APPLYING THE 2124

Now you know how to use the 2124

modem as a stand-alone e-mail genera-
tor. By introducing you to Press4Service,
I’ve saved you enough money to buy
that Gulfstream V and a set of lures. If
you’re not the corporate

type and need

Listing 1—The CH2124 requires the pacing of each input character. I found that the

printf function

spits the characters out too fast. The code works despite the lack of handshake message handling. I
ignored the messages from the CH2124 and used long delays to allow the CH2124 to digest the com-
mands and send its handshake messages.

#include <16F876.h>

#include <F876.h>

#device PIC16F876 *=16

#include <string.h>

#use fast_io(A)

#use fast_io(B)

#use fast_io(C)

#use delay(clock=20000000)

#use rs232(baud=2400, xmit=PIN_C6, rcv=PIN_C7)

#fuses HS,NOWDT,NOPROTECT,NOLVP,NOBROWNOUT,PUT

char const sendit_string[] = {"@TDM1"};

char const endmsg_string[] = {0x0D,0x2E,0x0D}; //CR . CR

char const crlf_string[] = {0x0D,0x0A}; //CR, LF

char message_string[25];

int8 portal_bits;

#define lobby_door 0x01

#define lobby_window 0x02

#define patio_door 0x04

#define patio_window 0x08

main()

{

//General housekeeping stuff

int8 i;

PORTA = 0xFD;

PORTB = 0x20;

PORTC = 0x80;

SET_TRIS_A(0x00);

SET_TRIS_B(0x00);

SET_TRIS_C(0x80);

ADCON1 = 0x06;

ADCON0 = 0;

//Your code would come up with the portal_bits value portal_bits =

lobby_door;. Build the message depending on the sensor input bits

switch(portal_bits)

{

case lobby_door:

strcpy(message_string,"@TM1=lobby door is open ");

break;

case lobby_window:

strcpy(message_string,"@TM1=lobby window is open");

break;

case patio_door:

strcpy(message_string,"@TM1=patio door is open ");

break;

case patio_window:

strcpy(message_string,"@TM1=patio window is open");

break;

}

//Pace each character at 25 ms intervals

delay_ms(5000);

for(i=0;i<25;++i)

{

putc(message_string[i]); //Store the email message

delay_ms(25);

}

for(i=0;i<3;++i)

{

putc(endmsg_string[i]);

delay_ms(25);

}

delay_ms(10000);

for(i=0;i<5;++i)

{

putc(sendit_string[i]);

//Send the email message

delay_ms(25);

}

for(i=0;i<2;++i)

{

putc(crlf_string[i]);

delay_ms(25);

}

while(1);

}

to do some tricks with the CH2124,

the 2124 modem is just as easy to deploy

with your favorite microcontroller.

Most 2124 modem applications can

be effective with only the resources
provided by the 2124 modem. There

background image

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CIRCUIT CELLAR

®

Issue 146 September 2002

69

will be applications that require an
e-mail to be sent that is relative to
more external variables than the
2124 modem can handle natively.

For instance, let’s suppose you’re

monitoring door and window activi-
ty in a security application. Rather
than place a 2124 modem at every
door and window that you want to
secure, sensors are mounted at each
desired location. The external micro-
controller is programmed to scan the
door and window intrusion sensors.
E-mail is sent immediately that details
which sensor was triggered. Because of
the high level of integration found in
the iNet@T command set, this design
can be easily implemented.

When a sensor triggers, the external

microcontroller, using its software of
hardware UART, issues iNet@T com-
mands directly to the 2124 modem.
These iNet@T command strings are
built dynamically by the external
microcontroller depending on the
door and window sensor input. For
instance, each door and window could
be identified by a name that’s associ-
ated with a sensor input bit on the
external microcontroller.

Assume at this point that the ISP

phone number, login name, login pass-
word, e-mail passwords, as well as the
e-mail From:, To:, and Subject: fields
within the 2124 modem were initial-
ized when this modem node was
installed. Note that with that informa-
tion already loaded, the external micro-
controller only has to send two iNet@T
commands to the 2124 modem to dis-
patch the e-mail message.

The first iNet@T command would

load the dynamically created e-mail
message into the 2124 modem’s flash
memory. The second command would
send the e-mail. Using a Custom
Computer Services PIC C compiler,
I’ve coded a simple example that uses
a PIC16F876 as the external micro-
controller (see Listing 1). Although
the example code works, you’ll want
to add code to check the 2124
modem’s progress and respond to its
messages in a real application.

FISH OR FLYING LESSONS

Using e-mail as a means of transfer-

ring data and status is a great idea

because e-mail transfer is a standard-
ized Internet application. In addition,
both humans and machines can read
e-mail without modification.

Adding Press4Sevice ISP service

into the mix makes e-mail protocol-
independent and capable of being
dynamically routed because normal
e-mails can be converted to fax, ftp
transfers, and web page data without
user intervention. E-mail-to-voice
message capability is soon to become
a Press4Service feature as well.

The 2124 modem and evaluation

board, coupled with the
Press4Service offering, can help you
put just about any type of data on
the Internet with minimal effort in a
short amount of time.

I’m not suggesting that you consid-

er releasing your network program-
ming staff, but maybe you should
promote them to executive posi-
tions. As executives, they can
accompany you on fishing excur-
sions to Tims Ford Lake in that cor-
porate jet you bought with the
money you saved by deploying the
Cermetek Internet appliance
modem/Press4Service ISP solution.
Jets, fish, modems, or whatever, by
using the Cermetek 2124 it’s not
complicated, it’s embedded.

I

SOURCES

CCS PIC C compiler
Custom Computer Services, Inc.
(262) 797-0455
www.ccsinfo.com

CH2124 Internet appliance
modem, CH2124 evaluation board
Cermetek Microelectronics, Inc.
(408) 752-5000
www.cermetek.com

Serialtest Async
Frontline Test Equipment, Inc.
(800) 359 8570
www.fte.com

Fred Eady has more than 20 years of
experience as a systems engineer. He
has worked with computers and
communication systems large and
small, simple and complex. His forte
is embedded-systems design and
communications. Fred may be
reached at fred@edtp.com.

Mosaic Industries Inc.

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ability to control AC and DC loads. Up to 8 wildcards may be
connected at once providing up to 56 24-bit A/D inputs,
160 digital I/O lines, 32 AC control lines, or 24 DC control
lines. Pre-coded I/O drivers facilitate data acquisition, pulse
width modulation, motor control, frequency measurement,
data analysis, analog control, and communications.

Call: (510) 790 - 1255
ww.mosaic-industries.com

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email: sales@capitalelectro.com

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70

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t’s time to strap

on that parachute

and jump! We’ve

looked at SmartMedia’s

nonvolatile memory array structure,
interface and command format, and
the DOS FAT file structure. The pro-
ject’s hardware interface turns out to
be only a small piece of the puzzle.
The hardware can interface to any host
through an RS-232 port that requires
hardware handshaking (used to prevent
buffer overflows and to indicate an
EOF). Leave off the serial interface
converter, and you can tie the TTL sig-
nals directly to a processor. Keep in
mind that the interface runs on 5 or
3.3 V, depending on the SmartMedia
used, so level conversion buffers may
be required by your circuitry.

Assembly language software for the

project now exceeds 150 pages, yet it’s
well under 16 KB, which is not even
half of the available code space in the
PIC18F452. The project’s software
fakes DOS commands so the interface
looks like an external MSDOS comput-
er (with a disk drive) to the host sys-
tem. In my last few columns, I covered
initializing the interface and identify-
ing a SmartMedia module, using the
DIR command to explore what’s in the
module, reading the data from a file in

a directory, and a “bit” about error cor-
rection. This column, which closes this
series, covers what you need to know
about saving data in a SmartMedia
module using the DOS FAT file format.
Using this format allows the saved file
to be read by any SmartMedia device
on a PC. This means no special driv-
ers are necessary to read a nonstan-
dard (proprietary) format.

WRITE FILENAME.EXT

When a file is being transferred, it

already exists somewhere; it’s of a
known size. When a file is created,
there is no way of anticipating just
how big (or small) it will be. This
means the application must have some
way of knowing when all of the trans-
mitted data has been received. Because
any character that can be transmitted
may be actual data (using a character
as an EOF marker just won’t work),
some kind of hardware control is nec-
essary. Last month, I showed you how
the RTS and CTS signals are used not
only as flow control (to prevent buffer
overflow), but also to indicate EOF.
Note that RTS and CTS signal levels
reference RS-232 signals, not TTL.

The host has control of the RTS sig-

nal; it’s used as a signal to the applica-
tion. RTS high indicates that data may
be sent to the host by the application.
RTS low, in contrast, requests that
the application pause data transmis-
sion to the host.

Writing a file to the SmartMedia

requires data to flow to the applica-
tion. RTS has little or no use as flow
control, so it’s redefined to mean more
data when high and EOF when low.
The application controls the CTS sig-
nal and uses it for flow control to pre-
vent the incoming data from overflow-
ing its input buffer. After the buffer
fills up (a given amount), the applica-
tion drops the CTS output and asks
the host to pause sending data. When
the buffer empties (to a given
amount), the application raises the
CTS output, signaling to the host that
it may resume sending data. After the
application recognizes an EOF (RTS
low), it uses the CTS output to
acknowledge the host’s EOF by lower-
ing and raising its CTS output. But
what happens to the transmitted data?

SmartMedia File Storage

i

If you’ve
been fol-
lowing
Jeff’s
columns

closely, then you’re
probably familiar with
the SmartMedia by
now. He’ll wrap up his
series with a lesson
on saving data to a
module via the DOS
FAT file format.

Jeff Bachiochi

FROM THE
BENCH

Part 4: Getting Your Data Inside

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CIRCUIT CELLAR

®

Issue 146 September 2002

71

complete sector at a time, and that
you write to the sectors of a block in
order from lowest to highest.

An erased block consists of all ones.

Biasing for sector writes comes
through higher sectors within the
block. Data (zeros) written to higher
sectors of a block can potentially
cause insufficient bias. So, the rule for
writing anything is: Always write to
an erased block. This means that if
you change even 1 byte of data on the
page of a sector within a block, you
must rewrite the whole block of data.
This is accomplished by reading each
sector, altering any data within the
sector, and writing the sector to an
erased block (from the lowest sector
to the highest) until all of the block’s
sectors are transferred.

In addition, the LB-to-PB table needs

to be updated to show that the logic
block is now held in a different physi-
cal block. So, the external EEPROM
holding the table gets its data changed
from the old PB (word) to the new PB
(word) located at addresses 2 × LB and
2 × LB + 1. You will be constantly
moving blocks around when changing
information in the SmartMedia mod-
ule, so get used to this important con-
cept. The logic block indicates where
it should be; the physical block speci-
fies where it will be.

BACK TO THE DIRECTORY

OK, you need to write the new file-

name.ext into the located empty
directory entry. However, you must
first make sure there is a place for the

CREATE A FILE

The host begins the save to a file

sequence with the command write file-
name.ext, followed by the data to save.
The command interpreter identifies the
word “write” and searches through the
present directory for a directory entry
match to the filename.ext that follows
the write command.

The application has previously iden-

tified the SmartMedia and found the
directory when it was inserted into
the interface’s SmartMedia socket.
You’ve had the chance to look at the
directory or change to a subdirectory
by using the DOS-like commands DIR
or CD. So, you already know to look
for the present directory in the first
sector of logic block 2 (LB = 0x2 for
the root directory).

A read of the logic block to a physi-

cal block table in external I

2

C EEP-

ROM (at 2 × LB and 2 × LB + 1) gives
you the physical block in the
SmartMedia where the directory is
actually stored. This table lets you
find the logic block with a single EEP-
ROM access, as opposed to searching
every logic block in the SmartMedia
until you find it (remember, in the 8-
Mb module example, there are close
to 1000 blocks to search!).

Because there are up to 256 directo-

ry entries and each sector holds 16
directory entries (one sector has two
256-byte pages, with 32 bytes per
entry), you may need to read through
a whole block of 16 sectors just to
locate a particular entry. If a match to
the filename.ext is found, then a “file

exists” error message is displayed and
the routine concludes so no file will
be overwritten. Note that this is
strictly by design choice, so you may
wish to write your application to
append data to an existing file.

If a match is not found, then the

directory is searched for an empty
entry. At this point, if no more empty
entries are discovered, the routine con-
cludes with a “disk full” message.
When an empty entry is found, the file-
name.ext is written to the entry. You
will begin to appreciate the relationship
between logical and physical blocks
after you take a closer look at the pro-
cedure of writing to the SmartMedia.

NONVOLATILE MEMORY

SmartMedia uses a NAND cell con-

figuration, which is the smallest and
simplest memory technology available
(see Figure 1). It has high write- and
erase-per-byte speeds because the cells
are treated as block memory.
However, for this same reason, ran-
dom access reads are much slower on
a per-byte basis.

Erasing is done on a block basis. In

this case with the 8-Mb module,
that’s 16 sectors of two 256-byte
pages, or 8 Kb. Writing is handled on a
sector basis of two 256-byte pages, or
512 bytes. Although reading is most
easily accomplished on a sector basis,
the addressing allows reading to start
anywhere within the sector. The write
command also has the same address-
ing associated with it. However, it’s
strongly suggested that you write one

Register

8 bit

Byte parallel data
in (512 + 16 bytes)

Read

Cell array

Program

Page

(Program unit)

512

bytes

16

bytes

16 page/block

(erase unit)

~

~

~

~

WL14

WL15

WL16

SG(S)

SG(D)

WL1

WL2

WL3

WL4

Bit line

Basic unit

Redundant

cell array

Byte parallel

data out

(512 + 6 bytes)

Figure 1—The SmartMedia implements NAND cell configuration, which is the simplest and smallest memory technology on the market.

background image

ALMOST

So, you’re almost ready to start sav-

ing data. You know which cluster will
be used for the data because you just
wrote the cluster number in the direc-
tory and reserved it in the FAT. Now,
you need to find an unused physical
block by searching for a PB that has an
0xFFFF entry in the block address fields
in the redundant area of each sector.

It’s prudent to check the data and

block status bytes for any zero bits, an
indication of data or block errors, and
it’s a good reason to keep searching.
After a good empty block has been
found, it needs to have its block
address fields in the redundant area of
each sector in the block changed to
the LB for this PB. Remember, the
cluster number plus the cluster offset
(one) equals the LB. So, if the cluster
is 2, the LB is 3. But you just don’t
write 3 into the block address fields;
that would be too easy.

The block address field value is (LB ×

2) and 0x1000, with the low bit being
cleared or set to give the value even
parity. In the example of LB = 3, the

72

Issue 146 September 2002

CIRCUIT CELLAR

®

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file’s data. This requires a search of
the FAT table for an unused cluster.
Remember, your FAT contains 12-bit
packed data (as defined in the parti-
tion boot sector). Each 12-bit value
identifies a cluster. The first value is
for cluster 0, the next for cluster 1,
and so on. Keep in mind that the first
two clusters, 0 and 1, are reserved.

A 12-bit data value of 0x000 indi-

cates this is an empty cluster. When
an empty cluster is found, the entry
must be altered to indicate that this
cluster is now being used. Until it’s
determined that more room than one
cluster is needed, the entry value
should be changed to 0xFFF. You
know that the root directory can be
found in LB 2 and is 16 sectors in
length (one block). This leaves LB 3 as
the first block available to be used for
data files on an empty module. In the
FAT, the first available cluster is 2 (0
and 1 are reserved), which means that
a one-block cluster offset is needed to
translate between the cluster number
and LB. Cluster 2 will be used for LB =
3, cluster 3 for LB = 4, and so on.

When you find an unused cluster,

cluster number + 1 (cluster offset) will
give you the LB associated with that
cluster. The LB and cluster are the lin-
ear and sequential set of addresses
where files live in a perfect world.

Now, you have two blocks that

need modifying, the directory and
FAT. The directory entry needs
updating with the filename.ext, and
at least the cluster number and file
size in the last six bytes of the entry.
The first two of those bytes must
hold the starting cluster where file
data can be found and the last four
bytes the file size, which for now
will be zero.

As shown previously, you need to

perform a read-modify-rewrite of the
whole directory followed by an
update to the LB-to-PB table to
accomplish this. The FAT must be
changed in the same way. Note that
logically the FAT is still in LB = 1 and
the directory in LB = 2, but physically
they both have been moved to differ-
ent PBs. You can easily locate the PBs
using the LB-to-PB table.

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CIRCUIT CELLAR

®

Issue 146 September 2002

75

block address field value is 0b0001
0000 0000 0111, or 0x1007. Because
this is an unused block, it’s erased
and the block address fields can be
written without reading, modifying,
and rewriting. To finish your prepara-
tions, write a new entry in the LB-to-
PB table with the new LB’s initial PB.

THERE

You need another new and empty

PB. So, you’ll read the previous new
block just written with the block
address fields, add incoming data to the
odd and even pages, and write the com-
posite into this new PB. Remember,
writing or updating data requires a
read-modify-write. You must always
read the sector, change it, and rewrite
it to a new (erased) block.

Now you’re ready to write any

incoming data. The application goes
into a loop, watching the receive buffer
and RTS input for an EOF signal. Data
is buffered in the receive buffer. The
application pulls this data out of the
receive buffer and fills the even-page
buffer first, then the odd-page buffer
(512 bytes). The application then calcu-
lates the ECC values for each page and
places them into the redundant page
buffer. The sector now can be written
to the SmartMedia. Then, the applica-
tion reads the next sector (with the
prewritten block address fields and
empty odd and even pages) and pro-
ceeds to fill it with data. This contin-
ues until all the sectors of the block
have been written. The LB-to-PB table
is updated with the new PB, showing
where the data has been saved.

Presumably, there is more data

because the RTS input has not indi-
cated the EOF. Therefore, the applica-
tion must go back to the FAT and
locate an unused cluster for more
data. If one is found, the new cluster
number must replace the 12-bit entry
0xFFF, which previously indicated
that the last cluster used was the
final cluster. This FAT entry is now
chained (points to) to the new cluster,
and the new cluster’s entry in the FAT
must be marked as the last one with
0xFFF. This, of course, means reading
the FAT held in the FAT’s PB, updat-
ing the FAT, writing the FAT to a new
PB, and updating the LB-to-PB table.

Once again, the new cluster (plus

the cluster offset) gives the application
a new LB. This new LB requires a new
entry in the LB-to-PB table, which
means looking for another unused PB
and pre-loading the LB into the block
address fields for that block. All of this
preparation must be done every time
the application needs additional space
(another block) for incoming data. This
chaining can continue until all avail-
able space has been used on the media.

During data reception, a running

tally of bytes received is kept for the
time that the RTS input finally sig-
nals an EOF. When an EOF occurs,
any partial page of data is written to
its PB and the directory entry for the
file is updated with the file size.

DONE

Every time a block has been written

(except for pre-writing LB info to the
block address fields), there will be an
old block that was just read and now
contains old data. In order to allow
that block to be used in the future, it
must be erased after it has been
copied. When a block has been erased,
all of the data in the even, odd, and
redundant areas is set to one. If you’re
using an LB-to-PB table, you must
remember to update it whenever the
location of the LB changes.

Writing takes place on a sector

basis. Therefore, you must remember
to point to the even page prior to giv-
ing the write command because the
SmartMedia pointer can point to the
odd, even, or redundant areas for a
sector. Although this fact is implied
in one of the application notes in the
SmartMedia datasheet, it’s not dis-
cussed in the command section and
caused me much grief.

There are many points I have not

discussed concerning the use of the
DOS FAT file system with the
SmartMedia modules. Few of these
have to do with the file system itself.
I think most have to do with choices
I’ve made in the application. For
instance, the present application does-
n’t format the media, nor does it
allow deleting of files or appending to
an existing file. These features could be
added to the application, but I’ve spent
enough time here and wish to get on

SOURCE

PIC18F452 Microcontroller
Microchip Technology, Inc.
(480) 792-7200
www.microchip.com

Jeff Bachiochi (pronounced BAH-key-
AH-key) is an electrical engineer on
Circuit Cellar’s engineering staff. His
background includes product design
and manufacturing. You may reach
him at jeff.bachiochi@circuitcellar.com.

RESOURCES

SmartMedia Forum
www.ssfdc.or.jp/english/index.htm

Toshiba America Electronic
Components, Inc.
www.toshiba.com/taec/cgi-bin/
display.cgi?table=Category&
CategoryID=6928

with other projects. Most of these can
be done via your PC interface, so
they’re not essential to this project.

I have to admit that the code has

not been debugged for anything other
than my 8-MB module. Although I’ve
tried to keep all of that in mind, there
will be bugs lurking. To help debug
the code, you’ll find flags that will
enable the conditional assembly of the
code. Data can be dumped to the seri-
al port for almost every operation.
Conditional assemble was the only
debugging tool used, and I would not
have even attempted this project with-
out a flash memory part available.

Even though I’ve posted my ugly

code for those of you who want to ref-
erence it, I hope you’ll now want to
write your own application. Much of
the original media that the DOS FAT
file system was designed for is no
longer on new PCs, but it will obvi-
ously continue to be around for a long
time. Even if you choose not to use
the file structure in your SmartMedia
interface, the handling of pages, sec-
tors, blocks, and zones (in larger
media) will remain necessary. Ready.
Set. Jump. Geronimo!

I

SOFTWARE

To download the code, go to
ftp.circuitcellar.com/pub/Circuit_
Cellar/2002/146/.

background image

76

Issue 146 September 2002

CIRCUIT CELLAR

®

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f you’ve ever

been to one of

those big-city auto

shows, then you proba-

bly witnessed the debut of a few
mind-blowing concept cars. Back in
the June 2002 issue of Car and
Driver

, Csaba Csere described one

such vehicle: “Next door was the
Bugatti display, with the King Kong
version of the W engine fitted to the
Bugatti Veyron. With four more
cylinders yielding an 8.0-liter, W-16
configuration and four turbochargers,
this monster is credited with a cool
1000 hp, or 987 SAE net—as if any-
one would quibble.” [1]

The Embedded Processor Forum

reminds me of one of those big-city
car shows. You get to see all the lat-
est models and hang around with a
lot of other like-minded enthusiasts
and practitioners.

It’s true that the EPF is in San Jose,

not Detroit or LA, and the smoke
and mirrors takes the form of press
releases rather than theatrical
unveilings, but otherwise they have
lots of things in common.

At a car show, all the buzz centers

on fancy vehicles that most folks
don’t need and certainly can’t afford.

Everyone oohs and aahs over the most
exotic concept cars, and then heads
home in their minivans.

Thanks to Moore’s Law, silicon isn’t

like steel. Most of you have probably
heard the analogy, something along
the lines of: If cars were like chips,
you’d do 0 to 60 in a nanosecond and
get a zillion miles per gallon”

What the march of silicon means is

that the concept chips you find at the
EPF, unlike concept cars, will actually
go into production. Sure these socket
rockets cost a bundle at introduction,
but the price will only go down from
there, giving more and more designers
a chance to get behind the wheel.

Another way of interpreting Moore’s

Law is: Today’s high-end is tomor-
row’s low-end. Even if you drive
econo-chips (as most designers do), it’s
worthwhile to check out the high-end
rides to see what the future holds.

Consider that OnStar, the General

Motors telematics system, was a
Cadillac (literally) feature that’s now
available in over half of the GM mod-
els (34 of 54 in 2002) and even
licensed to other auto makers. [2]

The lesson is that even if the chips

you use are middle-of-the-road, they
will ultimately incorporate hand-me-
down features from the cutting edge.
You may not be buying anything
sleek and shiny off the EPF show-
room floor today, but it’s definitely
worth peeking under the hood and
kicking the tires.

REALITY CHECK

The conference got off to a good

start with an all-day seminar, “High-
Performance Processing for Embedded
Applications,” by Jim Turley
(www.jimturley.com). Jim is one of
my favorite gurus (and an occasional
Circuit Cellar

writer).

A lively and entertaining speaker,

Jim cuts through hype like a hot knife
through butter, a valuable talent in
this business. He started by promising
to avoid all vacuous marketing speak,
black-flagging words like “platform”
and “solution.” Jim’s the person I
expect to pop the hood of a hopped-up
(and hyped) chip and say something
like, “Gee, too bad you have to pull
the engine just to change the oil.”

Fast Times at the Forum

i

Tom Cantrell

Many of
today’s
concept
chips are
primed to

become the staples of
tomorrow’s technolo-
gy, so it’s worthwhile
to preview the chips
you may be reliant on
in the near future.
Tom will talk about
some promising chips.

SILICON
UPDATE

background image

www.circuitcellar.com

CIRCUIT CELLAR

®

Issue 146 September 2002

77

an embedded x86 only
for PC-in-drag applica-
tions running desktop-
class software, such as a
WinCE-based PDA or
Linux-based set-top box.

Finally, we come to the

PowerPC. Stepping back,
notice how the con-
tenders break down to
three traditional (68K/CF,
x86, and PowerPC) and
three nontraditional
chip-less IP-only suppli-
ers (ARM, MIPS, and

SuperH). The PowerPC is
a worthy architecture, the
technical standout in its
traditional camp. But it’s

the fact that the architecture is avail-
able only from IBM and Motorola that
will likely tell the tale. The pair brings
formidable engineering and marketing
horsepower to the table, but the main
question is whether or not a closed
architecture like PowerPC can prevail.

HERTZ SO GOOD

My feeling that MIPS is getting

their second wind isn’t because of any
particular big-ticket design-in, but
rather a rash of license agreements
with small outfits you’ve never heard
of. These are edgy designs that, in one
respect or another, go where no chip
has gone before. They may strike out
or hit a home run, but at least MIPS
isn’t going to go down looking.

It must bug RISC architects that x86

devices hold the clock rate crown. After
all, the basic premise of RISC was that
a reduced chip would more than make

Jim set the stage with his

introductory foil, pointing
out that “all life on earth is
insects” (see Figure 1).

HUH?

The point Jim’s making,

and it’s an apt one, is that
concept chips may be cool,
but you won’t see many of
them on the road. In fact,
in terms of units, the
entire micro segment is
only a small fraction (2%)
of the IC business as a
whole; discretes are the
insects at 69% (see
Figure 2). Furthermore, the
typical high-falutin (i.e.,
generally 32 bits and beyond) chip
found at EPF represents only a small
fraction of the micros sold.

So why all the interest in hot rod

chips? Jim relayed the story of ne’er-
do-well Willy Sutton, who, when
asked why he robbed banks, replied,
“Because that’s where the money is.”
Embedded 32-bit parts, commanding
prices from five to 50 times those of
lesser MCUs, are where the money is.

POLE POSITION

Jim then reviewed the market posi-

tion for the top half-dozen embedded
32-bit architectures (see Figure 3).

As you can see, 1999 saw the

Motorola 68K/Coldfire finally concede
its 20-year dominance. That’s not to
say the venerable stalwart of the CISC
era is dead by any means. Indeed,
68K/CF is still well ahead of most of
the pack, and volume is holding up.
So, if the chips still work for you, feel
free to keep using them.

The big news is the huge leap in

ARM units. Conventional wisdom has
it that this is a result of ARM’s popu-
larity in cell phones. A few big design
wins would account for the sudden
doubling of sales and subsequent lev-
eling off. My take is that ARM’s
strength is broader than that, thanks to
their relatively lean and mean architec-
ture and chip-less business model.

MIPS was an early leader in the

migration of RISC from workstations
to embedded applications. However, I
think they and the architecture suf-

fered a bit from the travails of their
then parent SGI. Things are still
shaky, with too many eggs in too few
baskets (at one time, Nintendo
accounted for 76% of the company’s
revenues). [3] Fortunately, MIPS, Inc.
was spun off as an independent com-
pany awhile back, and I think they’re
on the comeback trail.

Another video game system proved

to be a heartbreaker for the Hitachi
SuperH. Remember the Sega Saturn?
However, I wouldn’t count the SuperH
out. It’s a decent architecture, one of
the first designed from a truly embed-
ded perspective. And recently, the
SuperH group was spun out as an
independent company, allowing
SuperH to pursue the same chipless
strategy as ARM and MIPS.

It’s easy to forget that the x86 is a

player in embedded markets. Others
may disagree, but I would likely use

0

1,000,000

2,000,000

3,000,000

4,000,000

5,000,000

6,000,000

7,000,000

8,000,000

9,000,000

In

sect

s

Fungi

B

act

er

ia

Al

g

a

e

Wo

rm

s

V

ir

u

ses

Pl

a

n

ts

Ot

h

e

r

M

o

llusks

Pr

ot

ozoa

C

rust

aceans

Fi

sh

Bi

rd

s

Re

p

ti

le

s

M

a

mma

ls

A

m

phi

bi

ans

0.03%

Figure 1—Just a reminder from Jim Turley that there’s more to life on earth, and the IC
market, than meets the eye. Source: Scientific American, July 2001.

Memory

3%

Microprocessor

2%

Optoelectronic

7%

Sensors

1%

Bipolar

1%

Analog

11%

Logic

6%

Discretes

69%

World sales total = 310 billion semiconductors

Figure 2—Micros are the brains, but not the brawn, of the IC business.

background image

instance, everyone knows that memo-
ry is having trouble keeping up with
the escalating CPU clock rates as it is.
Needless to say, sharing the limited
bandwidth between multiple CPUs
can be problematic.

Thankfully, the big caches help

keep most of the traffic local to each
CPU. The good news is that this helps
prevent gridlock on the global shared
memory bus. The bad news is that it
calls for rather complicated cache
coherency schemes to ensure all the
CPUs march to the same drummer.

The cache coherency problem

arises when one processor modifies
the contents of a memory location
that’s currently cached by the other
processor. The solution, snooping
cache controllers that detect and
mitigate incoherent transactions, is
simple enough in principle but
messier in practice.

Multiprocessing isn’t all about

rocket science. Consider simple ques-
tions like what to do with an inter-
rupt pin. PMC-Sierra came up with
the right answer: interrupts can be
programmed to route to either, nei-
ther, or both CPUs.

The RM9000X2 is a good example of

a chip that few people may need today,
but many should look at for tomorrow.
The fact is, with single CPU architec-
ture topping out, multiprocessing is
where it’s at. And not just for big-tick-
et, performance-at-any-price chips.
Turley cited survey results from
Beacon Research showing that half of

system designs contain
more than one processor,
with nearly 10% having
as many as eight.

If achieving fast clock

rates is the problem,
Fulcrum Microsystems
has an easy answer—just
get rid of the clock
altogether. That’s right,
the startup plans on
taking MIPS for a
joyride with their asyn-
chronous (i.e., clockless)
Cal Tech-inspired design
methodology.

In an async processor,

separate functional units
(e.g., ALU, multiplier, and

78

Issue 146 September 2002

CIRCUIT CELLAR

®

www.circuitcellar.com

up for it’s simple-minded architecture
with a blazing clock rate. But, as of
today, it’s the desktop PC chips that are
pushing 2 GHz and beyond.

Yes, simplicity does allow for a

faster clock. But, as Intel and AMD
aptly demonstrate, so does having
tons of money to fine-tune a design
and purchase the latest and greatest
production and test gear.

“Who cares?” might be the response

of the vast majority of the embedded
market when it comes to neck-snap-
ping clock rates. But remember, we’re
talking about Porsches and Ferraris
here—you’d better believe top speed
matters. Thus, I’ve got to give MIPS
brownie points for helping a new start-
up, Intrinsity, bring the first 2-GHz
embedded RISC to market.

So how does a tiny newcomer go

head-to-head with the
giants? The real story is
less about a fast RISC than
about a potential break-
through in IC design.

Using a combination

of logic design and lay-
out techniques they call
Fast14, Intrinsity claims
they can extract twice
the performance from
plain vanilla silicon, but
without the heartbreak
of excruciating hand-
crafting. In other words,
it’s the design tools, not
a state-of-the-art
fabrication, that deliver
the speedup.

I must confess I don’t know enough

to make a judgment call. The compa-
ny has reported producing speedy test
chips, but the whole situation inspires
a bit of free-lunch skepticism.
Anyway, if the Intrinsity scheme pans
out, it will be a huge story that affects
the entire IC business, going well
beyond the mere issue of embedded
RISC bragging rights.

Short of such design tool tricks,

boosting performance is more a mat-
ter of brute force. PMC-Sierra, lever-
aging their recent acquisition of the
MIPS house QED, takes the Bugatti
way out by packing a pair of 1-GHz
CPUs under the hood of their
RM9000X2 (see Figure 4).

Of course, the multiprocessing idea

isn’t new, and neither are the head
scratchers that come with it. For

EJTAG

debug

8-KB

Integrated RAM

Packet Switch

500 MHz

160 Gbps

DDR SDRAM

200MHz

25.6 Gbps

HyperTransport

500 MHz

16 Gbps

SysAD bus

200 MHz

12.8 Gbps

DMA

Controller

MP Interrupt

controller

PMC

1-GHz

E9000 CPU

256-KB

L2

PMC

1-GHz

E9000 CPU

256-KB

L2

64 Gbps (core-core)

32

Gbps

Local bus

16 MHz

128 Mbps

Figure 4—It’s two, two, two chips in one. With 50 million transistors to play with, PMC-
Sierra packs two complete 1-GHz 64-bit MIPS cores. Each includes L1 and L2 caches to
minimize congestion while plenty of buses, bandwidth, and 672 pins keep traffic flowing.

0

50

100

150

200

250

300

350

400

450

1998

1999

2000

2001

68K

ARM

MIPS

SuperH

x86

PowerPC

First year that

68K does not

hold the lead

PowerPC

growth partially

because of Nintendo

Figure 3—Six 32-bit architectures are vying for designers’ affection. However, the market is still relatively imma-
ture, and current shipment numbers may not accurately reflect the long-term outcome. Source: WSTS, 2001.

background image

www.circuitcellar.com

CIRCUIT CELLAR

®

Issue 146 September 2002

79

memory) use explicit handshake sig-
nals, rather than a power-consuming,
noise-generating, skew-ridden clock, to
coordinate their activity.

Async chips are data-driven rather

than clock-driven. The conceptual
beauty of such data flow schemes
comes with the recognition that, for a
given processing capability, perform-
ance is ultimately limited by data
dependencies, not how fast you can
wiggle a clock line. That’s why even
for conventional (i.e., clocked) proces-
sors, fancy scheduling is all the rage
both at compile time and runtime.

At the same time, clocked processors

devote evermore silicon to establishing
independent clock domains that allow
turning off the clock to temporarily
idle function units in order to save
power. But this feature of synchronous
chips is a gimme for async designs. No
data = no work = no power.

There are pragmatic as well as theo-

retical advantages. For designers shov-
ing a high-speed clock hither and yon,
the process of timing closure can be dif-
ficult. Fix your setup time problem
here, say hello to your hold time prob-
lem there. By contrast, an async design
is robust and notably impervious to
place and route gotchas. A nonoptimal
async layout may slow things down,
but it won’t make the whole chip fall
down like a house of cards.

And needless to say, a clockless chip

is going to have less clock-related EMI
(i.e., noise) concerns.

Async design isn’t a new concept.

Notably, folks at the University of
Manchester have been working on
async CPU chips for many years. I
first wrote about their async ARM-
based Amulet chips five years ago
(“Haute Chips,” Circuit Cellar 78).

Despite the conceptual appeal and

implementation progress, I’ve got to
say my concerns remain the same as
before. The concept of real time takes
on a whole new meaning in the
absence of a clock, posing some signifi-
cant testing and application challenges.

PICKUP POWER

Everyone would love to have a

Bugatti in the garage, but the fact is
folks in the work-a-day world are
more likely to drive a pickup truck.

Dare I say I noticed a nascent

back-to-reality trend at EPF? Yes,
you’ve got your Intrinsity and PMC-
Sierra concept chips, but this year
the Forum also saw its share of cast-
iron push-rod V8s.

As the top of their line, you might

expect the latest and greatest chip
from ARM to succumb to the King
Kong feature creep found on high-end
computers-in-drag chips.

And yes, the ARM11 has plenty of

bells whistles, DSP-like MAC and

SIMD (vector processing) instructions,
Java acceleration, and more. But read
between the lines of the presentation
and you can find more than token
concessions to reality.

For instance, knowing full well it

would cap the maximum clock rate
(the chip equivalent of “top speed”
and about as useful), the designers
reined themselves in with an eight-
stage pipeline. Now, eight-stages is
certainly nothing to sneeze at, but
topping out at 500 MHz or so, these

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Issue 146 September 2002

CIRCUIT CELLAR

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days it barely puts them
in the super-chip camp.

Like tacking on cylin-

ders and turbos, adding
more pipeline stages only
goes so far. Yes, it allows
you to jack up the clock
rate, but to what end if
very little work gets done
each clock?

Long pipelines actually

increase instruction
latency (i.e., the number
of clocks between the
time an instruction
enters and exits the
pipeline). Worse than
that, at least for the effi-
ciency-minded, they lead
to ever larger branch
penalties as more work
in progress gets flushed.

The benchmark and clock rate

speed contest inevitably seems to lead
down a primrose path littered with
baroque architectural trinkets: multi-
ple instruction issue, out-of-order
completion, branch prediction, specu-
lation, etc. All are whizzy, but these
super-chips are high maintenance
and chugalug gas even when they’re
idling, the last thing a blue-collar
embedded app needs. Give ARM
credit for avoiding the temptation to
go overboard. ARM11 reminds me of
a Corvette—most of the thrills that
go with an exotic design, but with-
out all the excess (not to mention
the sticker shock).

Meanwhile, the Au1100 is a MIPS

chip that doesn’t mind getting its
hands dirty (see Figure 5). With rela-
tively reduced power,
footprint, and fully
loaded with I/O options,
it’s eminently practical
for all manner of hand-
held, battery-driven
applications. No, it isn’t
outrageous, but when
was the last time you
saw a Bugatti hauling
firewood?

Perhaps the most inter-

esting aspect of the
Au1100 isn’t what it is,
but where it comes from.
The company that

designed the chip, Alchemy Semi-
conductor, was recently purchased
by AMD, where it’s known as the
Personal Connectivity Solutions
(PCS) group.

This gives AMD a clean 32-bit RISC

for embedded apps that don’t want to
deal with x86 warts or pay the PC
compatibility premium. That sounds
like a good idea; wonder why they did-
n’t think of it before? Oops, they did.
Remember the 29K? Many people,
myself included, questioned why
AMD pulled the plug on what was one
of the first embedded RISC leaders.

From a business perspective, I sup-

pose AMD’s move highlights the fact
that we’re slowly but surely moving
into a post-PC era. Ten years ago,
AMD (and Intel) might have expected

to live happily ever after
with their x86 chips, but
that’s no longer the case.

Yes, PCs are, and will

continue to be, a huge
business. But there was a
time when the same
could be said of typewrit-
ers. Today, the video
game, automotive, PDA,
set-top box, digital A/V,
and networking indus-
tries (not the PC) are
where the action is.

LIGHT ’EM UP

As we evolve toward

clock rates measured in
picoseconds, why not just
go for the gusto with

speed-of-light process-
ing? According to

Lenslet Labs, digital computers are
an anachronism that stands in the
way of signal-processing nirvana,
mainly doing computations using
light speed (see Figure 6).

Shining multiple lights on a pho-

todetector is the same as an add,
while transmitting lights through a
semitransparent medium is the same
as a (fractional) multiply. And as we
all know, multiplication and addi-
tion are at the heart of signal pro-
cessing functions.

Consider the Lenslet optical vector-

matrix multiply core (see Figure 7).
The key is the spatial light modulator
(SLM), a 256 × 256 array of elements,
the transparency of each individually
set by a linear voltage input.

According to the company, the

setup does a complete
256 × 256 matrix multi-
ply in only 8 ns, which
works out to the equiva-
lent of 8 × 10

12

MAC

operations per second. In
marketing speak, that
makes it an 8000-GHz
processor! Yeah, but can
it do Hello World? No, it
can’t and it shouldn’t.
The proper role for the
ODSPE is as a “most
inner-loop” coprocessor,
attended to by a hierar-

chy of digital underlings.

External

LCD

controller

PCMCIA

Flash memory

SRAM

ROM

Expansion

bus

SDRAM
controller

Enhanced
MIPS-32
CPU core

32 × 16 MAC

16-KB

Instruction

cache

Bus unit

16-KB

Data cache

SRAM

Controller

Power

management

RTC (2)

Secure digital

controller

SSI (2)

AC 97

Controller

System b

u

s

P

e

ri

pher

al b

u

s

EJTAG

DMA

Controller

Ethernet

MAC

LCD

Controller

USB Host

USB

Device

I

2

S

Interrupt

control

GPIO (48)

UART (3)

SDRAM

Figure 5—Dust off that Rolodex. After many years, there’s finally a reason (i.e., MIPS chips
like the Au1100) for non-PC (and beyond-PC) designers to give AMD a call.

Figure 6—You’ve come a long way baby. Lenslet Labs offers an optical twist on the analog
computer concept by crunching photons and transforms rather than electrons and programs.

background image

www.circuitcellar.com

CIRCUIT CELLAR

®

Issue 146 September 2002

81

To that end, the company provides a
library of popular signal processing
transforms: filters, Fourier and cosine
transforms, and so on.

Of course, there is the small mat-

ter of getting results into and out of
the optical subsystem. Let’s see,
updating the entire SLM (256 × 256 =
64,000 elements) in 8 ns gives you a
whopping fraction of a picosecond
per element. Hmm?

Oh well, no sense naysaying at

this point. Nobody asks about gas
mileage or insurance cost for a King
Kong Bugatti either. Only time will
tell whether, and in what form, the
show chips I saw at EPF finally
make it to the street.

The only thing that’s for sure is

that next year’s crop will be faster
and shinier than ever. Whether steel
or silicon, would you have it any
other way?

I

Source array

(VCSELs)

1 × 256

Spatial light modulator

(SLM)

256 × 256

Photo

detector array

(PDA)

256 × 1

Figure 7—The Lenslet Labs optical core includes 256 vertical cavity surface emitting lasers (VCSELs), a 256 × 256
spatial light modulator (SLM), and a 256-element photo detector array (PDA). Each one of the VCSELs shines on
one column in the SLM, and each one of the detectors collects the energy from one row in the SLM, yielding a vec-
tor-matrix multiplication operation.

Tom Cantrell has been working on
chip, board, and systems design and
marketing for several years. You may
reach him by e-mail at tom.cantrell@
circuitcelllar.com.

REFERENCES

[1] C. Csere, “The Steering

Column,” Car and Driver, June
2002.

[2] F. Warner, “Detroit Muscle,”

Fast Company

, June 2002.

SOURCES

Au1100 chip
Advanced Micro Devices, Inc.
(408) 732-2400
www.amd.com

ARM11 microprocessor designs
ARM Ltd.
+44-21223-400400
www.arm.com

Embedded Processor Forum
In-Stat MDR
www.mdronline.com

Fast14 technology
Intrinsity, Inc.
(512) 421-2100
www.intrinsity.com

68K/Coldfire family
Motorola, Inc.
(847) 576-5000
www.motorola.com

RM9000X2 Integrated multi-
processor
PMC-Sierra, Inc.
(408) 239-8000
www.pmc-sierra.com

SuperH microprocessor designs
SuperH Inc.
(408) 955-0202
www.superh.com

[3] J. Turley, “Mario Makes

Millions for MIPS”,
Microprocessor Report

, June

1988.

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CIRCUIT CELLAR

®

Issue 146 September 2002

83

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CIRCUIT CELLAR

®

Issue 146 September 2002

85

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Issue 146 September 2002

CIRCUIT CELLAR

®

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CIRCUIT CELLAR

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Issue 146 September 2002

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Power-save mode draws <100 µA
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88

Issue 146 September 2002

CIRCUIT CELLAR

®

www.circuitcellar.com

Dream P4

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• 2.4GHz Intel Pentium 4 Processor

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• 256MB PC/800 RAMBUS Memory

• 80GB 7200RPM ATA 100 Hard Drive

• 3.5" 1.44MB Floppy Drive

• Plextor 40x/16x/10x CDRW

• P4 Mid Tower Chassis & ATX PS

• 1 Parallel, 1 Serial, 4 USB ports

• 64MB AGP GeForce Video Adapter

• Integrated Sound & 107 Keyboard

• Netgear 10/100 PCI Ethernet Card

• Windows 2000 Pro & Logitech Mouse

$1199

• 1.8GHz Intel Pentium 4 Processor

• Intel 845GBVL Main Board

• 256MB PC/2100 DDR Memory

• 40GB 7200RPM Hard Disk Drive

• 3.5" 1.44MB Floppy Drive

• 52X CD-ROM

• Integrated Audio, Video & Lan

• 107 Enhanced Keyboard

• P4 Mid Tower Chassis & ATX PS

Dream P4

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• 1 Parallel, 1 Serial, 4 USB & PS/2 Port

• ATI Xpert 2000 32MB AGP Video Card

• Sound Card & 120 WATT Speakers

• Logitech PS/2 Mouse

• 107 Enhanced Internet Keyboard

• Netgear 10/100 PCI Ethernet Card

• P4 Mid Tower Chassis & ATX PS

• 2.2GHz Intel Pentium 4 Processor

• Intel 845BG Main Board

• 256MB PC2100 DDR Memory

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• 3.5" 1.44MB Floppy Drive

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CIRCUIT CELLAR

®

Issue 146 September 2002

89

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90

Issue 146 September 2002

CIRCUIT CELLAR

®

www.circuitcellar.com

SI-SCOPE Analyzer

Full featured PC RS232 Analyzer for Windows

and DOS. No more guess work SI_SCOPE lets

you view and interact with any RS232 line.

Complete with Timestamps, Triggers, Signal

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SI_COMM ActiveX

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Ph: 845-566-1919

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www.circuitcellar.com

CIRCUIT CELLAR

®

Issue 146 September 2002

91

Email: sales@picofab.net

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92

Issue 146 September 2002

CIRCUIT CELLAR

®

www.circuitcellar.com

RS232

to Windows

WinWedge inputs real-time
serial data from any device
direct into Excel, Access, VB
or any Windows program.

www.taltech.com

New CE
version!

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www.circuitcellar.com

CIRCUIT CELLAR

®

Issue 146 September 2002

93

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Data Acquisition

94

Issue 146 September 2002

CIRCUIT CELLAR

®

www.circuitcellar.com

INDEX

85

Abacom Technologies

84

Abia Technology

85

ActiveWire, Inc.

21

All Electronics Corp.

83

Allied Components

85

Amazon Electronics

10

Amulet Technologies

92

AP Circuits

90

Appspec Computer Tech. Corp.

48,49,86

Arcom Controls System

90

Atlantic Quality Design, Inc.

7

Atmel

86

Avocet Systems, Inc.

86

Bagotronix, inc.

57,84

Basic Micro

85

Bellin Dynamic Systems, Inc.

79

CadSoft Computer, Inc.

69

Capital Electro Circuits

67

CCS-Custom Computer Services

53

Cermetek Microelectronics Inc.

92

Conitec

29

Connecticut mircoComputer Inc.

91

Cyberpak Co.

33

Cypress MicroSystems

C4

Dataman Programmers, Inc.

86

DataRescue

83

Decade Engineering

90

Delcom Engineering

87

Designtech Engineering Co.

The Advertiser’s Index with links to their web sites is located at www.circuitcellar.com under the current issue.

Page

88

Digital Products

88

Dreamtech Computers

1

Earth Computer Technologies

47,81

ECD (Electronic Controls Design)

85

EE Tools

(Electronic Engineering Tools)

67

EMAC, Inc.

90

EVB Plus

47

ExpressPCB

84

FDI-Future Designs, Inc.

84

Hagstrom Electronics

39

HI-TECH Software,LLC

91

HVW Technologies Inc.

82

i2 Chip, Inc.

87

IMAGEcraft

86,92

Intec Automation, Inc.

86

Intronics, Inc.

61

Intuitive Circuits, LLC

73

Jameco

64

JK microsystems

61

JR Kerr Automation & Engineering

81

LabJack Corp.

81

Lakeview Research

93

Lemos International

2

Link Instruments

93

Lynxmotion, Inc.

24

MaxStream

87,89

MCC (Micro Computer Control)

9

Microchip Design Contest

90

Microcross

89

Micro Digital Inc

92

microEngineering Labs, Inc.

74

Micromint Inc.

84

MicroSystems Development, Inc.

87

MJS Consulting

69

Mosaic

55

MVS

86

Mylydia Inc.

65

NetBurner

95

Netmedia, Inc.

56

New Micros, Inc

87

OKW Electronics Inc.

93

Ontrak Control Systems

88

P & E Microcomputer Systems

C2

Parallax, Inc.

83

Phytec America LLC

83

Phyton, Inc.

91

Picofab Inc.

91

Pioneer Hill Software

86

Prairie Digital Inc.

89

Pulsar Inc.

89

R2 Controls

25

R4 Systems Inc.

17

Rabbit Semiconductor

84

Rad Proto

39

Remote Processing

89

RLC Enterprises, Inc.

85

RPA Electronics Design, LLC

86

Rutex

Light the Way—An LED-Based Alternative

High-Frequency Job—Frequency Counter and VFP

The Air Data Computer

MCS-51 SBC for the Classroom

Choosing Your LCD

2-D or Not 2-D?

Robotics Corner: SOPHOCLES—A Solar-Powered MSP430 Robot
I Above the Ground Plane: Audio Transformation
I Applied PCs: Using STKxxx Hardware to Build an Ethernet Controller
I From the Bench: 12,16,18, Hike!—Dashing for Flash
I Silicon Update: Watch Me Pull a Rabbit Out of My Hat

Page

Page

Page

PREVIEW

147

ADVERTISER’S

5

Saelig Company

3

Scott Edwards Electronics Inc.

88

Sealevel Systems Inc.

60

Seattle Robotics

84

Senix Corp.

91

Sensory, Inc.

83

Signum Systems

91

Softools

90

Sotfware InnoVations Inc.

23,72

Solutions Cubed

92

Spectrum Engineering

83

Square 1 Electronics

91

SUMBOX Pty Ltd.

15

Systronix

92

TALtech Instrumental Software

C3

Tech Tools

89

Techniprise Inc.

40,41

Technologic Systems

93

Technological Arts

88

Tern Inc.

90

Triangle Research Int’l Inc.

29

Trilogy Design

60

Vantec

93

Weeder Technologies

91

Xilor Inc.

87

Z-World

61

Zagros Robotics

85

Zanthic Technologies Inc.

Attention Advertisers:

November Issue Deadlines

Space Close: Sept. 11

Material Due Date: Sept. 18

Theme: Embedded Development

BONUS DISTRIBUTION

Embedded Systems Conference East

background image
background image

ould you believe we’ve been doing this for 15 years?! Technology has changed a lot during that time but

Circuit Cellar’s basic ingredi-

ents haven’t. I suppose I could be egotistical and say that it’s because I’m still hanging around, but the real truth is that it’s because the

readers are. A niche magazine like

Circuit Cellar can’t thrive without a loyal core audience, and I appreciate that we have one of the finest

examples there is. I’d like to think that if I have changed or tweaked anything it was for a positive reason.

One area in which I think we’ve done better than most magazines is running design contests. There isn’t any secret formula. It’s just that we run contests orient-

ed toward producing great editorial, while most everyone else orients them toward producing great ad revenue.

Circuit Cellar contests involve work that should be

rewarded. Sure, there’s the obvious inducement of the prize money, but the real recognition of being one of our contest winners often comes as a result of publish-

ing an article about their project in

Circuit Cellar or posting the abstract on our web site. In fact, this week I was communicating with one previous contest winner

about other projects in the works, and he replied:

Steve, I have just been insanely busy over the last 12 months or so. Not that that’s a bad thing, but it’s a shame that I haven’t had much time to devote

to some things that I would like to do. Anyway, things will settle down a little later in the year, and I should have some more time to think about submitting

some articles based on other projects I have done.

It’s kind of ironic, but part of the reason I’m so busy is that I’m now much in demand as an electronics/software designer, which in no small part is due to

the exposure (and “prestige,” if you like) of winning prizes in the Philips Design 2K and Atmel Design Logic 2001 contests. I think that shows how worthwhile

your contests are. That’s not to say they weren’t fun too! I hope they continue. Sincerely, Lionel Theunissen

Lionel’s remarks aren’t unusual. I hear reports about job offers, consulting contracts, contest designs now in production, and more from many contest entrants.

In fact, I specifically used the word “entrant” and not “winner” because getting exposure isn’t just an opportunity open to winners. Basically, if it’s a great project, I’ll

be talking to you about ways to show it to the world.

Our most recent Cypress MicroSystems contest is a case in point. I should be receiving the judge’s decisions this week and we’ll have the results posted

around the time you are reading this. Like most of our contests, I know that the judges had a tough time because there were so many good entries. Let me just tell

you about a few. There’s one entry titled “Intelligent Lighting Effects Controller” that uses Doppler frequency spectrum analysis to determine a stage performer’s

specific motions to create corresponding visual effects. This is in contrast to the usual preprogrammed lightning effects employed by most places. Then there’s the

“Ultrasonic Cave Mapping Platform.” This ingenious project combines an ultrasonic ranging unit with a 6-degrees-of-freedom inertial navigation system that takes

precise measurements of caves and tunnels as it maneuvers through them.

Then there is the computer augmentation group. This is where people with model trains, planes, cars, or other off-the-shelf devices go crazy with engineering

enrichment (all for a good cause and with proper engineering technique, mind you). One entrant augments standard electric R/C model cars with electronic speed

control and an antilock braking system. Not to be outdone, another entrant has the perfect accessory for model airplane people. The project uses accelerometers

and software attached to the usual servos controls to select a variety of preset flight attitudes. More down-to-earth upgrades include things like a SmartMedia MP3

player, using a color GameBoy as serial data display, and making a five-axis-controlled Santa Claus doll that assembles a Christmas tree; it’s novel, but still a good

design example and worthy contest entry.

I could go on and on, but that’s why we post abstracts and work with entrants to publish articles about their projects. After years of encouraging great designers

to enter our contests, I have come to feel they should all be rewarded—if not by the sponsor with prize money, then perhaps by

Circuit Cellar with an honorarium to

post the full project (not just the abstract). I’m sure the increased post-contest exposure will do us both good, so I may be calling you.

In any case, don’t put your soldering irons away yet. It’s contest time, guys. Right now we’re running full bore with the Mad Dash for Flash Cash Microchip Design

Contest 2002. You can get all of the details on our web site. Of course, if you’re just too busy this fall or PICs aren’t your bag, the spring contest is sure to interest

you. If there’s one thing about contest success that I like, it’s that it keeps those sponsors coming; in fact, the next three contests are already booked. Next spring we

have Motorola, followed by Hitachi. Then, to keep all of you AVR guys happy, Atmel will be back. Needless to say, it isn’t going to get boring around here.

The Right Exposure

INTERRUPT

w

steve.ciarcia@circuitcellar.com

96

Issue 146 September 2002

CIRCUIT CELLAR

®

www.circuitcellar.com

PRIORITY

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