circuit cellar2001 09

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Intel Pentium 4 Processor

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15" LCD Flat Panel Display w/3YR warranty

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P4 Mid Tower Chassis & 300W PS

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40GB 7200 RPM ATA 100 Hard Drive

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ATI Rage Fury Max 64MB AGP Video Adapter

Creative Labs Live Value Sound

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Windows '98, PS/2 Mouse & Keyboard

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NEWS

Issue 134 September 2001

CIRCUIT CELLAR

www.circuitcellar.com

Edited by Rick Prescott

NEW PRODUCT

PENTIUM MMX PC/104 MODULE

The CPU-1231 integrates numerous features in a sin-

gle CPU board. These features include EIDE interfaces,
SVGA with resolutions up to 1024 × 768, two serial
ports (UART 16550), and two USB ports. Integrated fea-
tures also include a 10/100-Mb Ethernet controller, key-

board port, bidirectional parallel port EPP-ECP, and FDC.
Other onboard functions available are an SSD socket
with up to 288 MB of solid state disk, watchdog timer,
and real-time clock. In addition, the CPU-1231 module
can be equipped with up to 128 MB of DRAM to satisfy
complex graphical applications.

The board is PC/104-compliant and can be expanded

easily with other PC/104 modules in order to improve
the features of your PC/104 system.

This device integrated a whole PC board and many

other features in a single 3.6 × 3.8 (91 × 96 mm) module.
Its size makes this module an ideal choice for auto-navi-
gation devices, medical devices, communication devices,
routers, gateways, Internet appliances, and any other
application requiring network capabilities and high per-
formance in a small and rugged form factor.

Eurotech
+39-0433-486258
Fax: +39-0433-486263
www.eurotech.it

Issue 134 September 2001

CIRCUIT CELLAR

www.circuitcellar.com

PRE-ASSEMBLED FRONT PANEL

The VP4846 is a pre-assembled front panel product for

low-volume, user-interface applications. The panel is
based around a 160 × 80 pixel LCD module that offers a
total of four different combinations of front panel key-
pad configurations. This graphic LCD module features
array LED backlight and
transmissive polarization
for easy readability in low
to moderate ambient
lighting conditions.

VersaPanel integrates

the graphic display with a
customizable keypad with
up to four different but-
ton configurations. Its
wide operating tempera-
ture range makes it ideal
for use in extreme envi-
ronments. VersaPanel
range provides designers
with a flexible means of

producing professional front panels without incurring
special tooling costs, while saving weeks of development
time. They combine a display module, backlight, and
various configurations of key switches on a single PCB.

The panel is best suited for applications in instrumen-

tation and medical sys-
tems. The LCD panel dis-
plays four rows of 20
characters in alphanu-
meric mode. It is rated
for operation over a wide
temperature range of –20°
to 70° C.

Pricing starts at $47 for

100 pieces.

Densitron Corp.
(562) 941-5000
Fax: (562) 941-5757
www.densitron.com

NEWS

NEW PRODUCT

SMALL ACTIVE GPS ANTENNA

The Micro Skymaster is the world’s smallest active GPS patch antenna. Its

tiny size and rugged construction allows for military and other applications
demanding a high degree of confidentiality. In combination with a low-power
miniature GPS receiver, the Micro Skymaster allows OEMs and designers a
complete solution so compact that GPS can now be added to a whole new
class of applications such as PDAs and hand-helds.

The antenna is an ultra-high sensitivity 24-dB gain active GPS antenna

that measures only 33.95 × 25.20 × 10.60 mm. Its small size does not sacri-
fice performance, keeping many of the features found on the manufacturers’
larger models including magnet or screw mounting and universal FME con-
nector. The FME connector is key in that it allows you or OEM to attach
connectors to the antenna to mate with a wide selection of receivers in the
market. Power consumption for the device is a mere 11 mA with a supply
voltage of 3 to 5 V. It comes standard with three-meter RG174/U RF cable,
extended temperature rating of –30 to
85° C and waterproof casing, which
allows it to handle any rugged per-
sonal or industrial usage.

Micro Skymaster is available

through distributors in sample and
end-user quantities for $79.

Tri-M Systems
(604) 527-1100
Fax: (604) 527-1110
www.tri-m.com

EMBEDDED CONTROL BOARD

The Zendex ZXE-x86 embedded controller is one of the first controllers to

use the revolutionary ZF Linux ZFx86 (formerly MachZ) microprocessor as
its core. Complementing the processor is the robust Linux operating system
including web server and 12 × 32-pin DIP memory socket for 1 GB plus addi-
tional EPROM, flash memory, or RAM that can serve as a solid-state disk.
The memory can be programmed (uploaded and downloaded) remotely via an
Ethernet interface for applications including industrial control, information
kiosks, monitoring and surveillance systems, and gaming.

The basic embedded controller board includes the ZF Linux ZFx86 CPU

with up to 256-MB DRAM, floppy interface, IDE primary/secondary inter-
face, PS/2 keyboard and mouse interface, and support for Linux and other
RTOS. In addition, it can be configured with special features like more than
1 GB of EPROM, flash memory, or RAM, Type I, II, or III PCMCIA interface,
C&T 69000 video controller with RGB output, stereo sound circuit deliver-
ing two watts/channel, two buffered TTL serial ports, as well as two RS-232

serial ports.

Pricing for the fully-featured

ZXE-x86 embedded controller is
$995 for single units, and it is
available off the shelf.

Zendex Corp.
(925) 828-3000
Fax: (925) 828-1574
www.zendex.com

www.circuitcellar.com

CIRCUIT CELLAR

Issue 134 September 2001

NEWS

NEW PRODUCT

1-800-826-5432

ORDER TOLL FREE

SHOP OUR ONLINE STORE

www.allelectronics.com

CHARGE ORDERS to Visa, Mastercard,

American Express or Discover

TERMS:

NO MINIMUM ORDER

. Shipping and handling for the

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HI, PR or Canada must pay full shipping. All orders delivered
in CALIFORNIA must include local state sales tax. Quantities

Limited. NO COD. Prices subject

to change without notice.

Van Nuys, CA 91408

FAX (818)781-2653

e-mail allcorp@allcorp.com

Outside the U.S.A.

send $3.00 postage.

Powerful windshield
wiper motor for
2000-2001 Saturn L
series automobiles.
Two speeds; high speed
is 106 RPM at 12 Vdc,
4 Amps. Low speed is
41 RPM at 12 Vdc, 0.91 Amps. 3/8" threaded
drive shaft with nut. A 2.25" lever with a univer-
sal joint, attached to the shaft, is easily remov-
able. 7" overall length x 3.5" x 4".

CAT # DCM-171

each

Rechargeable Battery

each

Eveready # NH22. Nickel Metal
Hydride rechargeable battery.
Replaces 9 Volt batteries in many
applications. Actual voltage
7.2 Volts. Can be charged in most
Nickel-cadmium chargers.

CAT# NMH-9

Two Speed Worm Gear Motor

"Pump up the volume" with the Powerbite ®
personal stereo amplifier. Boost the power of
your computer, personal CD player, portable
TV or video game, any audio device with a line
level output. This ergonomically designed desk-
top amplifier provides 30 (15 x 2) Watts of
power for a clean, full sound that can be played
through bookshelf or larger speakers.
Trackball-like volume control. Tone control.
LED power indicator. Includes wall-mount
power supply and stereo mini-to-RCA cable to
connect to audio source. New units in retail dis-
play packaging. Speakers not

included.

CAT# PBA-30

each

30 Watt Stereo Amplifier

Issue 134 September 2001

CIRCUIT CELLAR

www.circuitcellar.com

mbedded sys-

tems offer chal-

lenges distinct from

traditional system

designs. These range from processor
and memory choices to product envi-
ronment. With an understanding of
the many esoteric aspects and effects
of product design, you can immediate-
ly improve the chances for product
and design success. For the designer,
it is not enough to know what com-
ponents are needed to make up a
design; you must know how compo-
nents interact, what influencing fac-
tors may come into play, and within
what context a design will operate.

In this article, I’ll put these issues

into proper perspective with examples
based on the NET+ARM processor.
My goal is to provide insight that will
help you to better prepare at all levels
for future design projects.

REQUIREMENTS & LIMITATIONS

The first step in creating an embed-

ded product is to understand the
implied specifications, not just the
functional requirements. Basic ele-
ments will have wide-ranging effects
on the throughput, scalability, and
length of the development cycle, all of
which must be plotted in advance.

FEATURE
ARTICLE

When handling an
embedded system
project, the same old
story doesn’t apply.
Traditionally, with
parts list in hand, you
were ready to build.
But, embedded appli-
cations are more
involved. William’s
examples will better
prepare you to create
successful designs.

Cost is another important issue, as

most embedded products have a strict
budget. Therefore, the bill of materi-
als cost needs to be much lower than
with traditional designs. A typical
embedded product with Ethernet con-
nectivity will have a bill of materials
cost between $45 and $100. These
constraints require careful cost versus
performance analysis.

Decisions regarding serial, USB, or

C interfaces also affect the cost-to-

performance ratio. Processors with
integrated interfaces such as Ethernet,
serial, and USB are readily available.
However, finding these processors in
your price range while providing prod-
uct scalability is more difficult.

Two other major considerations

that are sometimes overlooked are
power requirements and temperature
range. If your product is battery-pow-
ered, thought needs to be given to
current draw of all system compo-
nents. And, if the product needs an
industrial temperature rating, all com-
ponents in the box need to be indus-
trial rated. Finally, although the focus
of this article is hardware, it’s also
important to remember that true
product scalability is just as much
dependent on software.

In addition to recognizing a prod-

uct’s functional requirements, an
understanding of its environment is
equally important. Where will the
product function and what are the
implications of that environment? In
answering these questions, you can
benefit from inherent advantages and
plan for worst-case scenarios.

Considerations such as environ-

mental contamination and tempera-
ture extremes will have an effect on
performance and potential life
expectancy. Human/machine interac-
tion is another important factor. How
often will programming modifications
be performed? What are the product’s
likely maintenance schedules?

You must think about technical

environments, as well. For example, if
the product is interfaced to a LAN,
how will the associated traffic affect
neighboring devices? If the product is
a serial-to-Ethernet gateway, responsi-
ble only for taking data from a serial
protocol and converting it to Ethernet

William Dowell

coste

Hardware for
Embedded Systems

www.circuitcellar.com

CIRCUIT CELLAR

Issue 134 September 2001

packets (and vice versa), consider how
much data is transmitted and how
much delay can be tolerated.

Latency isn’t a major consideration

for many applications, for example, it
isn’t a problem for a product that sim-
ply collects data over time and is peri-
odically polled for that information.
However, latency is a limiting factor
of the Ethernet topology in some
applications. In situations in which
immediate reaction to emergency sit-
uations is required (e.g., valve control
on a factory floor), communication
and response must be accomplished
in virtual real-time.

COMMUNICATIONS,
COMPONENTS & PROTOCOLS

Network device prices continuously

drop. Because of this, many applica-
tions reuse existing wiring to keep the
Ethernet cabling installation at a min-
imum. It’s common in building con-
trol applications where many miles of
485 or 422 wiring already exist. The
wiring usually remains in use for
communication with building control
peripherals. These applications use
gateway devices, with software to
bridge communications among legacy
serial protocols and Ethernet.

Today, the physical cabling in many

buildings usually consists of shielded
or unshielded twisted pair wiring.
Whether shielded or unshielded,
twisted pair wiring is effective in
rejecting electromagnetic interference
(EMI). The primary difference is that
shielded twisted pair wiring provides
much better noise immunity.

Besides noise generated from exist-

ing components in a facility, such as
electrical lines, transformers, and gen-
erators, noise also is produced by data
transmission on the wire. The impli-
cations make installing and debugging
new hardware a challenge. Possible
effects range from network instability
when the lights are on to data errors
at high data rates (worst cases).

A special grade of twisted pair

wiring, Cat 5, addresses many of the
issues faced with standard twisted
pair. Cat 5 supports 100-Mbps data
communications with a low probabili-
ty of error. Fiber optic cable also is
used in Ethernet networks, particular-

ly in EMI-sensitive environments.
Fiber is immune to EMI, doesn’t radi-
ate, and therefore is “eavesdrop-
proof.” Fiber is capable of extremely
high data rate communications.

Two common Ethernet technolo-

gies are 10BaseT and 100BaseT, both
of which operate over unshielded
twisted pair cabling. 10BaseT runs at
a raw data rate of 10 Mbps and
100BaseT runs at 100 Mbps. There is
a difference between raw line speed
and sustained application throughput.
Line coding, packet overhead, and the
media access protocol reduce the
actual bandwidth available to applica-
tions. The LAN is a shared resource,
and all devices on the LAN need to be
able to communicate with each other.
So, no device should have the ability
to own all of the bandwidth. When
using 100BaseT connectivity, the
device has to be able to transmit and
receive packets at the raw 100-Mbps
rate, but not necessarily sustain that
data rate continuously.

A lot of applications are designed

according to the so-called “30% rule.”
Simply stated, under normal circum-
stances when other devices are shar-
ing the network, a device should be
designed to require no more than 30%
of the available raw bandwidth. On a
100BaseT network, that means a peak
of 30 Mbps, or about 4 MBps.

Ethernet is logically a serial bus,

and the original implementations
using coaxial cable reflect this physi-
cally. However, twisted pair wiring
requires that the physical links be
point-to-point, so the hub was intro-
duced. The serial bus still exists, but
it’s contained within the hub.

10/100BaseT physical topology is a

star configuration, where each device
in the star is connected directly to a
hub or switch. Communication from
one device to another on an Ethernet
network originates from the sending
device, then proceeds to the hub or
switch to which it is connected.

There are two basic types of

Ethernet networks: flat and multi-
tiered. In a flat network consisting of
hubs only, all devices see all of the
packets. With multi-tiered Ethernet
networks, in which switches are
located among hubs, only the destina-

tion device and devices connected to
the same hubs as the originating and
destination devices see packets. This
is because the switches can determine
which ports should see the packet.

A benefit common to both net-

works is easy protection from faulty
devices. Unlike daisy-chain networks,
if one device on the network goes
down, communication among the
remaining devices isn’t affected. With
multi-tiered networks, data collision
is minimized. The major drawback of
this topology is the amount of cabling
and cable installation costs.

Primarily because of labor costs

associated with installation, network
cabling is often the most costly part
of a network. Because of this cost,
many other mediums and protocols—
wireless in particular—are being
explored to connect and carry traffic.
Two of these wireless protocols are
802.11 and more recently Bluetooth.

Finding an operating system with a

TCP/IP stack that has a small foot-
print helps keep the materials cost
low by reducing the amount of
required memory.

With an embedded Internet server,

you must carefully plan web page
construction. Typical web interface
designs, using web pages for control
or monitoring, use less than 350 Kb of
flash memory for the complete image.
When animated

.gif and .jpg files

and complicated logos are introduced,
however, the footprint requirement
may grow rapidly. Many designs with
FTP, HTTP, and e-mail capabilities
combined with custom applications
will still fit in 0.5-MB or less flash
memory. Placing a 1-MB part on the
board allows for adding significant
features without redoing the board.

Besides the memory subsystem,

Ethernet requires many hardware ele-
ments to be implemented, as well.
These include the media access con-
troller (MAC), Ethernet physical layer
(PHY), a transformer, and connector.

The MAC implements the lowest-

level protocol, which is responsible
for carrier sense multiple access with
collision detection (CSMA/CD) and
basic packet transmission. The main
responsibilities of the MAC include
handling collision conditions on the

Issue 134 September 2001

CIRCUIT CELLAR

www.circuitcellar.com

Ethernet. When a collision is detected
on the media, the MAC will abort the
transmission and then retransmit
until the packet is sent. The MAC
also benefits efficiency by checking
the address of the packet in hardware
before passing to the stack.

Choosing a processor with an inte-

grated MAC is beneficial as the num-
ber of design components is reduced.
In the case of an external MAC, addi-
tional memory is sometimes needed.
By integrating the MAC, system cost
decreases as well.

The main responsibility of the PHY

is to detect the physical conditions of
the network. It acts as a transceiver,
providing carrier and link detection. It
is responsible for translating internal
device signals to the world through
the transformer and connector.

MEMORY CHOICES

Choosing the memory in a system

is the most important aspect of the
design and affects where the product
can be used as well as the product’s
overall functional requirements. The
application usually will dictate what
type of memory is used. Other factors
such as cost, availability, and product
stability will affect your RAM choice.

Memory falls into two major cate-

gories, volatile and nonvolatile (both
offer many choices). Nonvolatile
memory technologies include SRAM
and DRAM (including extended data
out, fast page, and synchronous vari-
eties). Nonvolatile memory can be
created by adding a permanent power
source to volatile memory (e.g.,
NVRAM) or by using one of the many
varieties of EPROM technology.

EPROM technology is based on

floating-gate transistors that can
retain a charge without a continuous
power source. Variations include UV
EPROM (erased by applying an exter-
nal source of UV light) and EEPROM.
The latter variety can be further bro-
ken down into byte-erasable versions
(which is usually what is meant by
the term “EEPROM”) and sector- or
bulk-erased versions (flash PROM).

SRAM is known for product avail-

ability and speed. SRAM bursts, for
example, usually use a 2-1-1-1 cycle,
meaning it takes two clocks to fetch
the first long word (32-bit access) and
one clock per word thereafter. SRAM
is easy to implement in a design. The
limiting factors of SRAM include low-
density packages and high prices.

DRAM and extended data out

DRAM (EDO DRAM) were popular
for use in older designs. But, availabil-
ity is a problem with these DRAM
types these days. What’s more, EDO
DRAM is difficult to obtain in densi-
ties common for embedded system
designs (1, 2, or 8 MB).

Synchronous DRAM (SDRAM) is

the most popular memory in today’s
embedded product designs. SDRAM
availability is fair to good and cost per
megabyte ratios are excellent com-
pared to SRAM. Some processors
interface to SDRAM easily. Also note
that SDRAM is beneficial for efficien-
cy. In fact, a typical burst from
SDRAM could be 3-1-1-1, making it
nearly as efficient as SRAM.

Having a processor with an inte-

grated memory controller for SRAM,
DRAM, and SDRAM is helpful when
approaching an embedded design.

Most processors require an external
memory subsystem responsible for
image storage and program execution.

For software image storage, most

devices use flash EEPROM, a form of
nonvolatile memory that supports in-
circuit erasing and reprogramming.
Two common suppliers of flash mem-
ory include AMD and Intel. Flash
memory by itself is slow, thereby
making program execution directly
from flash memory inefficient, partic-
ularly in real-time applications. In
most designs, flash memory is used
because it’s nonvolatile and easy to
update. Furthermore, by copying the
image to RAM for execution, it can be
used without adversely affecting prod-
uct performance. The only downsides
are the incremental cost of additional
RAM to hold the image and start-up
latency caused by copying.

Flash memory is usually organized

in sectors, but sector boundaries can
be ignored when reading. Flash mem-
ory has unlimited read capability, but
can be written only a finite number of
times. Usually, you write to flash
memory an entire sector at a time,
and a sector must be erased before
rewriting to it.

Another advantage of executing

from RAM is the ability to remotely
reprogram the flash memory device.
NET+ARM (and many other proces-
sors) will bootstrap from a flash mem-
ory unit to begin fetching instructions
during startup (more on this later).
Also, because flash memory is expen-
sive compared to RAM, be careful
when choosing the image size. There
is a fine line between having too little
flash memory, limiting scalability
from a software perspective, and hav-
ing an excess of flash memory that
needlessly adds to the project cost.

Another type of nonvolatile memo-

ry is byte-writable EEPROM. This is
used in many applications to hold
configuration information for the
device. These parameters usually
include the MAC address and IP
address at a minimum. Other parame-
ters can include subnetwork mask,
serial number, gateway, data rate set-
tings, or others. EEPROM can be set
up and addressed as a simple static
RAM-type device. Although EEPROM

Instruction storage Instruction

Data storage

Data cycles

Cycle time

Ethernet Tx and Rx

location

cycles

location

bandwith (MBps)

Flash memory

4-4-4-4

EDO/FP

3-3-3-3

1680

9.52

Flash memory

4-4-4-4

SDRAM

4-1-1-1

1380

11.59

Flash memory

4-4-4-4

SRAM

2-1-1-1

1260

12.70

Flash memory

4-4-4-4

SRAM

2-2-2-2

1440

11.11

Flash memory

4-4

SRAM

2-1-1-1

780

20.51

Flash memory

4-4

SRAM

2-2-2-2

960

16.67

EDO/FP

3-3-3-3

EDO/FP

3-3-3-3

1440

11.11

SDRAM

4-1-1-1

SDRAM

4-1-1-1

840

19.05

SRAM

2-1-1-1

SRAM

2-1-1-1

600

26.67

SRAM

2-2-2-2

SRAM

2-2-2-2

960

16.67

Table 1—

This is how a memory subsystem is chosen for a specific task. Instruction execution times are calculated

and compared to memory access times to determine what type of memory will give the required performance.

GOING WIRELESS IS EASY

WE ARE YOUR CONNECTION

TO THE BEST OF THE BEST

WHEN IT COMES TO OUR

RF DATA MODULES

The TX3A & RX3A data link modules are a minature PCB mounting UHF radio transmitter and

receiver pair. They enable the simple implementation of a data link at up to 64 kbits/s at distances

up to 75 meters in-building and 300 meters open ground. North American 902-928MHzISM band.
Transmitter - TX3A

Crystal-locked PLL, FM modulated at up to 64kbps

Operation from 2.2V to 13V @ 7.5mA

Built-in regulator for improved stability and supply

noise rejection

+3dBm (2mW) RF output

Nominal in +10dBm (10mW) nominal RF output

Enable facility

The BiM2 radio transceiver module is an enhanced replacement for the original BiM.

It offers greater transmit power, increased receiver interference immunity, higher data rates and a

lower profile to the original. BiM2 is ideally suited to providing bi-directional wireless connectivity

for a broad range of battery / mains powered products.

EN 300 220-1 & EN 300 683 compliant

TX power 10mW @ 5V

RX sensitivity -100 dBm

Data rates up to 64 kbps

Usable range up to 200m

Fully screened

SAW controlled FM transmitter

Double conversion Superhet receiver

3V and 5V versions

Plug in replacement for BiM-433-F

Low power requirements

The wireless modem with the best sensitivity in the industry and an incredibly low price. Smaller than a

credit card, this compact data transceiver is perfect for OEMs needing high

performance and dependable operation. The 9XSTREAM wireless modem

transfers data at 9600 or 19200 baud up to 1/4 mile in a city environment or

greater than 10 miles line-of-site with a directional antenna.

Easy to integrate. No knowledge of RF necessary

Standard Serial Interface. Interfaces with any microcontroller

Reliable data transfer performance

FCC approved

Low power consumption

Small size

Low cost

sales@lemosint.com

www.lemosint.com

800-587-5069

(508) 798-5004 Fax: 508-798-4782

48 Sword St. • Auburn, MA 01501

The RPC module is an intelligent transceiver, which enables a radio network link to be simply

implemented between a number of digital devices. The module combines an RF circuit with

processor-intensive low-level packet formatting and recovery functionality, requiring only a simple

antenna and 5V supply to operate with a microcontroller or a PC.

SAW controlled FM transmitter and superhet receiver

Power save mode

Reliable 30m in-building range, 120m open ground

40kbps half duplex

Built-in self-test/diagnostics/ status LEDs

Single 5V supply @ <20mA

Receiver - RX3A

Single conversion FM superhet with SAW

front end filter

Operation from 2.7V to 13V @ 9.5mA

Built-in regulator for improved stability and

supply noise rejection

64kb/s, -100dBm sensitivity @ 1ppm BER

RSSI output with 75dB range

RADIOMETRIX

Physical dimension: 33 mm x 23 mm x 4 mm

Physical dimension: RX3 48 mm x 19 mm x 4.5 mm, TX3 3 2 mm x 12 mm x 3.8 mm

Physical dimension: 54 mm x 32 mm x 13.5 mm

The XStream-PKG was designed
to provide end users with an easy
to install wireless
communications link
between equipment.

900 MHz

Issue 134 September 2001

CIRCUIT CELLAR

www.circuitcellar.com

is typically slow, it usually doesn’t
affect the embedded product, as its
main purpose is served at startup.

Nonvolatile RAM (NVRAM), which

includes its own power source, is
sometimes overlooked as an option to
flash memory. Many RTOS vendors
recommend small NVRAM devices
for configuration information. To
enhance ease of use, NetSilicon rec-
ommends EEPROM to hold configura-
tion devices such as MAC address,
serial numbers, and IP addresses.
When IP addresses or configuration
settings are modified, you can simply
write the new values to EEPROM
instead of burning the flash memory
sector holding the configuration infor-
mation again. Small units can be
used, as the required EEPROM foot-
print is typically small. With the
NET+Works support package for the
NET+ARM, routines exist for MAC
addresses, IP configuration settings,
and serial numbers. Taking advantage
of these features can save a lot of time
and development effort.

MEMORY SYSTEM DESIGN

RAM is usually used for program

execution and data storage. At a mini-
mum, it needs to be the size of the
flash memory with additional memo-
ry for data and the Ethernet buffer
storage. Other considerations come
into play when determining RAM
size, such as whether or not the unit
will be equipped for field upgrades.

In some schemes, such as the abili-

ty to upgrade via FTP provided with
the NET+Works solution, RAM size
has to be at least double the program
image size to hold both the currently-
executing image and the image about
to be written to flash memory. A rou-
tine then will be spawned to burn the
new image into flash memory. So,
finding the RAM requirements will
involve taking the executable image
size, adding another buffer responsible
for temporarily storing the upgraded
image, as well as adding room for data
and Ethernet buffer storage.

Finally, you must consider the heap

size. The heap is used for jobs such as
allocating memory for each socket
connection. For example, each socket
connection with the NET+OS

requires approximately 400 bytes. A
typical approach to determine RAM
size in this case is to simply double
the original executable image size.

Executing directly out of flash

memory is not too slow in many low-
end applications. Devices such as a
simple serial-to-Ethernet gateway can
afford to run out of flash memory
without a performance penalty. Some
processors, such as NET+ARM, can
take advantage of internally generated
signals to gain efficiency with flash
memory. For example, with a 16-bit
AMD flash memory device, the chip
enable on the flash memory can be
grounded, thereby keeping it active all
of the time. This isn’t recommended
for low-power designs because of the
constant power dissipation, but if the
power can be afforded, this feature
will help decrease flash memory
access time. Then, WRITE ENABLE
and OUTPUT ENABLE signals can be
taken directly from the processor.

For example, the NET+ARM has

five chip selects available from the
processor. Common WRITE ENABLE
and OUTPUT ENABLE signals exist
for the memory-mapped peripherals.
Chip select zero is often used for flash
memory. But, the chip select zero
OUTPUT ENABLE and WRITE
ENABLE from the NET+ARM would
not be used. Instead, the chip enable
input on the flash memory is ground-
ed while the WRITE ENABLE and
OUTPUT ENABLE signals are driven

by address lines 27 and 26 on the
NET+ ARM, respectively. By doing
this, the data access time is depend-
ent on the OUTPUT ENABLE signal
as opposed to the CHIP ENABLE sig-
nal, which is usually faster. This
helps bypass the slow access times
associated with flash memory units.

Two topics I haven’t discussed yet

are power stability while upgrading
and recovery in the case of a failure.
Unfortunately, if there is only one
flash memory device in a system,
which is often the case in cost-sensi-
tive designs, the flash memory can be
corrupted if the power supply fails.
When this occurs, you are forced to
access the processor in another man-
ner. In the case of the NET+ARM,
this alternate procedure involves the
JTAG connection. This allows you to
gain control of the processor to cor-
rect the code image in the memory.

Besides understanding the different

types and footprints required, finding
the correct memory also depends on
tolerable memory access times (see
Table 1). Memory speed has a direct
effect on how much data the proces-
sor can handle. Slow memory results
in slow instruction fetches, which in
turn decreases product efficiency. It’s
necessary to understand these depend-
encies in the context of requirements
when building an embedded product.

To understand Table 1, you need

more details about NET+ARM. The
NET+ARM shares cycles between its

DSPs
DACs
ADCs

Sensors

Various inputs

Outputs

Control lines

IAS

802.11

ADSL

Device-specific

components

Customer

hardware 1

Customer

hardware 2

Flash

NVRAM

RAM

Memory subsystem

Glue-less

interface

Complete

embedded

networking

now!

NET+ARM

Dynamic bus sizing

System b

Bus

master

capable

Ser

ial 1 dr

Ser

ial 2 dr

24 GPIO and

Interrupts

RJ45

ransf

mer

PHY

Physical layer

Ether

net LAN

Can be:

Async
HDLC

SPI

USB

Figure 1—

A typical NET+ARM-based system contains a processor, memory subsystem, and custom hardware.

Issue 134 September 2001

CIRCUIT CELLAR

www.circuitcellar.com

bus masters—usually the ARM 7 core
processor and internal 10-channel
direct memory access (DMA) con-
troller. For each cycle the ARM gets,
the DMA also gets a cycle. Each bus
master is allowed to burst up to four
long words before giving the bus to
the next bus master.

The next critical piece of informa-

tion is clock speed. The NET+ARM
typically uses a 33-MHz clock, giving
it a cycle period of roughly 30 ns. If
you add the number of instruction
cycles to the number of data cycles in
each row, multiply the sum by 30 ns,
then double the results, you will cal-
culate the cycle time.

To understand the last two columns

of Table 1, remember that each bus
master can burst up to four long
words, or 16 bytes. The pattern is
essentially ARM, DMA channel one,
ARM, DMA channel two, and so on.
Looking at DMA channel one
(Ethernet receive channel), simply
convert 16 bytes moved over the
cycle time to megabytes per second.

In order to handle the 100BaseT,

full-duplex, the Ethernet transmit and
receive columns both need to be
greater than 12.5 MBps. The configu-
rations where this is accomplished are
demonstrated in the last column.

Table 2 is a demonstration of a

memory map with a NET+ARM
development board. Without cache,
the memory map for the development
board consists of RAM mapped to
address zero, ROM mapped to two
million hex, as well as EEPROM
mapped to three million hex. When
memory accesses are made for a
device between two million hex and

Processors typically have a system
bus comprised of address and data
buses that are useful for communicat-
ing with peripherals. Memories such
as flash memory and SDRAM usually
reside on the system bus of the
processor. Other peripherals such as
FPGAs, LCDs, and encoders may be
added to this bus, too.

This type of implementation usual-

ly is used for two reasons, bandwidth
and ease of use. Bandwidth on a sys-
tem bus is great compared to many
other types of interfaces. The most
important consideration, however, is
which other peripherals are communi-
cating via that system bus? If there
are many high-bandwidth compo-
nents trying to communicate, bus
contention may occur. From the ease-
of-use standpoint, all devices on the
system bus resemble memory. With
intelligent memory controllers on the
processor, communication between
the application and hardware is as
easy as accessing a memory space.

In addition, many memory con-

trollers support dynamic bus sizing.
This is beneficial to you because the
moves between a 32- and an 8-bit
peripheral are transparent.

Many applications require both

internal and external interfaces for
communication with other peripher-
als. Internal interfaces are usually
board-level interfaces for component
communication. In many cases, the
processor’s system bus memory-maps
peripherals, such as USB controllers,
LCDs, or FPGA. General-purpose I/O
can be used to create interface devices
such as serial EEPROMs. USB, besides
being an interface for external devices
such as hard drives and cameras, also
can be used for component communi-
cation involving devices such as
modems and CODECs.

21fffff, the flash memory is accessed.
Similarly, an access greater than three
million hex causes the EEPROM to be
accessed. Other devices can be com-
municated with in the same manner.

The cache concept, in brief, con-

sists of checking each memory access
to see whether or not it is in a
“cacheable” region. If not, a normal
memory access would occur. If the
address resides in a cacheable region,
the instruction or data would be
accessed from the cache without
tying up the system bus with the
external access, thereby allowing the
DMA controller to continue pushing
the bus while the ARM fetches its
instructions in the cache controller.

ONBOARD PERIPHERALS

Many projects start out with a

finite set of requirements—those
needed to get a product to market
quickly and at a reasonable cost. After
the unit has been proven on the mar-
ket, revisions can be added. This
requires a design that ensures that
additional software features will be
supported by the existing hardware.

One of the most common schemes

to communicate with board-level
components is memory mapping.

Memory range

Device

Cache

0xff000000–0xffffffff

Internal ASIC registers

Not cached

0x0e000000–0x0e1fffff

ROM

Not cached

0x0c000000–0x0dffffff

RAM

Not cached

0x0a000000–0x0a1fffff

ROM

Instruction cache

0x08000000–0x09ffffff

RAM

Instruction cache

0x0600000–0x061fffff

ROM

Data cache

0x04000000–0x05ffffff

RAM

Data cache

0x0300000–0x03001fff

NVRAM

Not cached

0x02000000–0x021fffff

ROM

Not cached

0x00000000–0x01ffffff

RAM

Not cached

Table 2—

A typical memory mapping scheme can be implemented as shown. This approach allocates a region of

memory for flash, RAM, and EEPROM in addition to a section for the setup and control of the internal registers.
This scheme is applicable for sections you wish to have cached.

Listing 1—

In the first section, the general-purpose I/O and the NET+ARM are used to communicate with an

LED. Using the NET+ARM processor with a data acquisition board produces the second two lines. With this
board, video data is streamed through an FPGA to the NET+ARM. The data conversion board will automati-
cally increment the buffer address of the RAM every time the NET+ARM writes to address 0x0380001.

Static unsigned long *portcData = (unsigned long *) 0xffb00028

portcData &= (unsigned long) 0xfffffffb;

for(addr_count = 0); addr_count < 0x7ffff; addr_count++

Dcb_data[addr_count] = *(WORD32 *) 0x0380001c;

www.circuitcellar.com

CIRCUIT CELLAR

Issue 134 September 2001

Serial interfaces are common for

numerous types of products and com-
ponents. Serial topologies including
RS-232/422/485 are commonly used
for communication with external
peripherals. Two major markets that
use RS-485 are industrial automation
and building access and controls.

Ethernet connections are becoming

commonplace with many applica-
tions, just as parallel and serial con-
nectors once were. Wireless Ethernet
also lends itself to remote applica-
tions and facilities, where placing
cabling is cost-prohibitive or impossi-
ble because of location. And, watch
for other interfaces like 802.11 and
Bluetooth, which are being refined
right now for future applications.

SOFTWARE INTERACTION

Now, let’s briefly examine how

software can interact with the hard-
ware. Examples are shown in Figure 1.
The first uses general-purpose I/O and
the NET+ARM to communicate with
an LED. The 24 I/O pins on the
NET+ARM are broken into three 8-bit
ports named A, B, and C. Each port is
an internally memory-mapped periph-
eral within the NET+ARM.

In this case, you’re using a port C

pin to turn on or off the LED (turning
it on in this case). Many times,
instead of executing a two-line
process, application program inter-
faces (APIs) are written to handle the
low-level writing of hardware to make
the application code easier to read.

The second example in Figure 1 is

from a data acquisition board using
the NET+ARM processor. With this
board, video data is streamed through
an FPGA to the NET+ARM. The
FPGA is a memory-mapped peripheral
in the NET+ARM system bus, config-
ured with its own address base. As is
demonstrated in the code snippets in
Listing 1, the NET+ARM reads data
from hex address x0380001C. The
FPGA, in turn, will bump up the data
pointer on each read operation. This
allows the NET+ARM to simply look
at one location from the datastream
without indexing within the FPGA.
These are merely two of numerous
examples that demonstrate memory-
mapped implementations.

ductors were replaced by 0.8, 0.5,
then 0.35, 0.25, and 0.18 micro-
processors. With each decrease in
process, an associated decrease in
price and increase in performance is
realized.

For example, early NET+ARM

designs using the 12 may be replaced
with NET+ARM 15 or 40. This was
made possible by careful system
design, knowing the future road map
of the product, and NetSilicon
design reviews for customer hard-
ware. These three elements allow
you to use the same board in a vari-
ety of products. Additional memory
or parts layouts can be added, too,
making your system design more
generic and useful for future proj-
ects.

By knowing product requirements,

understanding the product environ-
ment, choosing components wisely,
taking advantage of integrated solu-
tions, and designing for today’s
requirements while planning a
development path to include future
improvements, you can maximize
product efficiency. These elements
will help ensure product success.

RESETS

Resets are critical elements in a

design. Understanding the types of
resets and their effect on the system
allows you to take advantage of cer-
tain situations. With NET+ARM,
there are five types of resets available:
powerup, hard reset through a reset
pin, watchdog, embedded network
interface (ENI), and software.

By knowing what types of resets are

available, you can reset parts without
affecting the whole system. The ENI
reset allows the NET+ARM to be
reset by an external processor. This is
used when the NET+ARM is a
coprocessor responsible for communi-
cations with the Ethernet. The
powerup, hardware, and watchdog
resets cause all internal NET+ARM
modules to be reset. But, the ENI
reset does not affect the ENI module
nor the memory controller within the
NET+ARM. The software reset does-
n’t reset the ARM processor, ENI, nor
memory module.

At startup, many processors latch

in configuration information. This is
also the case with the NET+ARM.
During powerup, the NET+ARM
latches in values of the address lines
and, by pulling these values high or
low, forces the processor into differ-
ent states at startup. One of these
configuration elements contains the
value for chip select zero. The
processor must know what type of
memory is at chip select zero to be
able to start fetching instructions
correctly. In the case of x16 flash
memory, the two corresponding
address lines need to be high, which
are A23 and A24.

As soon as this configuration infor-

mation is known, the NET+ARM
begins to fetch instructions from flash
memory and sets up the memory
map. Because address lines are read
only at startup, pull-up or pull-down
resistors are overlooked thereafter and
the address lines resume their intend-
ed responsibility.

LESSONS LEARNED

Effective designs are planned with

an eye toward the future. Recent
semiconductor history reflects this
trend. One-micron process semicon-

SOURCES

NET+ARM, NET+OS, NET+Works
NetSilicon, Inc.
781-647-1234
Fax: 781-893-1338
www.netsilicon.com

Flash memory devices
Advanced Micro Devices, Inc.
(408) 732-2400
(800) 538-8450
www.amd.com

Intel Corp.
(408) 765-8080
Fax: (408) 765-9904
www.intel.com

William Dowell holds a B.S.E.E. from
Worcester Polytechnic Institute. He
works for NetSilicon as the manager,
FAEs for the Americas division. Also,
he has designed embedded software
for Raytheon Missile Systems and
tested and integrated fiber optic com-
munications equipment for Telecast
Fiber Systems.

Issue 134 September 2001

CIRCUIT CELLAR

www.circuitcellar.com

hen it comes to

embedded net-

working, internet-

working has become a

trend and, in fact, the only topic
around these days. Although the idea
of having all of our embedded devices
accessible via the Internet is tempt-
ing, for many embedded applications,
Internet access doesn’t solve the com-
munications requirements often set
within the device.

The requirements for more internal

communications come from another
trend: adding more intelligence to
many machines and appliances. The
side effect of this trend is that more
communication between I/O points or
distributed control systems is
required. For machine internal com-
munication, TCP/IP is usually
overkill, especially if the embedded
controllers are on the low end of the
performance scale. Serial protocols are
more cost-efficient solutions.
Standard serial interfaces, such as
UARTs, I

C, and CAN are available

on-chip with many microcontrollers
in the 8- and 16-bit arena, allowing
for easy connection of several nodes.

One of the problems with imple-

menting embedded networking solu-
tions based on these serial protocols is

FEATURE
ARTICLE

Better communication
helps all relationships,
right? Well, standard-
izing the way internal
data communications
are structured and
exchanged can opti-
mize your system.
And, Olaf tells us that
internetworking is the
sign of the times and
CANopen is the route
to customization.

that by themselves they don’t have a
standardized application layer specify-
ing how the data exchanged is struc-
tured and how or when it is
exchanged. These embedded solutions
usually cover only the physical and
data link layers of the standard com-
munication reference model.

That leaves anybody implementing

an embedded network with these pro-
tocols most likely ending up with a
proprietary solution. An internal com-
munications specification has to be
generated. Most likely the network
nodes are built in-house. Outsourcing
is difficult because of the lack of
available communications standards.
Without higher layer communications
standards, it’s difficult for third par-
ties to build efficient off-the-shelf,
plug-and-play components.

However, the availability of off-the-

shelf components for embedded inter-
networking is becoming more and
more important. In all kinds of indus-
try, there is constant pressure to fur-
ther shorten the development time
and cut development costs.

Instead of developing all compo-

nents from scratch, a manufacturer of
any machine may choose off-the-shelf
sensors and actuators with a standard-
ized networking interface, allowing
the development focus to be on sys-
tem integration and development of
the components, which bring the
company’s true IP into the product.

Among the on-chip communica-

tions interfaces available with micro-
controllers these days, CAN gets you
closest to the scenario outlined here.
Existing standards based on CAN
allow for the availability of off-the-
shelf components like generic analog
and digital I/O devices. And, it still
can provide you with enough freedom
to optimize the overall system to best
meet the communications require-
ments of a specific application.

HIGHER LAYER PROTOCOLS

A variety of standardized higher

layer protocols are available based on
CAN. Today, the most significant
ones are DeviceNet and CANopen.
DeviceNet was developed for factory
automation and is strongest in the
arena of material handling. Although

Olaf Pfeiffer

acoste

Targeting Europe

Implementing CANopen

www.circuitcellar.com

CIRCUIT CELLAR

Issue 134 September 2001

it offers a high level of off-the-shelf,
plug-and-play product availability,
there is a price to pay: DeviceNet
leaves minimal room for customiza-
tion, optimization, and other tweak-
ing of the network. For all applica-
tions where customization is desired,
CANopen is the better alternative.

CANopen

The basic idea behind CANopen is

simple: CANopen standardizes the
way communicated data is structured
and exchanged. In addition, several
device profiles for CANopen are stan-
dardized and new ones are added
often. Device profiles specify the data
sets and communication models sup-
ported by modules such as generic
I/O, encoders, and drives.

CANopen standards also support

building off-the-shelf modules for
plug-and-play system configurations.
However, they leave plenty of free-
dom for customizing nodes and com-
munications paths. This allows man-
ufacturers of devices with internal
embedded networking to take advan-
tage of off-the-shelf components
where suitable and still be able to
tweak the system for optimized price
and performance of the system to
keep a competitive edge.

The core of any CANopen node is

the object dictionary, a look-up table
with a 16-bit index and an 8-bit
subindex. This allows for up to 255
subentries at each index. Each entry
can be variable in type and length.

All process- and communications-

related data is stored as entries in pre-
defined locations of the object dic-
tionary. Unused entries do not need
to be implemented. You can view all
of the entries in Figure 1.

From the network, object dictionary

data of any node can be accessed in a
point-to-point communication mode
by issuing read or write requests to
the node’s object dictionary. Messages
that contain requests or answers to or
from the object dictionary are called
service data objects (SDO). Because
both process and configuration data
are part of the object dictionary, this
communication scheme immediately
allows for configuring nodes and gain-
ing access to the process data.

COMMON QUESTIONS

Point-to-point? Variable length?

More than 8 bytes? Those of you who
are familiar with CAN probably asked
yourselves these questions. CAN does
not really support these features, so
how does CANopen do it?

Here’s how it’s done. Any message

sent on CAN is broadcast to all
nodes. Which message IDs get used by
which node is not part of the CAN
specification and is usually deter-
mined by the application.

To allow for peer-to-peer communi-

cation, CANopen introduces a node
ID that gets embedded into the SDO
requests to the object dictionary. Each
CANopen module on the network
must have a unique node ID in the
one to 127 range.

The default scenario is that any

node has two CAN identifiers reserved
for SDO requests and replies from the
object dictionary. The default CAN ID
for the receive service data object
(RSDO—used to send requests to a
node) is a base address of 600h plus the
node ID number. The ID for the trans-
mit service data object (TSDO—used
by a node to reply to requests) is a base
address of 580h plus the node ID num-
ber. In this scenario, RSDOs may be
used by only one node (usually the
master, sometimes a configuration
tool) to avoid conflicts or collisions
arising from multiple nodes potential-
ly trying to access one of the specific
object dictionaries simultaneously.

Now, the master or configuration

tool can scan for connected devices by
sending 127 RSDO requests—one to
each potential node—for the identity
object. All nodes present will respond
with their TSDO con-
taining the identifica-
tion data from their
object dictionary.

If an object dictionary

entry does not fit into
one message (Take note:
CAN has a limit of only
8 bytes per message),
the data transfer is
automatically fragment-
ed. In this case, the first
data byte is used as a
control byte for han-
dling the fragmenta-

tion. And then, the last remaining
seven bytes can be used for data trans-
mitted with each fragment.

DEVICE PROFILES

Although the object dictionary con-

cept allows for structuring the data
that needs to be communicated, there
is still something missing. Which
entry in the dictionary is used for
what? The dictionary is far too large
to allow the master to try to access
certain areas of the dictionary to see if
they are supported.

The solution is simple. There are

mandatory entries that all CANopen
nodes must support. These include
the identity object with which a node
can identify itself and an error object
to report a potential error state.
Additional entries are specified by
device profiles. Device profiles
describe all of the communication
parameters and object dictionary
entries that are supported by a certain
type of CANopen module. Such pro-
files are available for generic I/O mod-
ules, encoders, and other devices.

A master, or configuration tool, can

read-access the identity object of any
slave node using an SDO. As a reply,
the master receives an SDO with
information about which device pro-
file a module conforms to. Assuming
the master knows which object
entries are defined for a particular
device profile, it now knows which
object dictionary entries are supported
and can access them directly.

Now, CANopen is open! An appli-

cation that requires implementation
of non-standardized, manufacturer-
specific object dictionary entries is

Index

Subindex

Type

Description

1000h

32-bit Unsigned Device type information

1001h

8-bit Unsigned Error register

1018h

Subindex

Type

Identity object

8-bit Unsigned = 4 (Number of subindex entries)

32-bit Unsigned Vendor ID

32-bit Unsigned Product code

32-bit Unsigned Revision number

32-bit Unsigned Serial number

Figure 1—

These object dictionary entries are mandatory. They must be

supported by all nodes in order to be compliant with CANopen.

Issue 134 September 2001

CIRCUIT CELLAR

www.circuitcellar.com

not a problem. Adding entries
that disable and enable a certain
functionality that isn’t covered
by one of the existing device
profiles can be implemented in
any device as long as the entries
conform to the structural layout
of the object dictionary.

ELECTRONIC DATASHEETS

Electronic datasheets (EDSs)

offer a standardized method to
specify supported object dic-
tionary entries. Any manufacturer of
a CANopen module delivers a file
such as this with the module, which
in layout is similar to the

.ini files

used on Windows operating systems.

A CANopen configuration tool run-

ning on a PC with a CAN card can
directly load the EDS into its set of
recognized devices. After a device is
found on the network, the configura-
tion tool will try to find the matching
EDS. When the matching EDS is
found, all supported object dictionary
entries will be known by the master/
configuration tool.

For an understanding of the rela-

tionship between device profiles and
electronic datasheets, see Figure 2.
The device profile specifies the mini-
mum entries that need to be support-
ed by a device conforming to the pro-
file. In addition, the EDSs may specify
objects that are specific to a certain
manufacturer or subtype of module.

PROCESS DATA OBJECTS

So far, you structured the configura-

tion and process data in a way so that
a master can access it easily. From the
process point of view, polling all

inputs, working on the data,
and then writing to all out-
puts is possible.

For most applications, this

wouldn’t be an efficient com-
munications model. Because
CAN supports the multi-mas-
ter concept (any node can
send a message at any time;
collisions are resolved by ID
priority), you can expect a
more direct, higher priority

access to the process data.

PDO MAPPING

A process data object (PDO) is a

shortcut to the process data found in
the object dictionary. Via PDO map-
ping, any dictionary entry can be
mapped to data in a PDO to a maxi-
mum of 8 bytes per PDO.

Let’s take a look at the example of

PDO mapping in Figure 3. A CAN-
open input node supports two digital
inputs of 8 bits each and two analog
inputs of 12 bits each. In conformance
with the device profile for generic I/O
modules, an object dictionary entry at

EDS

Specific

digital in

module

EDS

Specific

digital out

module

Device

profile

digital

in/out

Master

Slave 3

digital in

Slave 2

digital out

Slave 1

digital out

Figure 2—

This is how a master or configuration tool gets to know all nodes.

For details, see

Free CAN and CANopen Seminars - offered by

CiA

CAN in AUTOMATION

Intl. Users and Manufacturers Group

www.can-cia.org

February 26-28, 2002

8th International CAN Conference, Las Vegas

And mark your calendar for THE event next year:

Dallas
Houston
Detroit
Los Angeles
San Diego

August 28
August 30
September 20
October 23
October 25

www.circuitcellar.com

CIRCUIT CELLAR

Issue 134 September 2001

6000h stores the two digital inputs
and an entry at 6401h stores the two
analog inputs as two words.

The object dictionary entry at

1A00h specifies the PDO mapping
(i.e., which bits of which object dic-
tionary entries are used in
the transmit PDO 1
(TPDO1)), filling the
TPDO bit by bit. Note
that this mapping can be
done on the bit level. Each
entry starts using the first
available free bit in the
PDO and occupies as
many bits as it requires.

The first subindex entry

at 1A00h maps object
6000h, subindex 1, 8 bits
to the first bits of the
TPDO1. The next
subindex entry located at
1A00h maps object 6000h,
subindex 1, 8 bits to the
next free bits of the
TPDO1. And the process
continues on in this fash-
ion. In this example, the

remaining bits of TPDO1 (sixth
through eighth data bytes) are
unmapped and unused.

Which PDOs are predefined and

which default mapping is used also is
specified in the device profile.

Mapping that doesn’t change is called
static mapping. Dynamic mapping is
the process of remapping a PDO dur-
ing run time. Obviously dynamic
mapping is more complex and
increases the PDO processing time.

PDO TRIGGERING

Now that you have a

shortcut to many diction-
ary entries in one mes-
sage, what are your
options to trigger a PDO?
CANopen supports the
following four trigger
modes: Event Driven,
Time Driven, Polling, and
Synchronized.

If the input device rec-

ognizes a change of state
(COS) on any of its
inputs, Event Driven
mode updates the data in
the object dictionary and
PDO and transmits the
PDO. Event Driven mode
allows for some of the
fastest response times.

Index

Subindex

Type

Description

1A00h

Subindex

Type

First transmit PDO mapping

8-bit Unsigned = 4 (Number of supported map entries)

32-bit Unsigned = 6000 01 08h (Index 6000, subindex 1, 8 bits)

32-bit Unsigned = 6000 02 08h (Index 6000, subindex 2, 8 bits)

32-bit Unsigned = 6401 01 0Ch (Index 6401, subindex 1, 12 bits)

32-bit Unsigned = 6401 02 0Ch (Index 6401, subindex 2, 12 bits)

6000h

Subindex

Type

Process data and digital inputs

8-bit Unsigned = 2 (Number of subindex entries)

8-bit Unsigned 8-bit Digital input

6401h

Subindex

Type

Process data and analog inputs

8-bit Unsigned = 2 (Number of subindex entries)

16-bit Unsigned 12-bit Analog input

TPDO1

D In 1

Byte 1

D In 2

Byte 2

A in 1

Byte 3

Byte 4

A in 2

Byte 5

Unused

Byte 6

Byte 7

Byte 8

Figure 3—

Process data object (PDO) mapping is done through object dictionary entries.

Issue 134 September 2001

CIRCUIT CELLAR

www.circuitcellar.com

A PDO can be configured to trans-

mit itself on a fixed time basis, for
instance every 50 ms. The Time
Driven mode helps make the total
busload more predictable.

Using the regular CAN remote

request frame, a PDO is transmitted
only if the data is specially requested
by another node when triggered by
the Polling mode.

The Synchronized mode allows syn-

chronized polling, which is required
by many motion control applications.

PDO LINKING

The communication partners

involved have a similar arrangement
as with the SDOs. The default is that
the master is the only node that
receives transmit process data objects
(TPDO). And only the master may
send receive process data objects
(RPDO) to the slaves (see Figure 4).

During the initialization and config-

uration cycle, the PDO linking can be
changed. A master can inform one or
more output modules that they
should directly listen to a specific

NETWORK MANAGEMENT

CANopen allows for a network

management master to watch over all
of the nodes to see if they are operat-
ing within their set parameters. Upon
failure of a node or receiving certain
kinds of alarm/emergency messages,
CANopen is capable of initiating the
appropriate recovery or shutdown pro-
cedures necessary.

Note that there is a variety of

options available to implement this
supervising of nodes. The most recent
version of CANopen recommends
using heartbeat messages, thereby
allowing nodes to supervise each
other, if necessary, even without a
network management master.

The idea is that each node emits a

regular heartbeat message as long as it
is alive and operating within its
parameters. If all nodes produce such
a heartbeat, every single node could
monitor the heartbeats of its commu-
nication partners. This is especially
helpful in COS systems, where data
messages can occur sporadically and
may not get transmitted for long peri-

TPDO of an input module. Again, a
TPDO correlates to a unique CAN
message identifier. So, basically you
just inform a node which message
frames it should listen to and which
ones it may ignore.

After these new linking settings are

made and the network is operational,
the master doesn’t need to get
involved in the data communication
process and can focus on other things,
like network management. Check out
the process in Figure 5.

RPDO_1_M
RPDO_2_M

TPDO_1_M
TPDO_2_M

RPDO_3_M
RPDO_4_M

TPDO_3_M
TPDO_4_M

Master

TPDO_1_X
TPDO_2_X

RPDO_1_X
RPDO_2_X

TPDO_1_Y
TPDO_2_Y

RPDO_1_Y
RPDO_2_Y

Slave x

Slave y

Figure 4—

You ensure that a predefined PDO connec-

tion set is usable by default as you assign unique CAN
message identifiers to each supported PDO (one
unique ID for each TPDO and one for each RPDO).

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CIRCUIT CELLAR

Issue 134 September 2001

come with source code for a one-
time fee, neither royalty nor
license fees are required.

And, the first CANopen chips

are available. These chips imple-
ment the entire CANopen proto-
col stack in a single chip that can
directly integrate digital and ana-
log I/O into a CANopen network.

When it comes to debugging a

CANopen system, there are a
variety of tools available to ease
debugging. Just to name a few,
there are protocol analyzers that can
receive, log, and transmit CANopen
messages. In addition, you can pick
up configuration tools that scan a net-
work for all connected nodes and try
to match them with EDS files, which
allows displaying and modifying all
the supported object dictionary
entries of the connected nodes.

RESOURCE

CANopen information and list of
vendors

CAN in Automation (CiA)
49-9131-69086-0
Fax: 49-9131-69081-79
www.can-cia.org

Olaf Pfeiffer holds a degree in
Technical Computer Science from Co-
Op University Karlsruhe, Germany.
He frequently conducts seminars
about embedded networking and

RPDO_1_Z
RPDO_2_Z
RPDO_3_Z
TPDO_1_Z
TPDO_2_Z

TPDO_1_Y
TPDO_2_Y
RPDO_1_Y
RPDO_2_Y
RPDO_3_Y

RPDO_1_X

RPDO_2_X

TPDO_1_X

TPDO_2_X

Device x

Device z

Device y

internetworking. He is one of the
founders of the Embedded Systems
Academy (www.esacademy.com) and
represents the CiA non-profit organi-
zation in America. You may reach
him at us-office@can-cia.org.

Figure 5—

Configuration tools support dynamic PDO linking.

ods of time. Using the heartbeat pro-
tocol, all nodes at least know that
their communication partners are
operational, even if they don’t receive
PDOs with new data from them.

IMPLEMENTING CANopen

You can implement CANopen on

almost any microcontroller version
with an on-chip or external CAN
interface. If the 1-Mbps maximum
bus speed needs to be supported, the
minimum requirement would be an
8-bit controller leaning toward the
higher end on the performance scale.
Concerning CAN interfaces, it helps
to have one of the more intelligent
ones that either has a large amount of
receive buffers or a true FIFO buffer.
The latter greatly improves the tim-
ing requirements by giving a micro-
controller up to 10 times more time
to react to a CAN interrupt.

CANopen protocol stacks written

in C are commercially available from
various vendors and are already adapt-
ed to a wide variety of microcon-
trollers and CAN controllers. Most

Issue 134 September 2001

CIRCUIT CELLAR

www.circuitcellar.com

egardless of the

success of various

music file sharing

services, it’s a safe bet

that many computer users are con-
verting their record and CD collec-
tions to MP3 files and storing them
on the ridiculously large hard drives
available in modern computers. Tiny
MP3 players compete with CD and
tape walkmans for portable use. With
many computers powered up continu-
ously for Internet access, it occurred
to me that it would be nice if my
computer could act as the “server” for
a wireless MP3 jukebox.

Let me explain the concept in more

detail. The idea is to allow you to lis-
ten to MP3 music files at any location
within the home where there is an
FM receiver (which could be a walk-
man, for example). This is made pos-
sible by feeding the server computer’s
audio output to a low-power FM
broadcaster. A portable unit displays
the contents of the server’s MP3 file
folders to allow you to browse
through your music collection.

For convenience, you can scroll

through up to four different folders
containing lists of songs. The func-
tions of picking a particular song,
starting, stopping, and skipping a song

are accomplished using a universal IR
remote control. These commands are
then forwarded to the MP3 server
computer via a 433-MHz wireless
link. Photo 1 shows all the compo-
nents of the system.

For the server end, I designed two

modules, a 433-MHz receiver and FM
broadcaster. The receiver picks up
commands sent by the remote control
unit and feeds them to the server
computer via a serial port. A dedicat-
ed PC application running in the
background receives these commands
and dispatches them to the Windows
Media Player, which then plays the
requested selection. The second mod-
ule, the FM broadcaster, gets audio
from the sound card output of the
computer and broadcasts it.

To reduce cost and simplify the

design, the 433-MHz wireless link
operates in one direction only. That
is, after you have selected a function,
that command is sent to the MP3
server computer via the wireless link.
If that transmission never makes it to
the server, you will hear that nothing
has happened and can issue the com-
mand again. However, to ensure that
spurious commands don’t disrupt
operation, a dedicated decoder/
encoder chipset is used. This per-
forms all necessary functions to
ensure that only legitimate packets
are passed to the MP3 server.

For the remote unit to be able to

display the contents of the MP3 fold-
ers on the server, it must have the
contents of those folders downloaded
to it prior to use. This is done via the

FEATURE
ARTICLE

Brian Millier

Listen Anywhere

We’ve gone from
records and 8-tracks
to CDs and MP3s.
Converting to MP3s
has become popular,
and how to store the
files is an interesting
topic these days.
Tune in, because this
project covers a stor-
age scheme and
extends your current
MP3 listening area.

A Wireless MP3 Remote Jukebox

Photo 1—

This photo shows the various parts of the

system. The mini-box to the left houses the 433-MHz
receiver. The case with the large LCD is the MP3
remote control unit. Sitting above it are the RCA
remote control and the FM broadcaster module. In
normal use, only the FM broadcaster and receiver are
located with the host computer, the remote controller is
placed wherever you want to listen to the MP3 music.

www.circuitcellar.com

CIRCUIT CELLAR

Issue 134 September 2001

power to operate, I chose to power it
with four AA cells followed by an
LM2936CZ5 low-dropout regulator.

It became obvious early on that the

song display would not be useful
unless it was able to display the com-
plete song title and/or artist’s name.
Because there can be a lot of songs to
scroll through, I also decided that four
songs should be displayed simultane-
ously. Therefore, I chose a 4 × 40 LCD
panel. This unit has a different wiring
scheme than most common LCDs. It
contains two HD44780 controller
LSIs, one for the top two lines and
another for the bottom two. The LCD
connection to the micro is made
through seven lines of port B using
the common 4-bit data interface. The
control lines consist of an RS line and
two ENABLE lines, one for each con-
troller LSI. The LCD is sent com-
mands only, no status is read back, so
the R/*W line is tied low.

Rather than putting a keypad or a

lot of switches on the front panel, I
chose instead to install an IR detector
module and use a universal IR remote
control for the user interface. The IR
remote is a commonly available RCA

model CRCU410 set to emulate a
Quasar TV (code 054). I chose this
because it’s a simple IR code that is
easy to decode in software. The keys
that are decoded and their functions
are shown in Table 1.

Nonvolatile memory storage of the

song lists is provided by a serial flash
memory EEPROM. I used Microchip’s
24LC256I/P8EA because it’s common-
ly available. This chip is an I

device, therefore it needs only a two-
wire interface to the ’2313 micro.
Unfortunately, the ’2313 doesn’t con-
tain a hardware I

C port, so a bit-

banged software routine must be used
instead. However, fortunately Atmel
provides an app note describing I

read/write routines for the ’2313
when used as the master device. [2]

Note that 2.2-k

Ω

pull-up resistors

are required on both the SDA and
SCL lines per the I

C specifications.

The 24LC256I can assume up to eight
different I

C addresses allowing for

flash memory expansion to 256 KB,
depending on the state of the A0
through A2 pins. Because you’re using
only one device, all three address
lines are tied low.

serial port on the MP3 server comput-
er using the same application soft-
ware that passes the incoming wire-
less commands to the Microsoft
Media Player. The firmware in the
remote unit can handle up to four dif-
ferent music folders.

To avoid the need to constantly

update the remote unit’s flash memo-
ry, it’s recommended that four stable
folders are chosen for remote playing,
with other folders used for newly
downloaded music or selections that
are always changing. The remote unit
contains a 32K × 8 flash memory,
which can hold up to 200 song titles
per folder (800 total). Because flash
memory is nonvolatile, it will hold
this song database even when the unit
is off, which is important because the
remote unit is battery-operated.

REMOTE CONTROL UNIT

The heart of the system is the

remote control unit shown in Figure
1. It is built around an Atmel
AT90S2313-4PC which has 15 I/O
lines (12 of which are used) as well as
an internal hardware UART. [1]
Because the unit requires so little

Figure 1—

The MP3 remote controller is run by a ’2313 AVR device.

Issue 134 September 2001

CIRCUIT CELLAR

www.circuitcellar.com

The datasheet for this memory

device states a 5-ms flash memory
write cycle time. [3] The flash memo-
ry is written to only during a data
download, at which time the data
comes in via the receive section of
the UART of the ’2313. My download
protocol is strictly one-way from the
server PC to the remote unit, using
no handshaking. Therefore, a data rate
of 1200 bps was chosen, which places
the incoming data characters 8.3-ms
apart. This period allows sufficient
time to send the data to the I

C flash

memory, even using software I

C rou-

tines, and have 5 ms to spare for the
actual EEPROM write.

I didn’t use a full-blown RS-232

interface like a MAX232. Instead, I
converted RS-232 levels of the host
computer to TTL with a single
2N3904 NPN transistor and a few
passive components.

I chose an Abacom AM-RT5-433 for

the wireless transmitter module.
Conveniently, the AM-RT5-433 is
contained in a small SIP package
that’s easy to mount. Abacom was
kind enough to send me a sample of
both the transmitter and receiver
modules. These inexpensive modules
are meant to cover a distance of 100

′

or so, using simple carrier on/off mod-
ulation for data transmission.

My other experience with small

wireless modules was with the more
costly Linx HP-II series (900 MHz).
These are FSK units, the transmitter

can be fed directly from a UART, and
the receiver is a squelched unit that
feeds a UART directly.

Luckily Abacom’s technical staff

pointed out that the low-cost units I
had chosen can’t be directly inter-
faced to a UART port. However,
Abacom has designed a combo chip
called the NKM2401-N, which can
function as either a data encoder or
decoder depending on the wiring of
the mode pin. For this project, I use
one of these devices at each end of the
wireless data link.

In the remote unit, the NKM2401

accepts an 8-byte packet from the
UART of the ’2313 (at 2400 bps), adds
sync, pre-/post-amble bytes and CRC,
and performs Manchester encoding on
the resulting data. Because the
NKM2401 requires an 8-byte packet
and my commands are only 2-bytes
long, I add my own sync and filler
bytes to make up an 8-byte packet.
The MK2401’s data output is connect-
ed directly to the data input of the
AM-RT5-433 transmitter. For an
antenna, I use a 1/4 wave whip.

I was hoping to be able to do with-

out the encoded NKM2401 in the
remote unit, instead depending on
some ’2313 firmware routines to per-
form the same functions. The remote
unit’s firmware is written in assembly
language and uses only about one-
third of the AT90S2313’s 2-KB flash
memory. There would have been
plenty of room for the necessary rou-

tines there. However, at the receive
end, I didn’t plan to use a microcon-
troller, so I had to use an NKM2401
for decoding there.

I was unable to convince Abacom

to give me the exact protocol it uses
for communication, which is under-
standable. Therefore, I wasn’t able to
write routines to do the encoding of
the packets. Given more time, I could
have captured the datastream using a
digital scope or a program running on
a micro and reverse-engineered it, but
it wasn’t in the cards.

Before moving on, let me mention a

few miscellaneous details about the
remote unit. The AT90S2313 operates
at 4 MHz using a ceramic resonator.
This is accurate enough for the slow
serial data communications rate used.
I had to set the UART to receive at
1200 bps (during data download) but
transmit at 2400 bps (sending com-
mands via NKM2401 and transmit-
ter). The two rates are necessary
because the NKM2401 works only at
2400 bps, and 1200 bps is the highest
speed that can be used for downloads
(considering the write cycle time of
the serial flash EEPROM).

Lastly, there is a jumper labeled J1

Link Test on the remote control unit.
When in place, the NMK2401-N
sends out a constant “ABACOM”
message, which can be used to check
the wireless link.

WIRELESS RECEIVER MODULE

The job of the wireless receiver is

to pick up the 433-MHz signal trans-
mitted by the MP3 remote control
unit and convert that signal to RS-232
level data for the server PC.

The Abacom AM-HRR3-433 receiv-

er is shown to the left in Figure 2.
The receiver module is connected to
the same type of 1/4 wave whip
antenna as the remote transmitter.

The output of the receiver module

is full of spikes and noise in the
absence of an actual signal coming in
from the transmitter. I monitored it
using an oscilloscope, and I live in a
“quiet” RF rural area! For that reason,
using Abacom’s NKM2401-N decoder
chip was a necessity. In the receiver,
the NKM2401-N has its mode pin
(pin 4) tied to ground to place it in

Figure 2—

The 433-MHz receiver receives the wireless commands sent by the remote controller and passes them

to the server computer for execution.

www.circuitcellar.com

CIRCUIT CELLAR

Issue 134 September 2001

Decode mode. A simple PNP transis-
tor inverter is used to provide pseudo-
RS-232 level signals to the server PC.
An LM2936CZ5 low-dropout regula-
tor is used to provide the 5 VDC
needed for the receiver.

Most of the time this receiver mod-

ule is left connected to a serial port
on the MP3 server computer.
However, from time to time, the
remote control unit must be connect-
ed to the PC in its place (i.e., when
the song lists are being downloaded to
it). For that reason, I made up a short
cable to connect the DB9 male socket
on the PC to a five-pin DIN plug.
Both the receiver and remote control
unit use matching five-pin DIN sock-
ets, and you simply hook up the prop-
er unit as needed.

The Abacom receiver/transmitter

modules, when used with NKM2401-
N devices, are reliable. The wireless
link for the command transmission
was one of the smoother aspects of
the project. The only complication I
ran into was that I wasn’t able to
place the 433-MHz receiver and FM
broadcaster modules in the same case.

When the FM broadcast transmitter

was placed next to the receiver, its RF
output slightly desensitized the
receiver. The result was that the wire-
less link would work for a distance of
only about 20

′

, which was too short

for my purpose. However, when I
placed the FM broadcaster in its own
case and moved it several feet away
from the 433-MHz receiver, the prob-
lem disappeared and the range
increased to about 50

′

(keep in mind,

that’s still within the house).

FM BROADCASTER

When I originally conceived this

project, I anticipated some challeng-
ing design or programming problems.
I assumed getting a small FM broad-
caster module would be easy, so I
tackled that job last. However, of
course, Murphy’s Law dictated that
this would turn out to be the most
frustrating and time-consuming part
of the project!

I had heard rumors that stereo FM

transmitter kits based on the Rohm
BA1404 IC were too unstable to be
useful. Not easily deterred, I bought

such a kit anyway. Alas, the rumors
were true—its frequency stability is
too poor to work with modern, digi-
tally-tuned FM receivers. Even when I
replaced the cheap RF tuning compo-
nents with high-quality parts, the
problem remained. In fairness to
Rohm, I expect that this IC was
designed before the advent of digital
FM receivers. Older analog FM
receivers had an automatic frequency
control circuit that likely would have
tracked the frequency changes that
occur with this transmitter kit.

I found a PLL-stabilized FM broad-

caster kit, but it cost about $200,
which was too steep for this project.
A number of years ago, I built several
PLL-based frequency generators in the
10- to 400-MHz range, so I thought I’d
try to roll my own FM broadcaster.

That’s when the trouble began. The

PLL chips that I had used in the past
were no longer available. Most of the
currently available PLLs are meant for
cell phones and the like and won’t
work reliably below 100 MHz. I found
some that were targeted for the FM
broadcast band, but they were in such
tiny packages that I couldn’t solder
anything to them.

At this point, I decided to try some-

thing different. Because I needed a
microcontroller to load the PLL chip
anyway, why not try to let the micro-
controller measure and control the
oscillator frequency and dispense with
the PLL chip entirely? What I had in
mind could be considered an automat-
ic frequency stabilizer.

The basic concept is demonstrated

in Figure 3. The oscillator frequency
is determined primarily by the values
of the inductor and variable capacitor.
For this design, I chose an overall tun-
ing range of roughly 88 to 92 MHz for
two reasons. First, there are fewer
commercial FM stations at the bot-
tom of the band. More importantly,
96 MHz is the highest frequency that
can be measured using this circuit.

Fine-tuning of the oscillator, both

for stabilization and FM modulation
purposes, is handled by a varactor
diode. The bias on the varactor sets
its capacitance. This bias has two
components. A DC voltage level is
applied by a 12-bit DAC, and an AC
signal is superimposed on it to per-
form the frequency modulation. The
DAC output voltage is initially set to
a middle range (2 V) and you manual-
ly tune the oscillator to the desired
frequency by adjusting the variable
(trimmer) capacitor. Thereafter, the
microcontroller will adjust the DAC
voltage up and down slightly to main-
tain the proper frequency.

For the microcontroller to measure

the oscillator frequency, it must first
be prescaled by a factor of 16. This is
done using a common 74F161 4-bit
divider chip. The prescaler output is
in the 5- to 6-MHz range, which can
be directly counted by the microcon-
troller using its 16-bit counter/timer.
To determine the oscillator frequency,
clear the 16-bit timer and then read it
after a fixed interval. This fixed inter-
val is provided for by another count-

2N5485

DAC7611

74F161

12-bit

Serial DAC

Prescaler

Divide by 16

SPI

16-bit Counter

8-bit Timer

CPU

Man

ual tuning

AFT Control v

ltage

AT90S2313–10PC

FET

Oscillator

88–92 MHz

Figure 3—

The block diagram shown here outlines the FM broadcaster.

Issue 134 September 2001

CIRCUIT CELLAR

www.circuitcellar.com

er/timer in the microcontroller,
which is programmed to provide a
periodic interrupt every 5.461 ms.
Using this arrangement, the expected
value in the 16-bit counter equals:

In operation, the microcontroller

reads the count in the 16-bit timer
and compares it to a fixed constant
derived from this equation using the
FM broadcast frequency chosen by
you. If the oscillator frequency is too
low, it bumps up the DAC value by
one and tries again. Conversely, if the
oscillator frequency is too high, it
decreases the DAC value by one. This
process is repeated until the oscillator
frequency falls within a narrow band
around your set point frequency.

The circuit described here normally

would be hunting constantly for two
reasons. First, there always would be
a one-count bobble in the counter/
timer value because of variations in
the position of the sampling interval
with respect to the oscillator signal.
Secondly, because the oscillator is
being frequency-modulated by an
audio signal, its frequency will vary
from this modulation voltage.

This hunting is undesirable because

it produces artifacts in the music
heard through the FM receiver. To
prevent this, as soon as the microcon-
troller has tuned the oscillator so that
the 16-bit counter/timer is within
two counts of ideal (an accuracy of
about 6 kHz), it will “go to sleep” for
10 min., after which time it will
check the frequency again. Unless the
room temperature changes signifi-
cantly, the frequency of the oscillator
will require little correction, and this
circuit will apply it as necessary.

AVR AFC

While I describe how I implement-

ed the automatic frequency-controlled
FM broadcaster in detail, refer to
Figure 4 for a visual representation.

To begin, I needed a microcontroller

that could count pulses at a 6-MHz
rate, also containing another timer to
generate the periodic interrupt needed
to read and clear this counter. I chose

the Atmel AT90S2313-10PC because
it has the required functionality.
However, I have to run the device at
12 MHz instead of its rated 10 MHz
to achieve the 6-MHz counting rate.
By the way, I have not experienced
any problems “over-clocking” the
’2313 by this modest amount.

The setting of the FM oscillator fre-

quency will be performed only once,
when the unit is first set up and a
clear channel is found on the FM dial.
Therefore, to make things simple, the
desired broadcast frequency is entered
into the program code as a constant at
the beginning of the program. The
program is then compiled and down-
loaded into the ’2313, resulting in a
fixed-frequency FM transmitter.

Ten years ago, you could find

prescaler chips readily available that
would divide by 256 at frequencies up
to 1 GHz, but these are no longer
manufactured. So, I used a 74F161
four-stage counter to implement a
divide by 16 prescaler. It handles fre-
quencies greater than 100 MHz, costs
less than $1, and is readily available.

I built my own VCO around a

2N5485 FET device. The resonant fre-
quency of the VCO is largely deter-
mined by the values of L1 and C12.
The latter is a trimmer capacitor that
is adjusted manually when the unit is
first powered up to achieve roughly
the desired frequency. This tuning is
performed with jumper J1 in place,
which causes the microcontroller to
set the DAC to mid-scale.

Thereafter, the jumper is removed.

And when the unit is powered up
again, the automatic frequency stabi-
lization circuit starts to operate and
the oscillator is fine-tuned to the
desired frequency by D1, the varactor
diode. The 74F161 prescaler requires
several volts of signal for proper
clocking. The FET oscillator can pro-
vide this (most other oscillator config-
urations are not capable).

The RF output from the oscillator is

taken from a tap on L1 to reduce load-
ing effects. This is capacitor-coupled
to the clock input of the first stage of
the 74F161 prescaler. Potentiometer
R7 is adjusted to provide the proper
bias on the clock input pin, allowing
the oscillator signal to properly trigger

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www.circuitcellar.com

CIRCUIT CELLAR

Issue 134 September 2001

the input divider stage. It should be
set for around 2 to 2.5 V, but is best
set up by using an oscilloscope and
looking for a clean 5- to 6-MHz wave-
form on pin 11 of the 74F161.

The 12-bit DAC (U4) that controls

the VCO’s fine-tuning is a TI
DAC7611, with an SPI interface.
Although the ’2313 doesn’t have a
user SPI port (its SPI port works
strictly for flash memory program-
ming), it’s simple to bit bang the SPI
data out to the DAC using I/O lines
PB1 through PB4.

Shown just below the ’2313 in

Figure 4 is jumper J1, which is con-
nected to port line PD6. At reset, the
microcontroller checks the state of
this line; if the jumper is in place, it
merely sets the DAC to mid-scale
(2.048 V) and waits. This allows you
to set the mechanical trimmer capaci-
tor (C12) for an oscillator frequency as
close as possible to the desired FM
broadcast frequency. In North
America, all FM broadcasting is done
at odd multiples of 100 kHz, so pick a
frequency accordingly.

Having accomplished this, next you

remove the jumper and powerup the
unit again. The device should home
in on the desired frequency within a
few seconds by repeatedly adjusting
the DAC voltage and measuring the
resulting frequency via the prescaler.
This is the normal operating mode
when subsequently being used as an
FM broadcaster module.

Line-level stereo audio from the

host computer’s sound card line out is
first run through a pre-emphasis net-

Photo 2—

This is the PC application program that con-

trols the playing of MP3 files through the Media Player,
from wireless commands received from the MP3
remote controller. The code’s other main function is to
allow you to choose up to four music folders and then
download the song titles (file names) to the flash mem-
ory in the remote controller.

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CIRCUIT CELLAR

Issue 134 September 2001

work (for each channel), and then
mixed down to a monaural signal.
This low-level AC signal is superim-
posed on the DC control voltage of
the DAC and used to frequency-mod-
ulate the oscillator.

The RC values in the pre-emphasis

network were picked by monitoring
the output of a stereo receiver and
aiming at a flat-frequency response.
The values shown in Figure 4 come
pretty close. Don’t expect the chosen
component values to provide a time
constant of 75 µs, which is the stan-
dard pre-emphasis used by broadcast-
ers. Consider that there are many
other factors in the VCO that affect
the modulation characteristics. My
values provide an overall flat-frequen-
cy response as measured with a high-
quality FM receiver.

Note that no antenna is illustrated

in Figure 4. If the project is placed in
a plastic enclosure, it will radiate
enough signal to cover a 50

′

radius.

This works out well, because govern-
ment regulations prevent using a
transmitter capable of covering a
much greater range than this.

I built the VCO section of the cir-

cuit (shown within the dashed lines
in Figure 4) on a small, single-sided
PC board with dimensions of about
1.5

″

× 1

″

. The remaining part of the

circuit was hand-wired on a Simm-
Stick protocard. The VCO PCB is
designed like a SIP package and
mounts vertically on the SimmStick.

SOFTWARE AND FIRMWARE

The application software consists of

a server application running on a
computer and client firmware run-
ning on the remote controller. At the
PC end, the server software is written
in Visual Basic 6.

The remote controller firmware is

written in AVR assembly language.
The FM broadcaster is frequency sta-
bilized by another AT90S2313. The

program required for this is trivial, so
I used the BASCOM-AVR compiler
for that application.

CLIENT APPLICATION
SOFTWARE

The client application running on

the PC has two main functions. Most
of the time it is polling the COM1
serial port looking for commands that
have been sent to it by the remote
controller. Its other main function is
to allow you to browse through your
directory structure and designate up
to four folders as jukebox folders.

The file names in these folders are

then converted into a database record
and sent to the remote controller
using the transmit section of the
COM1 serial port. This download is
performed only once unless the con-
tents of the folders change, because
this data is stored in the song list
flash memory within the remote con-
troller (see Photo 2).

Figure 4—

The FM broadcaster unit is automatically fine-tuned.

Issue 134 September 2001

CIRCUIT CELLAR

www.circuitcellar.com

The second function, used occasion-

ally, chooses the desired music folders
(up to four) and downloads the con-
tents into the remote controller’s
flash memory. You do this by picking
out a specific folder and then clicking
on one of the four numbered buttons
located to the left of the form. A win-
dow keeps track of the space remain-
ing in the song list flash memory.
Each folder can contain almost 200
songs before its flash memory alloca-
tion is exceeded.

To simplify the firmware in the

remote controller, I make the assump-
tion that all four folders will be used,
and therefore downloaded. If you have
fewer folders, the remaining folders
should be designated as duplicates of
the desired folder(s).

Before pushing the Download but-

ton, the remote controller must be
plugged into the COM1 port of the
PC, temporarily displacing the 433-
MHz receiver. I use the custom cable
described earlier, which stays plugged
into the PC. The other end of the
cable is a five-pin DIN plug, which
fits sockets on either the receiver or
the remote controller.

The download time is dictated by

the write timing of the flash memory
in the remote controller. Download
time is about 4 min. if all four direc-
tories contain the maximum of about
200 songs. The download progress is
indicated by check boxes appearing
next to the client program’s folder list
as well as messages on the remote
controller’s LCD screen.

AVR FIRMWARE

I already outlined the automatic fre-

quency control of the FM broadcaster.
The program that accomplishes this is
simple, and therefore was written in
Basic and compiled using the BAS-
COM-AVR compiler. For more details,
download the program listing con-
tained in the file

MP3FM.bas, which is

available on Circuit Cellar’s web site
as well as my personal web site.

The remote controller firmware

was much more involved. I first tried
to write it in Basic using the BAS-
COM-AVR compiler, but the program
code generated would not fit into the
flash memory of the ’2313. Using

Let’s look at the first function in

more detail. As mentioned earlier, the
connection between the computer and
remote controller is a 433-MHz wire-
less link. At the PC end, the 433-MHz
receiver takes the RF signal and con-
verts it into serial data at 2400 bps,
which is fed into the COM1 port. All
data formatting and error checking
are performed in the hardware using
the NKM2401 encoder/decoder chips.
This method ensures that any com-
mand received by the client applica-
tion will be legitimate.

The NKM2401 uses 8-byte packets.

All commands sent by the remote
controller consist of a 2-byte sync pat-
tern (0xAA, 0x55) followed by a 16-bit
command word and four dummy
bytes. Two bits of the command word
are used to designate the four com-
mands: Play (Stop), Play Next, Play
Last, and Pause. The other 14 bits are
used to select both the active folder
and offset of the song’s file name
within that folder.

Earlier, when you picked out the

folder for use by this application, that
folder was parsed and a fixed record
length database was generated, a copy
of which is maintained both by this
application (in a file) and in the
remote controller (in the song list
flash memory). Doing it this way
allows you to see all of the song
names on the remote LCD readout. In
addition, it means you can select
songs to play by merely sending a
number corresponding to the song’s
position in the database file.

After the client program knows

what song to play, how does it actual-
ly get the computer to play that par-
ticular song? If the songs were in

WAV

format, it would be easy, as Visual
Basic has built-in support for multi-
media functions including the play-
back of

WAV files. However, it does not

support the playing of MP3 files, at
least not the version that I have. I
looked around for a shareware/free-
ware ActiveX control that plays MP3
files but wasn’t able to find one that
was free or reasonably priced.

I took a different tack at this point.

I had just downloaded the Windows
Media Player V.7 that Microsoft dis-
tributes for free. This multi-purpose
program handles MP3 files nicely and
has all the bells and whistles people
want. Like many Windows programs,
it allows for keyboard shortcuts, an
advantageous capability. My idea then
was to run my MP3 Jukebox client
application and the Windows Media
Player concurrently and let my client
application send keyboard strokes to
the Media Player to control it.

This is done using a couple of

Visual Basic commands. The Shell
command transfers program flow over
to the Media Player, and the Sendkeys
command sends the proper codes to
the Media Player, causing it to select
the desired song and play it or do
some other functions.

To check that the client program is

actually communicating with the
Windows Media Player, I added the
capability of picking a specific song
from a folder and playing it (without a
command coming in from the remote
control). As Photo 2 demonstrates,
you may choose the song to be played
using the drive, folder, and file win-
dows on the right, and the transport
controls located along the bottom will
play or stop it.

Table 1—

I defined the buttons of the RCA universal IR remote control to function properly with the MP3 remote

controller. The remote control must be set up to emulate a Quasar TV remote for this application (code 54).

Key

Function

One through four

Play one of the four songs currently shown on display

Five

Skip to next song

Six

Jump back to previous song

Seven

Stop/start again

Enter

Prepare for song download from host PC

CH+

Scroll to next screen of four songs

CH–

Scroll to previous screen

Left VOL

Select previous folder (four total)

Right VOL

Select next folder (four total)

www.circuitcellar.com

CIRCUIT CELLAR

Issue 134 September 2001

assembly language, I accomplished
the same thing in less than half of the
flash memory space.

As with the PC client software, the

remote controller performs two func-
tions, one of which happens infre-
quently. When turned on, it displays
the first four songs in folder one. It
then goes into a polling loop to detect
IR commands sent by the RCA uni-
versal remote and received by the IR
receiver module. This IR signal comes
into port D6 of the ’2313, which is
the INPUT CAPTURE pin.

The IR codes are deciphered by

using the input capture feature of
timer1, a 16-bit timer/counter. I chose
a simple IR command structure (RCA
code 54, Quasar TV) to make my job
easier. This command structure has a
fixed-length start pulse at the begin-
ning of each command sent, followed
by 8 bits of data. The data bits are
represented by two different intervals
between pulses. After recognizing the
fixed length start pulse, you have to
do only two things. You must capture
the timing of the eight subsequent
pulses and, from the interval separat-
ing them, assign the proper bit values.

As mentioned earlier, the remote

control constantly polls the IR receiv-
er for commands and then performs
the proper function. Many keys allow
for navigation only through the song
lists and moving from one folder to
another. Do this by adjusting pointers
into the storage flash chip, reading the
song names, and transferring these
ASCII characters to the LCD screen.

The keys used for Play, Play Next,

Play Last, and Pause actually send out
the proper command via the UART
transmit port of the ’2313. Again, the
NKM2401 uses 8-byte packets, so
sync and filler bytes are added to the
16-bit command word as needed.

There is a key dedicated to the

download function. When pressed, it
shifts program execution to a routine
that accepts characters coming into
the UART receive port of the ’2313.
The database generated by the PC is
transferred into the song flash memo-
ry using this function.

The Microchip 24LC256I flash

memory chip is an I

C device with a

32K × 8 storage capacity. Its 5-ms

write timing isn’t a problem, because
the data coming in from the server
computer is sent at 1200 bps, which
is an 8.3-ms per character rate. The
’2313 doesn’t have a dedicated I

port so this function must be done in
firmware. The master I

C routines

were taken directly from Atmel’s
application note and work fine. [2]

The LCD is a 4 × 40 unit that uses

the ubiquitous Hitachi HD44780 con-
troller. Actually it contains two con-
troller LSIs, with a common data/con-
trol interface in addition to two
enable lines. I had to rewrite my
trusty 4-bit LCD driver routines to
handle the fact that lines one and two
use controller one and lines three and
four use controller two.

ALL PLAYED OUT

I found this project to be very inter-

esting, partly because of the wireless
aspect. The Abacom receiver/trans-
mitter modules coupled with the
company’s encoder and decoder
devices work well. Moreover, the
user-friendly flash programming capa-
bility of the AVR device made writing
the assembly language firmware near-
ly painless for me.

However, there was one disap-

pointment. I didn’t anticipate spend-
ing so much time coming up with a
satisfactory FM broadcaster module.
Although too late for this project, I
recently came across the Rohm
BH1416F Wireless Audio Link IC,
which contains a complete PLL-stabi-
lized FM transmitter and FM stereo
modulator in a SOP22 package. I
bought a few of these to try out later.

If you’re not a big music fan, maybe

you’ll be able to apply some of the
ideas mentioned here for other useful
remote control concepts.

Brian Millier is an instrumentation
engineer in Dalhousie University’s
Chemistry Department, Halifax, NS,
Canada. He also runs Computer
Interface Consultants. You may reach
him at brian.millier@dal.ca.

SOFTWARE

The code is available on Circuit
Cellar

’s web site.

REFERENCES

[1] Atmel Corp., “8-Bit AVR

Microcontroller with 2K Bytes
of In-System Programmable
Flash: AT90S2313,” rev. 0839f,
October 2000.

[2] ———, “I

C (Single) Master

Implementation,” 1997.

[3] Microchip Technology Inc.,

“24AA256/24LC256/24FC256—
256K I

C CMOS Serial EEP

ROM,” rev. DS21203G.

SOURCES

NKM2401-N, AM-HRR3-433, AM-
RT5-433
Abacom Technologies
(416) 236-3858
www.abacom-tech.com

AT90S2313-4PC
Atmel Corp.
(714) 282-8080
Fax: (714) 282-0500
www.atmel.com

SimmStick
DonTronics
61 411 036 242
www.dontronics.com

BASCOM-AVR
MCS Electronics
+31 75 6148799
Fax: +31 75 6144189
www.mcselec.com

24LC256I/P8EA
Microchip Technology Inc.
(480) 786-7200
Fax: (480) 899-9210
www.microchip.com

Windows Media Player
Microsoft Corp.
(206) 882-8080
Fax: (206) 936-7329
www.microsoft.com

RCU410
RCA
www.rca.com

DAC7611
Texas Instruments Inc.
(800) 477-8924
(972) 995-2011
Fax: (972) 995-4360
www.ti.com

Issue 134 September 2001

CIRCUIT CELLAR

www.circuitcellar.com

rom as far back

as I can remember,

I’ve had a strong

interest in hunting.

Initially I hunted birds, but later got
into big game. I also loved dogs from
the time I was a boy. So, almost as
soon as I bought a house I bought a
Labrador retriever. And, I’ve had a
Labrador ever since.

Initially, the training I did was min-

imal. I worked totally from a book
without help from anyone nor elec-
tronic training aids. Later, I adopted a
more formal method working with a
training group and testing to the

FEATURE
ARTICLE

North American Hunting Retriever
Association (NAHRA) standard. At
that point, I began to use electronic
dog-training aids.

As a side note, one of my longtime

goals has been to have my own busi-
ness—but not just any business. It
would have to be something I’m inter-
ested in, and if I were good at it so
much the better. Dog-training elec-
tronics could be it.

In this article, I plan to take you

through most of the various projects
I’ve built along the way to produce
what I hope is a viable dog-training
transmitter/receiver (Tx/Rx) instru-
ment. As you know, everything has a
micro in it these days, and these prod-
ucts are no exception.

RETRIEVER TRAINING ACTIVITIES

Before getting into the explanation

of my projects, I’d like to describe
some of the training activities that
benefit from electronic training aids.
To do this, I also need to introduce
some retriever training jargon.

When a training dummy is thrown

and the dog sees it fall, the dog takes
a mental picture of the location of the
fall. This is called “marking,” and
some dogs are better at it than others.
Practice helps the dogs improve their
marking ability, and throwing training
dummies (or dead birds, if you prefer)
for the dogs to retrieve is called
“throwing marks.”

A senior NAHRA test requires

dogs to do 100-yd. triple marks on
land and then in water. This is when
you need help—someone to throw the

Gordon Dick

Pigeons, Pooches,
and PICs

Melding an interest in
hunting, dogs, and
electronics, Gordon
takes us on a transmit-
ter/receiver trek. This
month, he sets out to
build a radio-controlled
dog-training aid to help
with his hobby. He’s on
the mark with this proj-
ect, so gear up to find
the answers you don’t
have to chase down.

Figure 1—

Holtek’s datasheet suggests a circuit similar to this. The unit is off until the Transmit button is pressed.

www.circuitcellar.com

CIRCUIT CELLAR

Issue 134 September 2001

typical hunting or testing sce-
nario. Therefore, this training aid
is seldom used now.

The first aid I built was a

radio-controlled .22-powered
dummy launcher. I used a .22 a
colleague wanted to get rid of for
the gun (see Photo 2). In order to
use the same dummies as the
unit in Photo 1, I had to cut an
O-ring groove into the shortened
barrel and install an O-ring.

This unit worked well because

it wasn’t hand-held but was
remote-controlled. I bought the
RF Tx/Rx units from a colleague

who originally bought them from
Ming Electronics. I wasn’t happy
with the range, but it was better
than anything else I had to train

with for the sit to flush test. The Rx
unit had a small relay that closed
when a signal was received from the
Tx unit. Because the Rx unit operated
from a 9-V dry cell, it wasn’t enough
to pull in my 12-V junk box solenoid.
So, the Rx relay was used to switch in
another battery, which, along with
the Rx battery, would give me 18 V.

The unit worked adequately but

required battery replacement more
often than I liked. I stopped using this
unit the day I discovered that you can
do all the training in the world with
dummies, but your dog will always
chase the first real pigeon he sees dur-
ing a test, so you both fail.

that the majority of decent products
evolve from crude beginnings. I also
hope you find the application of elec-
tronics and micros to dog training
interesting and helpful.

My first training aid was a .22-pow-

ered dummy launcher (see Photo 1); it
wasn’t electronic and I didn’t build it.
This launcher uses the same .22
blanks that are used to power con-
crete nailers. Although this unit can
fire its special dummy far, it’s diffi-
cult to get the dummy to fall exactly
where you want. The other training
difficulty is that the mark originates
from the handler (the person com-
manding the dog) and this is not a

marks. I once tried to get my
wife and daughter to throw for
me. Note I said only once. “It’s
too embarrassing to yell ‘hey,
hey, hey’,” my wife said, even
though we would be in the mid-
dle of an uninhabited field. So,
that was the end of that.

Marking training is done in

groups by most folks. Other peo-
ple hire throwers, usually pre-
teens. But, hiring throwers can
get expensive. Not to mention,
just when preteens become good
at it, they enter their teenage
years and think it isn’t cool.

And then, there are the people

who use training aids that allow
them to train alone. There are a
variety of machines designed to
throw training dummies, and many
are available on the Internet. Nearly
all of them are radio-controlled, so
that’s the topic I’m focusing on.

Labrador retrievers also must be

“steady to flush and shot.” This
means that a dog should comply with
a sit command (verbal or whistle)
even when a bird flushes close to
him. (The test for this is referred to as
“sit to flush.”) Getting a dog to do
this is difficult because the chase
instinct is strong. Training a dog also
is difficult without a training aid.

Most people use a radio-controlled

bird box that throws a live pigeon
into the air on command. This lets
you control how close the dog gets to
the bird before the flush is simulated.
The bird box described here also is
used to throw marks.

A LONG EVOLUTIONARY PATH

Some of my early design efforts

seem hokey when I look back at
them now. However, I hope you agree

Photo 1—

These units pack a kick and can throw a dummy far beyond

100 yd. They require two hands to operate (one to hold and one to
fire) and are difficult to aim. The dummies have a metal tube inside
that’s sealed on one end and fits over the barrel.

Photo 2a—

Yes, that’s a real .22 cal repeater with the

barrel welded shut and gas holes drilled in the side
(to comply with gun laws). The on/off switch is also
visible.

b—

The Rx unit is located in the top right cor-

ner under the aluminum cover. A tall stand (at the
bottom) was required for the solenoid to operate the
trigger. Long legs on each side are sharpened to
push into the ground.

c—

Packaged Tx units are

sometimes called pendants. The string allows the Tx
device and battery to be worn around your dog’s neck
in true pendant fashion.

Issue 134 September 2001

www.circuitcellar.com

CIRCUIT CELLAR

It was at this point when I began to

build units that would throw a pigeon
or dummy. A fellow dog club member
had a commercial unit that he was
willing to loan me. Careful study of
this throwing device allowed me to
build my own. I used the basic ideas
of the commercial unit but made
many improvements.

The mechanical parts of this unit

work fine, but as always, there were
problems. On the first one I made, I
used another junk box solenoid on the
trigger release. It was a 24-V solenoid
but the electronics were now operat-
ing on a rechargeable 12-V sealed lead
acid battery. To get around this prob-
lem, I used the relay contacts in the
Rx unit and a large electrolytic to
form a crude voltage doubler. (I could
have made a switch mode step up

supply, but I was trying to avoid com-
plicating things.) This worked fine
until the relay contacts became badly
arced and thus unreliable.

I’ve solved several of the previous

problems now, and most of the elec-
tronics is my design. Currently, I pur-
chase Rx and Tx devices from
Abacom and get excellent range.
Reverse engineering on the Abacom
Rx and Tx motherboards helps me fig-
ure out the electronics.

On the next version, I stopped using

junk box solenoids and bought a 12-V
unit to eliminate the drive difficulty.
This version is reliable, produces good
range, and has a rechargeable battery
in the Rx unit. A 9-V dry cell still is
used in the Tx because it has such a
low duty cycle that it lasts a whole
season. Figures 1 and 2 show the Tx

Photo 4—

Here are the finished

assemblies for the Rx and Tx
units. I bought the RF modules
and antenna but built the rest.

Photo 3—

This is my rendition

of the commercial launcher I
borrowed from a colleague.
This device may be used to
throw dummies or pigeons.
The white canvas forms a
pocket when the arms are
folded down. The bird is
placed in the pocket through
the hole. When the solenoid
releases the trigger, the arms
spring up throwing the bird
and firing a shotshell primer.

Issue 134 September 2001

CIRCUIT CELLAR

www.circuitcellar.com

I also modified the Rx unit to have

three outputs instead of one. It has to
energize one output in response to
one of three keys on the handheld
being pressed. Table 1 suggests that
there needs to be three flavors of Rx
units depending on which three keys
are to be acted on. If discrete logic
were used, there would need to be
three variations of the Rx PCB.

A more sensible approach might be

to use a PLD. That way one circuit
board could respond to keys different-
ly depending on which flavor of PLD
was being used. I considered this
approach seriously but opted for the
PIC for the same reasons as before.
And again, I was pleased later.

The circuitry of the new Rx unit

now includes a PIC (see Figure 4).
There’s not much for it to do here. It
just reads the number coming in on
the data lines of the decoder and
drives an output FET depending on
which number it gets. The output is

The features I added were

recommended by someone who
makes a living training dogs
and field testing dog-training
equipment. These features
made my equipment unique, at
least for awhile.

The next thing I did was

modify the Tx unit to control
not only three separate Rx
units, but three separate activi-
ties at each Rx. Although tog-
gle switches could be used for
this, the recommendation was
to use push-button switches in
an array (i.e., a keypad).

When I started searching for

keypad decoder chips, they
were hard to find. Fearing that
even if I found a suitable
decoder now that next year it might
be discontinued, this seemed like a
good place to use a micro. It wouldn’t
have much to do now, but maybe I
would find other uses later. (This
turned out to be true.) Moreover, I
had been promising myself that I
would learn something about those
PIC micros that were showing up
everywhere. So that was it. I bought
some “how to” books, a simple eval
board (check out the Sources section),

and some PIC16F84s
and got to it.

When I became

familiar with these
new parts, I grew to
like them. I won’t
throw the HC11 out of
my toolbox, but these
PICs are a nice addi-
tion. So, my first PIC
activity was the code
for a keypad scanner.
(OK, I used the code
from Easy PIC’n, but I
studied it carefully. [1])
When a key is pressed,
the number associated
with that key is placed
on the data pins of the
encoder and the PIC
activates that Tx for
approximately 1 s. The
new Tx schematic is
shown in Figure 3.
Photo 5 displays the

new hand-held unit.

and Rx, respectively. The pigeon
launcher is shown in Photo 3. Photo 4
is a shot of the Rx box and hand-held
transmitter. The equipment works
just fine, so why not stop here? It’s
called creeping featurism, isn’t it?

Photo 6—

The latest version of the Rx is shown here. It’s small-

er than other versions I developed because the charger trans-
former is no longer on the PCB. The 12-V battery is sand-
wiched between the PCB and the box.

Photo 7—

Much of the support circuitry is absent because this is a test ver-

sion. The LEDs display the received numbers from the Tx keypad in binary.

Photo 5—

This is the latest version of the hand-held Tx

package. I had to add an on/off switch to preserve the
battery. The circuitry inside the Tx unit now requires a
two-level PCB to fit everything inside.

Tx Key

Rx Unit 1

Rx Unit 2

Rx Unit 3

Out 1 on

Out 2 on

Out 3 on

Out 1 on

Out 2 on

Out 3 on

Out 1 on

Out 2 on

Out 3 on

Table 1—

Three Rx devices may respond to the Tx

keys as shown in this table.

www.circuitcellar.com

CIRCUIT CELLAR

Issue 134 September 2001

driven on for only about 1 s, and the
PIC does the timing for that also.
Again, because the timing isn’t criti-
cal, the RC version of the oscillator is
used. Photo 6 shows the new Rx in a
smaller package even though there is
more circuitry. The battery-charging
transformer is now a wall wart free-
ing up a lot of PCB area. This version
works well, so why change it?

It was about this time when I

placed an order for a variety of things
including Holtek encoders and

decoders. But, the vendor no longer
carried the Holtek products. I found
another supplier, but by that time the
cost had doubled.

Around the same time period, I

read an article written by Patrick
Gueulle, in which he described how a
common encoder chip (which I
believe is no longer available) can be
replaced by a micro. [2] What a good
idea! Furthermore, I had an encoder I
wanted to take out and a PIC that
wasn’t being used to its potential.

A short time later, the Tx

unit was comprised of just
two devices, a PIC looking
after a keypad and doing the
encoding to drive an RF Tx
module (see Figure 5). Don’t
you love simplicity? The
wire wrap prototype board is
shown in Photo 7. This cir-
cuit is simple enough now
that it should fit on a single-
level PCB. The two-level PCB
used currently is difficult to
build and even more difficult
to troubleshoot if an assem-
bly error occurs. Reducing
the number of chips in the
Tx unit will also extend bat-
tery life.

After eliminating the

encoder from the Tx unit, I
focused on the Rx unit.
Could I also eliminate the

decoder? Has anyone else already
done it? I began searching the Internet
to see if an application note that deals
with this exists. Although I didn’t
find anything I could use, I learned
that other people and companies have
done it, so maybe I could too.

First, I tried to make the PIC dupli-

cate what the Holtek part does. But,
because the datasheet is missing
many details of the decoding process,
I wasn’t sure I was doing everything
that’s required. I got this to work

Figure 2—

This Rx unit is similar to many early garage door openers.

Figure 3—

A PIC is now part of the hand-held Tx unit. The RC-based oscillator is used because no time measurements are being calculated.

Issue 134 September 2001

CIRCUIT CELLAR

www.circuitcellar.com

Figure 4—

The Rx unit now has a PIC also. It has little to do right now, but will be asked to work harder soon.

www.circuitcellar.com

CIRCUIT CELLAR

Issue 134 September 2001

get together and share Rx units. This
learning feature is common in garage
door openers, but is not yet widely
available in dog-training equipment.
Next winter might be a good time to
work on this feature.

Getting a dog to look in the direc-

tion where a mark will originate is an
important part of training. If you have
help, the helper will make noise to
get the dog’s attention. This can be in
the form of yelling, blowing on a
duck call, or firing a blank gun. But
what do you do when you’re training
alone? Currently there’s not much in
the way of electronic help. What’s
needed on the market is a remote-
controlled realistic duck or goose
sound with plenty of volume.

In a future article, I’ll describe a

PIC-based playback device that can be
remotely activated from a multiple
output Rx unit such as the one
described here. That unit will play
one of three user-selected, pre-record-
ed birdcalls at one of three user-
selected volume levels. Watch for
that follow-up article.

eventually, sort of. The reliability was
poor, certainly not good enough for
this application. At this point, my dis-
couragement and frustration levels
were high so I set it aside for awhile.
(I haven’t given up yet, but I’m close.)

Because the cost of the Rx and Tx

units are a significant part of the over-
all cost of this equipment, I’ve been
considering building my own or find-
ing something less expensive. Micrel
has a cute single chip receiver that I
would like to try one day. [3]

In the Micrel literature, I found

some additional information about
how an Rx module goes about its
reception task. [4] Armed with this
new information, I rewrote my
encoder and decoder codes. After a lot
of testing and debugging, I produced
reliable decoding action using the PIC
as the decoder. The schematic of the
test version is shown in Figure 6.
Photo 7 shows the perf board version
of the Rx device.

WHAT’S NEXT?

Currently, if a Tx module needs to

be paired with a different Rx device,
one unit or the other needs to be
reprogrammed with a new address.
Although this isn’t difficult to accom-
plish, it requires disassembly. In the
future, an Rx unit will be able to
learn to respond to a new Tx device
by putting it into a learn mode. Not
only would this eliminate having to
disassemble to reprogram, but it
would also allow training buddies to

Gordon Dick, P.E. is an instructor in
Computer Engineering Technology at
the Northern Alberta Institute of
Technology, Edmonton, AB, Canada.
He consults occasionally in the area
of intelligent motion control and is
usually working on some electronic
project. You may reach him at gor-
dond@nait.ab.ca.

Figure 5—

A PIC is doing all of the work here except transmitting the RF signal. As you can clearly see, this is a

simple circuit controlled by simple code.

Issue 134 September 2001

CIRCUIT CELLAR

www.circuitcellar.com

RESOURCE

D. Benson, PIC’n Up the Pace,
Square 1 Electronics, Kelseyville,
CA, 1999.

REFERENCES

[1] D. Benson, Easy PIC’n, Square 1

Electronics, Kelseyville, CA,
1999.

[2] P. Gueulle, “Using a PIC12C508

to Emulate an MM53200
Coder/Decoder,” Electronic
Design IFD

, August 7, 2000.

SOFTWARE

The code is available on Circuit
Cellar

’s web site.

[3] Micrel Semiconductor, Inc.,

“MICRF001 QuikRadio
Receiver/Data Demodulator.”

[4] T. Yestrebsky, “MICRF001

Theory of Operation,” 22,
Micrel Semiconductor, Inc.,
October 1999.

SOURCES

Rx and Tx motherboards
Abacom Technologies
(416) 236-3858
Fax: (416) 236-8866
www.abacom-tech.com

Encoders and decoders
Holtek Semiconductor Inc.
www.holtek.com

Eval boards
Micrel Semiconductor, Inc.
(408) 944-0800
Fax: (408) 944-0510
www.micrel.com

microEngineering Labs, Inc.
(719) 520-5323
Fax: (719) 520-1867
microengineeringlabs.com

Tx and Rx units
Ming Microsystems Inc.
(626) 961-0323
Fax: (626) 961-8493
www.ming-micro.com

PIC16F84
Microchip Technology Inc.
(480) 786-7200
Fax: (480) 899-9210
www.microchip.com

Figure 6—

Much of the support circuitry is absent in the test version.

The LEDs display the received numbers from the Tx keypad in binary.

Issue 134 September 2001

CIRCUIT CELLAR

www.circuitcellar.com

begin this

month’s technical

discussion with a

word from the late Chris

Farley. Farley did a skit on “Saturday
Night Live” called “The Chris Farley
Show” where he was always comical-
ly overcome with the importance and
historical contributions of his world-
renowned guests. I particularly
remember one occasion when he
interviewed Paul McCartney. Farley
always seemed to start his sentences
with “And…” For
instance, “And, do
you remember when
you were with the
Beatles…and they
said you were
dead?” Or, “And, do
you remember
Beatlemania where
those four guys…
they dressed on
stage and looked
just like you?” The
catch phrase at the
end of most of these
lines was, “That
was awesome.”

And, well, I’m

feeling a little like
Chris did right now.

APPLIED
PCs

And, do you remember a company
called CMX Systems? They do 8051
TCP/IP and C compiler stuff. Well,
I’ve got a box with a Keil C51 compil-
er and tools plus CMX-MicroNet
TCP/IP software, a piece of hardware
called iKit2000 featuring a Triscend
Configurable System-on-a-Chip, and
the iReady S-7600A TCP/IP IC. And,
do you remember the Cirrus Logic
CS8900A-CQ Ethernet IC? Well, it’s
on an expansion board that plugs right
onto the iKit2000 board. And, there’s
8051 drivers and stuff for it and the
Seiko IC. This is awesome.

THE iKIT2000

As you’ve probably already guessed,

I’m taking you on a different embed-
ded journey today. Instead of strolling
down the lanes of the vaunted
Pentium and 80×86 embedded
engines, I’m going to walk a well-
beaten path that has been traveled by
millions for decades. That path is the
way of the 8051.

The 8051 became working silicon

in laboratories of Intel in 1980. The
standard 8051 then and today
includes timers, counters, a UART,
and on-chip RAM and ROM. Since its
inception, many manufacturers have
enhanced the 8051’s capabilities by
adding ADCs, PWMs, I

C, and more

ROM and RAM to the single IC solu-
tion. This immortality has put the
8051 in more applications than many
of its contemporary competitors.

Fred Eady

The Progress of 8051

Borrowing a catch
phrase from “Saturday
Night Live,” Fred
thinks this month’s
project is “awesome.”
Demonstrating what
can be done with the
oldest, most popular
microcontroller, he
reviews the 8051. It’s
the story of a classic
standard that still holds
up admirably today.

The iKit2000

Photo 1—

Although the Triscend TE520S40-40QI steals the show in this photo,

the costars aren’t bad to work with either. The S-7600A and CS8900A-CQ are
both well-documented and easy to implement in real-world designs. The DIP
switch bank is connected to the TE520S40-40QI I/O pins and is used to demon-
strate web-based monitoring and control. In this photo, the LCD contents tell you
that CMX-MicroNet is in full control.

www.circuitcellar.com

CIRCUIT CELLAR

Issue 134 September 2001

maximum clock rate and 12 clock
cycles per machine cycle offered by
the standard 8051.

The major difference in the five

available Triscend E5 models is in
their amount of on-chip programma-
ble logic, RAM, and I/O pins.
Although “8051” is not displayed on
the TE520S40-40QI IC, it can still be
treated as such. This means that if
you know 8051 code and have 8051
development tools, you can work
with the TE520S40-40QI.

Remember, of course, there are spe-

cial tools available for the non-8051
portions of the TE520S40-40QI. The
TE520S40-40QI used by the iKit2000
contains the following: 40 KB of sys-
tem RAM, 2048 configurable system
logic (CSL) cells, and 252 I/Os. The
TE520S40-40QI is next to the largest
device, with the TE520S64 sporting
64 KB of system RAM in addition to
316 programmable I/Os.

Each E5 CSoC is equipped with

three 16-bit timer/counters, a full-
duplex, programmable UART, and
programmable I/O ports (PIOs). In
addition, a protected and programma-
ble watchdog timer, three external
and 10 internal programmable inter-
rupts, and power-down power man-
agement modes are included. A mem-
ory interface unit (MIU) allows a glue-
less interface to external flash memo-
ry, EPROM, EEPROM, or RAM.
That’s an important detail because

CSoC family, are wolves in sheep’s
clothing. The E5 series is the first
Triscend CSoC family of devices. A
Triscend TE520S40-40QI CSoC run-
ning at 30 MHz powers the iKit2000
Internet Appliance Development Kit.

All E5s are based on a performance

accelerated 8-bit 8051/8032 core. The
acceleration is provided by a 40-MHz
maximum clock rate and four clock
cycles per machine cycle. This
scheme compares to the 12-MHz

A stock off-the-shelf 8051 contains

128 bytes of data memory that is
directly accessible via its instruction
set. Program memory usually consists
of 4 KB of ROM or EEPROM depend-
ing on the package and model. Within
the 128-byte data memory, 32 bytes
are addressable by a subset of bit-ori-
ented instructions. The bit-address-
able feature was not happened upon
by accident, as the 8051 was designed
as a real-time, control-oriented device
from the start.

Real-world applications of the 8051

are usually based on digital control of
an object or process. As the 8051
became more popular and encom-
passed more applications, the applica-
tion code soon became large enough
to overextend the amount of on-chip
8051 ROM. This was never really a
significant problem because external
memory access is possible with the
8051 using a special

MOVX instruction.

The upper limit of external memory
is 64 KB, however, switching banks of
physical memory area easily circum-
vents this limitation.

There are 100 or more variants of

the standard 8051 available from at
least a dozen different manufacturers.
Some still call their products 8051
and others, like the Triscend E5

Photo 2—

Behind every good application stands well-written code. I can’t open all of the goodies behind the but-

tons and tabs, but the general layout of the µVision2 IDE gives you a feeling of comfort and power.

Photo 3—

iP Solutions provided the soft modules for the iKit2000. I’m taking advantage of the pre-wired LCD mod-

ule to show you how to apply the glue.

www.circuitcellar.com

Issue 134 September 2001

the TE520S40-40QI must have an
external memory device to work in
Standalone mode.

To help manipulate memory, the

TE520S40-40QI comes with a two-
channel, single-clock transfer DMA
controller and a couple of 16-bit data
pointers (that’s one more than the
stock 8051 includes). If you’re won-
dering how to get your intelligence
into the TE520S40-40QI, that is
accomplished with a four-pin IEEE
1149.1 JTAG interface port.

The CSL is based on embedded

SRAM and is a matrix that provides
what Triscend calls “derivative on
demand” system customization. That
is, the CSL architecture consists of a
highly interconnected matrix of CSL
cells. These cells have an uninhibited
path to and from the internal system
bus. As you would imagine, the cells
perform standard combinatorial and
sequential logic functions. The com-
binatorial area can also function as
memory and perform Boolean logic
and arithmetic operations.

This all sounds pretty complicated.

The good news is that it actually isn’t
complex if you back off and look at

CIRCUIT CELLAR

the whole thing subsystem by subsys-
tem. Like the 8051 and any other
microcontroller, the TE520S40-40QI
needs a clock and includes on-chip
resources to use an external crystal
and associated capacitors and resis-
tors, an external clock source, or a
stand-alone clock oscillator.

A single 8-bit memory device (usu-

ally a flash memory device) holds the
TE520S40-40QI initialization program
as well as application code. The JTAG
port is there for downloads and debug-
ging and the PIOs are connected to
external peripherals or the internal
system bus and CSL.

Applying the back-off-and-look con-

cept to the iKit2000 hardware, you
see a 30-MHz stand-alone oscillator
feeding a clock to the TE520S40-40QI.
A single 256K × 8 AT49LV002N from
Atmel is the flash memory part that
holds the startup and application
code, which allows the TE520S40-
40QI to come up intelligently and
work alone if it is required to. A
Wiggler 8032 JTAG access arrange-
ment gives the TE520S40-40QI your
“ideas” via a host PC’s parallel port
and the FastChip software package.

Finally, the PIOs are physically con-
necting a DTE serial interface, a Seiko
S-7600A TCP/IP hardware stack/
Internet data pump, a two-line LCD,
and an expansion port.

The serial port, S-7600A, LCD, and

expansion port all are onboard fea-
tures of the iKit2000. The dial-up side
of Internet connectivity is covered by
the S-7600A. The iKit2000 designers
have covered the Ethernet side of the
Internet connectivity equation with a
CS8900A-CQ peripheral board. Take a
look at Photo 1 to get a good view of
the iKit2000 development board,
CS8900A-CQ expansion board, and
Wiggler JTAG interface.

I really wanted to give you an

overview of the iKit2000 hardware, as
I could write a couple articles on the
TE520S40-40QI IC alone. If you want
to read about more of my views on
the CS8900A-CQ and S-7600A, check
out Circuit Cellar Online to find
some in-depth articles as seen
through my eyes (and shaped by my
hands) for both the Cirrus Logic
Ethernet and iReady dial-up parts. As
for the Triscend part, you can log on
to their web site and read about the
E5 series for days. The real focus here
in this article is the software tool set
from Triscend, CMX Systems, and
Keil that works behind the scenes to
make the iKit2000 perform on the
Internet appliance level.

C INFORMATION

In case you haven’t noticed, the

iKit2000 is a cooperative venture
involving Seiko Instruments, All
American Semiconductor, Triscend,
iReady, and IP Solutions. CMX
Systems provides real-time software
for embedded applications. In your
case, that would be CMX-MicroNet, a
true TCP/IP stack for 8- and 16-bit
microcontrollers. CMX Systems also
provides various C compilers, such as
the Keil 8051 C51 compiler I am
using, through distribution channels.
CMX-MicroNet for the 8051 is a nec-
essary item on the iKit2000 if you
don’t plan to use the PPP-based Seiko
S-7600A hardware TCP/IP stack.

Thanks to a helpful fellow by the

name of J.R. at CMX, I’ve had my
intelligence level raised a few points

***************************************************************

Includes

***************************************************************

// The header file automatically created by FastChip

#include "ccink.h"

// The LCD library of functions

#include "lcd.h"

***************************************************************

Main function

***************************************************************

void main () {

int x;

CCINK_INIT(); // FastChip generated function

// Initalize the LCD.

LCDInit();

LCDPrint("IT'S 8051 AND...IT'S EMBEDDED!");

while(1){

x = 1;

}

Listing 1—

The include file

lcd.h

harbors all of the necessary functions to manipulate the LCD module.

The

ccink.h

include was generated by the FastChip application. Note too that the

CCINK_INIT

function

was prototyped in the

ccink.h

file that was also generated using FastChip.

Saelig

o. Inc.

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tion products to USA from Europe.

We are noted for our

great after sales
support.

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Self-contained in
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CIRCUIT CELLAR

Issue 134 September 2001

arrived with the PK51 Professional
Developer’s Kit. Then, I decided to
take a look at the contents of the
PK51 installation CD. There are
enough application notes and book
references to get just about anyone
interested in 8051 embedded solu-

when it comes to 8051 C compilers
and microcontroller TCP/IP stacks. In
addition to logging in hours of time
spent on the Internet studying the ins
and outs of each component of the
iKit2000, I managed to get through
3.5

″

of Keil C51 documentation that

Photo 4—

As you can see, the MCU pins are all defaulted to their expected configurations. The UART will not be

used and is disabled. There will be initialization code generated for all of the dedicated resources whether they are
used or not. This can be changed by clearing the Generate Code check box.

Photo 5—

The LCD D7 line is the LCD pin on the far right. LCD D0 is the LCD pin on the far left with a blue bidi-

rectional arrow. The red arrows on the E, RD, and RS lines indicate that these pins are outputs. Everything on this
screen is drag-and-drop technology. The Change Default Constraints window is included here to help you get a
better picture of the overall process.

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Photo 5. In this case, I
dragged all of the LCD
I/O pins (with the excep-
tion of the RS pin of the
LCD) to their respective
pins on the TE520S40-
40QI. The iKit2000 doc-
umentation identified
where the LCD module
pins were placed on the
iKit2000’s TE520S40-
40QI. If you were doing
this from scratch, your
schematic would dictate
where the LCD pins
would be represented. In
this example, the LCD
RS pin will be placed at

pin 207. Assigning a
pull-up or pull-down
function for each pin is
determined in the elec-
trical settings.

Looking at the rather busy Photo 5,

the bottom of the picture shows the
current electrical settings as dictated
by the design. To give you a feel for
how these may look in other configu-
rations, I opened the BusMinder pull-
down window to reveal the choices a
designer can make.

The CSoC build process generally

follows the flow left to right of the
graphical menu buttons right above
the Dedicated Resources. I won’t be
importing or exporting any soft mod-
ules for the LCD demonstration, but I
must generate the

CCINK.c and

CCINK.h header files.

The

CCINK.c file contains all of the

initialization code for the Dedicated
Resources. I didn’t change any of the
properties of the Dedicated Resources,
so the code will reflect the default set-
tings. Note that the

CCINK.c file must

be included in the main LCD code.
All of the declarations and prototypes
for the

CCINK.c file are generated into

the

CCINK.h file. For a clear under-

standing, see the representation of
this in the notepads of Photo 6.

At this point, you could vector off

and write the 8051 LCD code or bind
the TE520S40-40QI configuration into
the Triscend silicon. The LCD code is
simple and needs little if any debug-
ging, and I know in this instance that
the LCD module will function cor-

Issue 134 September 2001

CIRCUIT CELLAR

www.circuitcellar.com

tions started and well
into nearly any 8051-
based solution. A
CS8900A-CQ application
note is also included on
the PK51 CD.

The PK51 Professional

Developer’s Kit is a suite
of applications aimed at
the 8051 developer who
needs to write complex
real-time code using C.
The PK51 package
includes the standard
stuff you’d expect, like
Keil’s A51 macro assem-
bler, BL51 linker, and the
C51 ANSI C compiler.
Then, on top of those
things, you receive a ver-
sion of Keil’s RTX-51
tiny real-time kernel,
MON51 target monitor,
OH51 object-hex converter, and
OC61 banked object converter.

Development tool cohesion is sup-

plied by a nice IDE called µVision2.
µVision2 is a piece of work and would
require another article to describe it
fully. In a nutshell, µVision2 is a proj-
ect manager, source code editor, and
program debugger all rolled into one
package. An example of a typical
µVision2 view is shown in Photo 2.

The PK51 tools provide the founda-

tion for developing 8051 embedded
Internet applications. If you’ve ever
written source code for other micro-
processors, you will find it easy to
adapt to the K51 environment. There
are lots of bells and whistles, but the
PK51 is easy to get started with. The
learning curve isn’t steep and, before
you know it, you’re banging out
working 8051 code.

The next step is to get a handle on

the Triscend FastChip software and
how it interacts with the TE520S40-
40QI. I gave you the wordy version
for the TE520S40-40QI earlier but, as
I said, you need a picture to tell the
whole story. You can see that whole
story in Figure 1, a high-level layout
of the TE520S40-40Q.

The first thing to note is that the

screen is divided into logical areas
that coincide with the physical and
logical layout of the TE520S40-40QI.

The dedicated resources are actually
real physical attributes of a standard
8051, right down to the on-chip
UART. By clicking on the desired
dedicated resource, you can set prop-
erties associated with the resource
and connect the resource to the
TE520S40-40QI hardware pins. The
CSL area allows you to incorporate
soft modules made using external
EDA tools or from a soft module
library like the library supplied with
the FastChip application. I could talk
about this all day. The best way to
show you how it all works is to show
you how it all works.

SHOW AND TELL

The best method I know to get

stuff into the TE520S40-40QI is to
walk through a simple example that
enables the iKit2000 LCD. Photo 3
shows you that I dragged the iKit2000
LCD soft module from the module
library area to the CSL window. I’m
going to use the dedicated resources
in their default states because I won’t
need anything special to do the trick
with the LCD. To show you I’m hon-
est, I included Photo 4, which is an
example of what’s behind the MCU
and UART dedicated resources.

When the LCD soft module is

selected, clicking on Constraints and
selecting the I/O Editor produces

To external memory
for initialization and

code storage

Power

control

Clock and

crystal

oscllator

control

Powerup

reset

Bus

arbiter

Two-channel

DMA controller

JTAG Interface

Memory

interface unit

Configurable

system logic

(CSL)

matrix

Byte-wide

system RAM

Hardware

breakpoint unit

Configurable system

interconnect bus

socket

PIO

Configurable system

interconnect (CSI) bus

Data b

Selector

Address

mappers

Accelerated 8051

CPU

Timer 0

Timer 1
Timer 2

USART

Interrupt

unit

Watchdog

timer

256 x 8

RAM

Address b

Figure 1—

With the exception of the JTAG interface, address mappers, MIU, and CSL, this is

a suped-up 8051. A real-world 8051-based project would include external objects that per-
form the functions of the CSL and company. Here, instead of building the hardware function-
ality block by block, it’s all contained in a single part.

Issue 134 September 2001

CIRCUIT CELLAR

www.circuitcellar.com

rectly with the pin-out I have
assigned. Therefore, you can accom-
plish either method. The bind process
generates

CCINK.csl, and the CCINK.c

file and source in Listing 1 are com-
piled and linked into

LCD.hex.

At this point, I’ve generated and

compiled all of the code and CSL defi-
nitions I need to load into the

iKit2000 TE520S40-40QI. Device
linking is the final step before you’ll
see the fruits of my labor. As you can
see in Photo 7, there are two compo-
nents associated with device linking,
configuration and download. I can
download to flash memory, CSoC
RAM, external SRAM, serial or paral-
lel EEPROM, or standard EPROM.

Photo 7—

This is where it all came together for me. I could mix and match 8051 hex files with differing CSL defini-

tions in the configuration screen and try the combinations by downloading to the TE520S40-40QI internal SRAM.

Photo 6—

What you see in this shot is the tip of the iceberg. The

CCINK.c

file contains code for all of the func-

tions that are called in the notepad window. XDATA declares the familiar LCD variables as non-SFR variables and
forces them to reside in standard register space.

Issue 134 September 2001

CIRCUIT CELLAR

www.circuitcellar.com

The iKit2000 is equipped with an
Atmel AT49LV002-90 and that’s what
I targeted. The input files on the back
tab are the

CCINK.csl file, which rep-

resents the CSL configuration for the
LCD and the results of the 8051 com-
pilation

LCD.hex. When the files are

entered in their respective cubby-
holes, the files are used to generate a
Triscend CSoC configuration image
file called

CCINKCSoC.cfg. The

CCINKCSoC.cfg file is ultimately down-
loaded to the TE520S40-40QI on the
iKit2000 using the

Download function.

INTERNET 8051 STYLE

Now you know how it works and

how to handle it from the hardware
side. And as you see, it’s pretty
straightforward. The steps are to
build, generate, and bind a logical def-
inition for the TE520S40-40QI CSL,
write and compile the 8051 code,
assemble a configuration, and down-
load the results to the TE520S40-40QI
hardware. Then after those steps, all
you need is a hall pass for the Internet
that’s signed by CMX.

CMX-MicroNet is as full an imple-

mentation of TCP/IP for small micro-
processors as you can get. CMX-
MicroNet can support up to 16 TCP
or UDP sockets. MicroNet can handle
PPP, SLIP, and my favorite, Ethernet,
but in a mutually exclusive manner.

In addition to providing TCP/IP

services, CMX-MicroNet works on
the application side as well as provid-
ing HTTP and FTP server capability.
To keep things compact, the embed-
ded rule of thumb that nothing comes
for free is applied within the CMX-
MicroNet code. PPP negotiates the IP

Photo 8—

Yes that’s right, it’s just as the message says.

Reads up to 20 keys

(4X5 Matrix)
Programmable Rows

& Columns
Programmable Key Values
PC/AT or Serial Output
Automatic or Polled Key Reporting
Programmable Debounce & Typematic Times

64 Bytes of User Accessible EEPROM

www.circuitcellar.com

CIRCUIT CELLAR

Issue 134 September 2001

Fred Eady has more than 20 years of
experience as a systems engineer. He
has worked with computers and com-
munication systems large and small,
simple and complex. His forte is
embedded-systems design and com-
munications. Fred may be reached at
fred@edtp.com.

SOURCES

AT49LV002N
Atmel Corp.
(408) 436-4270
Fax: (408) 436-4314
www.atmel.com

CMX-MicroNet
CMX Systems, Inc.
(508) 872-7675
Fax: (508) 620-6828
www.cmx.com

Keil C51 C compiler
Keil Software, Inc.
(800) 348-8051
(972) 312-1107
Fax: (972) 312-1159
www.keil.com

Soft modules
iP Solutions
(510) 651-6403
Fax: (603) 971-0848
www.ipsolutionscorp.com

S-7600A TCP/IP
iReady Corp.
(408) 330-9450
Fax: (408) 330-9451
www.iready.com

S-7600A
Seiko Instruments USA Inc.
(310) 517-7771
www.seiko-usa-ecd.com

TE520S40-40QI CsoC E5 series,
FastChip software
Triscend Corp.
(650) 968-8668
Fax: (650) 934-9393
www.triscend.com

address only and ignores any other
negotiation options, and fragmented
packets are not allowed.

CMX-MicroNet is used exactly like

any other TCP/IP stack. Hence, as
expected, all of the calls for TCP/IP
connectivity are incorporated. For
example, a call to

mn_init performs

MicroNet initialization. A socket is
opened using a call to

mn_open.

The protocols, number of sockets,

and buffer sizes all are configured
within a file called

config.h. MAC

and IP address information is con-
tained in another file called

call-

back.c. The mn_uart.c file can be edit-
ed to set the data rate and UART
channel for PPP and SLIP. I’m sure
you’ve gathered that configuring
TCP/IP functionality within CMX-
MicroNet is an easy task based on
files and their internal definitions.

In addition to standard TCP/IP

functionality, CMX-MicroNet
includes modem control routines,
timer functions, as well as virtual file
system calls. Additionally, there’s
even a utility included to convert
HTML-based web pages to

.c files for

inclusion in your code.

CMX-MicroNet gives you a big

processor TCP/IP feel within the con-
fines of a small micro like the 8051.
Photo 1 looks tame in that you see
only a simple banner displayed on the
LCD. Behind that banner, a full-func-
tion interactive web server is running
providing a time-of-day clock and an
interface to the physical components
mounted on the iKit2000.

MN_CLOSE

So that’s the essence of CMX-

MicroNet, for I’m out of paper. The
iKit2000 is the brainchild of several
companies interested in advancing the
technology needed to put small
devices and their data on the Internet.
Using proven technology from iReady
and Cirrus, the iKit2000 demonstrates
what can be done with the oldest and
definitely most popular microcon-
troller technology, the 8051.

Triscend has shown you that the

8051 core can be enhanced to levels
the original designers never dreamed
of. I’m sure the original 8051 design
team had great expectations for their

new baby, but they probably never
thought a TCP/IP stack from CMX
Systems would be crammed into its
tiny ROM area. As for me, I have
again shown that the iKit2000 is not
complicated, as you can see from
Photo 8, it’s embedded.

Issue 134 September 2001

CIRCUIT CELLAR

www.circuitcellar.com

n a world in

which it some-

times seems like the

most influential physical

law is Murphy’s, it is reassuring to
find some devices that behave the
way physics says they should. The
collector current of an ordinary sili-
con transistor is an accurate exponen-
tial function of its base voltage over a
range that can exceed six decades.
Then there are occasional integrated
circuits that perform better than you
may expect. Put the two together and
you can end up with a winner.

A FOUR-DECADE OSCILLATOR

The 74HCT4046 chip, which you

can buy from Radio Shack (part 276-
2913), combines three phase detectors
with a voltage-controlled oscillator
(VCO). The VCO has a square wave
output. When used as Philips intend-
ed, its frequency is a function of the
current the control voltage drives
through an external resistor. The out-
put frequency can be modulated over
a 4:1 range. This range improves
remarkably when you drive the chip
directly with a current.

You can make this current propor-

tional to an input voltage, but it’s
much more useful to supply it from a

FEATURE
ARTICLE

When in the end your
project doesn’t exactly
fit the formula of
building

x to complete

y, often you can still
benefit from the expe-
rience. Tom ended up
coupling a silicon
transistor and inte-
grated circuit, and
he’s bold enough to
say the result defies
Murphy’s Law.

transistor whose base voltage is the
control input. [1] The result is a
square wave generator that can sweep
four decades in a single range.

The exponential control means that

every voltage change of input pro-
duces the same percentage increase in
frequency; just what you want, to dis-
play a wide range of frequency behav-
ior on an oscilloscope. It also means
that the musical pitch changes linear-
ly with the control input. You can use
this system as a manually controlled
oscillator whose frequency can be set
anywhere in the audio range with one
knob. Connect a D/A converter and
you get a different musical note for
each digital input. Hook up a pseudo-
random number generator and you get
stochastic music. And so on.

SETTING THE FREQUENCY

The oscillator in the ’4046 is sim-

ple, it switches the same current into
either side of a capacitor while
grounding the other side. The two
sides of the capacitor connect to the
set and reset inputs of a flip-flop that
both controls the current switch and
generates the output. The result is a
square wave whose frequency is pro-
portional to the input current and
inversely proportional to the size of
the capacitor. Output frequencies up
to 10 MHz are possible.

Three things influence the output

frequency. One is the amplitude of
the ramps, this is about 1.5 V and is
fixed inside the chip. Another is the
size of the external capacitor, which
you can select from 100 pF to hun-
dreds of microfarads. The last factor is
the charging current.

You don’t have direct access to this,

it’s generated internally from the sum
of two other currents. Normally one
current is a function of your control
voltage and an external resistor, and
the other is a function of a fixed bias
voltage and another external resistor.
In this mode, the ’4046 has a small
linear tuning range above a preset
minimum frequency. Add filter com-
ponents to one of the three phase
detectors on the chip and you get a
narrow-band, phase-locked loop that
will adjust its output frequency to
match that of the input signal.

Tom Napier

acoste

An Exponential Sweep
Frequency Generator

www.circuitcellar.com

CIRCUIT CELLAR

Issue 134 September 2001

You’re going to run the oscillator

open loop and supply it with your
own current source. Now the control
voltage input is no more than a bias
level for the current source and has
no significant effect on the oscillator.
You even have a choice of two current
inputs (although their characteristics
are subtly different) and may add two
control currents. By selecting a suit-
able capacitor, you can make the out-
put frequency as high as 10 MHz or as
low as sub-audio. A 10-Hz to 100-kHz
oscillator is practical.

EXPONENTIAL CONTROL

Generating a linear control current

is not hard and may be the preferred
route for some applications. You can
make a quality square wave generator
with linear decade ranges from this
chip, if you don’t mind switching in
several different capacitors. But how
do you get exponential control?

The Ebers-Moll equation:

shows that a transistor’s collector cur-
rent is a tiny saturation current mul-
tiplied by an exponential function of
the base voltage divided by the
absolute temperature. T is the junc-
tion temperature in degrees Kelvin.
The leakage current, I

, is also tem-

perature-dependent. Both cancel when
you subtract the base voltages of two
transistors, but a temperature-depend-
ent gain factor remains.

To complicate matters, the satura-

tion current also is a function of tem-
perature. This is significant enough to
change the temperature coefficient of
the base emitter voltage from the pos-
itive coefficient suggested by the
Ebers-Moll equation to the 2.1-mV/°
negative coefficient found in practice.

Logarithmic and exponential con-

verter circuits are illustrated in
dozens of application books. They all
use a matched pair of transistors to
balance the steady-state temperature
effect. One transistor carries a refer-
ence current and the other supplies
the control current. The ratio of the
two currents is set by the difference
between the transistors’ base voltages.

ERADICATE TEMP EFFECTS

Balancing two transistors still

leaves the temperature having an
effect on the scale factor of the con-
trol voltage. The standard solution is
to use a thermistor as a gain adjust-
ment component. I thought I’d try
something different: fix the tempera-
ture. Some voltage reference chips
incorporate heating elements and
temperature sensors to stabilize their
substrate temperature. Because tran-
sistors make great thermometers and
are good at getting hot, you’ll use a
multiple transistor in a 14-pin DIP
package to do the same job.

Chips such as the CA3046,

CA3127, or ULN2046, which all have
five matched NPN transistors on a
single substrate, give you a transistor
pair to supply the controlled current,
a heater transistor, temperature sens-
ing transistor, and a spare. (Beware,
some multiple transistors consist of
four individual unmatched transistors
molded into a DIP package. These are
not a good buy for this job.)

Because you’re working at low fre-

quencies, you can connect the chip
with long thin wires and bury it in a
block of Styrofoam. This keeps it cozy
without using much power. I built
this part of the circuit as a stand-
alone board because a temperature-
stabilized transistor is a useful build-
ing block for other jobs, such as log
and anti-log converters (see Figure 1).
The 1.5

″

× 1.9

″

board has a 1

″

× 0.8

″

cutout into which a
piece of Styrofoam is
mounted. The
CA3046 sits in the
middle of this with
most of each lead
clipped off. Short
pieces of wire wrap
wire link it to pads at
the edge of the mount-
ing hole. A second
piece of Styrofoam fits
on top of the chip.
The end of the board
carries a dual op-amp.
One half controls the
current through the
reference transistor
and the other controls
the temperature.

The op-amp adjusts the current

through the heater transistor (U2C)
until the emitter base voltage of the
sensing transistor (U2B) equals a pre-
set reference voltage, thereby fixing
the temperature of the chip. A spare
transistor (U2D) limits the heater cur-
rent to 35 mA. Running at 5 to –5 V,
the heater never dissipates more than
350 mW. Luckily, it doesn’t have to.
The chip doesn’t have to be outra-
geously hot to have a stable tempera-
ture, only slightly above the likely
indoor temperature. A good tempera-
ture to aim for is 40°C (104°F). Let’s
face it, when it gets that hot you
won’t perform too well either.

A DUAL-PURPOSE REFERENCE

This is where you kill two birds

with one stone. The current reference
transistor (U2B) and the current
source transistor (U2A) are internally
connected as a differential pair. Their
common emitters are supplied with
current by an op-amp (U1B). One of
the amplifier’s inputs is grounded and
the other is connected to the collector
of U2B. Feedback forces the reference
collector to be zero. So, if you connect
a resistor (R4) from the collector to a
positive reference voltage, you know
what current is flowing through the
collector (1 mA in practice).

Whatever current U2A takes, the

current through U2B is fixed. Because
its base is at ground, the voltage on
the base of U2A is exactly the differ-

Figure 1—

Temperature-stabilizing a multiple transistor package lets it supply

an accurate exponential current from a voltage input. One transistor heats the
chip and another measures its temperature.

Issue 134 September 2001

CIRCUIT CELLAR

www.circuitcellar.com

ential voltage mentioned earlier.
That’s where the control voltage goes
in. After everything has warmed up,
the gain of this input is 62 mV per
decade (~250 mV full scale). Zero
input generates a 1-mA control cur-
rent that is the highest frequency.
Negative inputs lower the frequency.

So, where is the second bird? A

fixed current goes through U2B and
its base is grounded. Its emitter volt-
age, as well as offsetting U2A, gives a
direct measurement of the tempera-
ture of the chip. At 20°C (68°F) its
base emitter voltage is –746 mV. At a
higher temperature, the voltage will
be approximately 2 mV more for each
Celsius degree.

I summed a current from a 2.5-V

reference (Z1) with a current from the
temperature sensor. The amplifier’s
reference input is 0 V. The beauty of
this circuit is that feedback from U1B
stabilizes the sensing transistor’s cur-
rent, therefore loading its emitter
doesn’t matter.

The substrate temperature should

stay within 1° of the temperature you
set. In Figure 1, R5 and R6 set the

temperature. Their exact values don’t
matter as long as their ratio is correct.
You can use any 1% resistors you
have handy. Because transistors vary,
it’s worth measuring the temperature
reference voltage with the heater dis-
connected and connected. The latter
measurement should be about 40 mV
more; if it isn’t, you may have to
change the value of R5 or R6.

I was tempted to use the emitter

base junction of the last spare transis-
tor (U2E) as a temperature-stabilized,
7-V zener diode, but the thought of
the interactions this would produce as
the chip temperature changed scared
me. Instead I used a TL431 2.5-V ref-
erence as Z1. The good news: this is
cheap and readily available. The bad
news: it has a stability problem. A
parallel capacitor near 0.1 µF makes it
oscillate. Use less than 0.01 µF or
more than 5 µF to keep out of trouble.

The –5-V supply must supply up to

40 mA of heater current. This current
flows through a separate pin to the 5-
V supply to avoid offsets. This pin
could be grounded, and the heater cur-
rent would adjust itself.

Selecting the op-amp

took some thought. Often
you can drop in any chip
and a circuit will work but
this isn’t one of those cases.
The outputs of both halves
of the amplifier chip need
to get close to the negative
supply rail. (This rules out
both dual op-amps stocked
by Radio Shack.) You need
a low and stable input off-
set voltage, but bandwidth
isn’t a major consideration.
There are some obscure
chips that will work, but I
settled for the LM358.

This is the dual version

of the quad LM324, which
you can get from Radio
Shack. I use the LM358 as a
default amplifier for non-
critical tasks so I had some
on hand. Its Darlington
input implies a poor input
offset voltage but it seems
to be about 1 mV in prac-

tice. (This chip shows
severe crossover distortion

when its load current changes sign
but this isn’t a concern here.)

The maximum recommended input

current to the ’4046 is 1 mA, so the
control current is 0.1 µA at the low
end of the range. This is getting into
the range where leakage currents and
noise become important, but apart
from slight jitter in the low-frequency
output, I didn’t notice any problems.

SETTING THE FREQUENCY

The raw frequency scale is roughly

0 to –250 mV for a four-decade range.
This is a little small for convenience,
millivolt differences in ground volt-
ages could produce significant fre-
quency changes. The solution is to
connect a 49.9-

Ω

resistor (R1) from

the input to local ground. Now, you
can drive the input from a 0- to –5-
mA current source. Figure 2 shows
the sweep generator, driver, and oscil-
lator. The drive circuit has a voltage
buffer and a series resistor, giving an
input scale of 0 to –2.5 V.

Gain and offset adjustments are

made at the 50-

Ω

control input. One

trimmer changes the series resistance

Figure 2—

The complete sweep oscillator scans a four-decade frequency range under the control of either an external source or

internal ramp generator. The value of the capacitor, C4, selects a range from sub-audio to low RF.

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and another injects an adjustable cur-
rent directly into the 50-

Ω

resistor.

These controls compensate for the
unknowns in the equation that con-
trols the oscillator frequency. You
don’t know the exact values of the
tuning capacitor, the thresholds of the
’4046, or the scale factor of the expo-
nential conversion, so trim them out.

I added jumper plugs that clamp the

ramp to either of its extreme values.
Using these you can set the trimmers
to get high and low frequencies. With
a 4700-pF oscillator capacitor the
trimmers can be set to give a range of
50 Hz to 500 kHz. Plotting the result-
ing voltage/frequency curve on lin/log
paper produces a line that’s straight to
within its own width.

Capacitors for other ranges can be

scaled from these figures. (Use low
tempco foil or mica types, not ceram-
ic ones.) Because of stray capacitance
and the internal delays in the ’4046,
you won’t get as high a frequency as
expected when using a smaller capaci-
tor. For example, a 430-pF capacitor
gave a range of 490 Hz to 3.90 MHz.

One jumper position connects the

driver to an external socket, letting
you set the frequency with a poten-
tiometer or external ramp. With a
fixed input voltage, the square wave
output shows little jitter but its fre-
quency drifts with ambient tempera-
ture. Maybe I should have tempera-
ture-stabilized the whole board.

GETTING THE SWEEP RIGHT

Given an oscilloscope with x out-

put, you can use it as the sweep volt-
age to examine how circuits respond
to a swept frequency. The alternative
is to build a linear ramp generator to
drive the oscillator and scope. I based
mine on the CMOS version of the 555
timer. The output needed is the volt-
age on the timing capacitor, which
goes into the oscillator’s buffer ampli-
fier. Replacing the normal charging
resistor with a current source gives a
linear ramp and you can easily change
its rate by changing the current.

The capacitor voltage in a 555 oscil-

lator swings between lower and upper
thresholds (0.33 and 0.66 of the sup-

ply voltage). When the ramp voltage
reaches the latter, the capacitor is dis-
charged rapidly through a resistor
until its voltage reaches the lower
threshold. Then, it recharges from the
current source, and so on. With a 5-V
supply the resulting ramp runs from
1.667 to 3.333 V, but you need a ramp
from about –2.5 to 0 V.

I wasted some paper sketching gain

and level shifting amplifier stages
before I realized I was answering the
wrong question. The correct question
is not how to adapt the output of the
555 but how to get the 555 to gener-
ate the right ramp in the first place.
Run it between 2.5 and –5 V and it
will generate a –2.5- to 0-V ramp.

Running the 555 from 5 and –5 V is

handier. The pin 5 voltage on the 555
defines the upper peak of the ramp.
Grounding it ensures the ramp peaks
at 0 V. The lowest point of the ramp
is half the negative voltage. I trusted
the stability of the –5-V supply but
you can use a spare op-amp to supply
a well-defined voltage (say, –4 V) if
you want a more stable ramp.

www.circuitcellar.com

CIRCUIT CELLAR

Issue 134 September 2001

Tom Napier is either a digital engi-
neer who sometimes does analog
design or an analog engineer who
sometimes writes firmware. When
he’s not too busy with consulting
work he writes articles.

REFERENCE

[1] A. Tagliavini, “Current sink

widens VCO’s frequency range,”
EDN

, May 24, 1990.

SOURCES

ULN2046
Distributed by: Electronix Express
(800) 972-2225
www.elexp.com

CA3046, CA3127
Intersil Americas Inc.
(321) 724-7000
www.intersil.com

LM324, LM358
National Semiconductor Corp.
(408) 721-5000
www.national.com

74HCT4046
Philips Semiconductor
(408) 991-5207
www.semiconductors.philips.com

TL431
Texas Instruments, Inc.
(800) 336-5236
www.ti.com

How fast you sweep depends on the

output frequency range. You want the
output frequency to stay near enough
a given value to give time for the cir-
cuit under test to respond. So, you
have to sweep slowly when using a
low test frequency or when testing
high Q circuits. At higher frequencies,
sweep fast enough to see a continuous
trace on the scope. I used jumper-
selected resistors to set the charging
current to suit the sweep rate to the
application. These give sweep rates of
one, 10, and 100 sweeps per second.
The 1-µF timing capacitor should be a
stable Mylar or polycarbonate type.

The pulse output from pin 3 of the

555 triggers the oscilloscope sweep.
AC-couple it, because it steps from 5
to –5 V for ~1 ms at the start of each
sweep. This is not TTL-compatible!

OTHER USES

This project started as part of a

wide-range, phase-locked loop, which
was to supply a clock signal that
would lock automatically to an NRZ
data signal having an unknown data

rate. This isn’t as easy as it may
sound. I’ll finish that project when I
find someone who needs it badly
enough to pay for the development.
However, if the current-controlled
oscillator and an unknown digital sig-
nal are fed to the phase detector
inputs of the ’4046, you can learn a
lot about the unknown signal by low-
pass filtering the phase detector out-
put. As you sweep the frequency, the
phase detector will generate all kinds
of humps and bumps, but the big one
will occur only when the input and
output frequencies match.

So, this isn’t a nice neat “build x

and it will do job y” article. I’ve
thrown out some ideas, leaving it up
to you to pick the set you want. This
also should have given you some good
ideas for future projects.

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Issue 134 September 2001

CIRCUIT CELLAR

www.circuitcellar.com

ack in April of

’94, I presented a

sequential record/play-

back project in “Build the

Message Board: An Audio Record/
Playback Unit,” based on the ISD
ChipCorder technology (Circuit
Cellar

45). Then, in 1998, Winbond

Electronics Corp. America (WECA)
acquired Information Storage Devices,
based in Silicon Valley. Winbond was
founded in 1990 as the sales, market-
ing, and design arm for Winbond
Electronics, headquartered in Taiwan.
Winbond embarked upon a strategy of
augmenting its core engineering
expertise by acquiring key technolo-
gies through such acquisitions.

ISD technology uses an analog

(multilevel) flash memory array as
nonvolatile solid-state storage for
high-quality voice reproduction.
Where digital memory can store a one
or zero in each storage cell, the multi-
level cell stores the sampled input
directly without the need for ADCs.
Internal active five-pole filtering is
employed, which leads to exceptional
sound quality. These filters require
fixed sampling rates, which means
that you can’t play tricks by external-
ly clocking the device without also
causing serious quality issues.

However, you will find a few offerings
within a part number, which have
their internal, five-pole filters modi-
fied for a trade-off of increased dura-
tion for a loss of quality. The standard
sampling rate is 8 kHz with a filter
band-pass bandwidth of ~3600 Hz.

The original project allowed the

recording of multiple sequential mes-
sages, which could be played back in
any order by cueing a particular mes-
sage number. This was specifically
designed for those applications that,
after they’re recorded, the device is
used only for playback (e.g., an inter-
active audio museum display).

The chip takes care of keeping track

of sequential audio segments, so the
design used rudimentary interface
controls. Because of the sequential
nature, rerecording of a segment can
cause problems when the new seg-
ment is a bit shorter or longer than
the previous one.

The amount of room between mes-

sages is fixed. If the new sequence is
too short, it leaves a section of the
last message intact and you are left
with two messages in place of the old
one. If the new sequence is too long,
it records over the beginning of the
next message and you are left with a
good new sequence and a missing por-
tion of the next old one.

This project demonstrates how you

can use the memory in a noncontigu-
ous fashion. The best way to show
this is by example. So, this month I
will use the MSP430F1121 micro-
processor to control an ISD4002 and
implement a solid-state audio memo
informant (SAMI) (see Photo 1).

Jeff Bachiochi

Technology That
Improves with Age

Eliminate Senior Moments with SAMI

FROM THE
BENCH

A grow-
ing tech-
nology
in the
quest
for great

voice reproduction,
ISD is self-contained,
versatile, and requires
minimal processing.
Teaming it with a
microprocessor, Jeff
improves his memory.

Photo 1—

SAMI will record and rerecord without wast-

ing precious memory space.

www.circuitcellar.com

CIRCUIT CELLAR

Issue 134 September 2001

Last month I talked about how the

comparator in TI’s MSP430F1121
could be used to measure sensors. I
intend to tie in that operation with
ISD’s solid-state recording unit. But
this isn’t going to happen without a
grasp of the ISD device. My idea was
to first introduce ISD technology via
some other project. I sat for a while
wondering what micro I could use to
help demonstrate ISD technology.
Well, there is no good reason to
change micros midstream. So, at the
risk of confusing last month’s sensor
article with this month’s recorder
project, I’ll ask you to hold that
thought as I continue to use TI’s
micro to demonstrate message man-
agement in ISD4002.

To do this you’ll need a way to keep

track of the messages in the ’4002.
For the most part, the control
between the ’4002 and ’1121 will use
an SPI with the addition of two feed-
back signals. Although SPI reduces
the interconnection count, it requires
commands to be clocked serially
between devices. Figure 1 shows the
MSP430F1121 and support circuitry
and Figure 2 shows the ISD4002 cir-
cuitry. In Figure 1 the microprocessor
converts user input (via push buttons)

into ISD commands. In addition, the
MSP430F1121’s RAM data area keeps
track of the ISD’s memory usage.

First, let’s take a look at the

ISD4002 command structure to get
some insight into how you can keep
track of what’s going on. Figure 2 con-
tains both record and playback cir-

cuitry, including a National LM4861
Boomer 1.1-W power amplifier to
drive an outboard speaker.

ISD SPI CMD

The ’4002 uses a 2-byte (16-bit)

command format to receive instruc-
tions from the host and to return sta-

Figure 2—

I found it necessary to add a power amplifier (LM4861) to drive a speaker with any volume (the piezo device wouldn’t cut it). Although I laid out the PCB for a

microphone jack, I actually wired a small mic element right to the PCB.

Figure 1—

You may disregard C12, R13, and JP3 for now. The MSP430F1121 will monitor the push buttons and

control the ISD4002 via an SPI interface.

Issue 134 September 2001

CIRCUIT CELLAR

www.circuitcellar.com

tus to the host in the form of a 5-bit
op-code and 11-bit address (10 bits
used by the ’4002 device). Refer to
Figure 3 to see the message formats
used from the host (master out, slave
in) to the ISD and the ISD to the host
(master in, slave out).

Other ISD devices use similar 2- or

3-byte command formats. Although a
command transfer sequence begins
with the lowering of the slave select
(SS), the data left in place when the SS
is brought high is what is used as the
new command. This allows com-
mands (which have lower “don’t care”
bits) to be clocked into the ISD device
with fewer than 16 clock cycles (i.e.,
minimum of 4 bits for the STOPP-
WRDN). The commands in Table 1
give a clearer picture.

Data enters the ISD device in an

LSB first format. At the same time,
status of the last command is clocked
out LSB first. Besides the OVF and
EOM status (first two bits), the fol-
lowing 10 bits will be the address of
the last used address plus one (and a
few leftover 0 bits).

What do the 10 address bits mean?

STORAGE ARRAY

Simply put, the address bits pertain

to the rows of the nonvolatile storage
array in the ’4002. Although 10 bits is
1024, there are in fact only 600 rows
in the array (the last is numbered 599,
or, if you prefer, 10 0101 0111). Each
of the 600 rows represents approxi-
mately 200 ms (based on an 8-kHz
sampling rate). At the 8-kHz sample

rate of 125 µs/sample, there’s room
for 1600 samples (200 ms/125 µs);
1600 columns times 600 rows is 960k
array cells. Although it’s possible to
individually access all of the rows,
having messages with a minimun
length of 200 ms is impractical. I’m
going to use the rows in blocks of
eight by using only the most signifi-
cant seven bits of the 10-bit address
0000000xxx–1001010xxx (and note,
that’s up to 75 blocks, or messages).
Each block will be 200 ms/row times
8 rows/block, or 1.6 s/block of record
time. Now remember, that’s the mini-
mum and incremental amount of
time any message will consume.

In order to keep track of what is

and isn’t used, you’ll need table space.
The ’F1121 micro has 256 bytes of
RAM. Using 2 bytes/block will
require 150 bytes of RAM for the
table (see Table 2).

The first block, block 0, will always

be the starting point for all opera-
tions. When a block is used, bit 15
will be set to one. If it’s the last block
used in a message, bit 7 will be set to

MOSI

OVF EOM

MISO

Master out, slave in

Master in, slave out

Figure 3—

Not all commands sent by the master (top row) need an address.

one. If bit 7 is not set, then a link to
the next block will be stored in bits 0
through 6. A group of linked blocks is
called a message. The block pointed
to (next link) also will have a back-
wards link stored in bits 8 through
14, which points back to where it
came from (previous link). The to and
from links allow the chain of blocks
to be followed in either direction.
With this format, the sequence of the
links do not have to stay in any par-
ticular order (this is an important
concept for this application). It is sim-
ilar to how files may be stored on
nonsequential sectors or tracks of a
diskette. This is necessary for effi-
cient use of reclaimed blocks as mes-
sages are eliminated.

This management approach isn’t

necessary when using the ISD4002 in
its normal sequential mode. The
’4002 keeps track of sequential
recordings by auto-incrementing
internal pointers. This works well for
applications that need the random
playback of prerecorded messages, but
fails when there is a need for constant

www.circuitcellar.com

CIRCUIT CELLAR

Issue 134 September 2001

elimination and addition of new
messages. SAMI is designed to
add a constant supply of new
messages as old ones are elimi-
nated. (That’s assuming you
actually get some of the mes-
sage tasks accomplished.) In
order to reclaim memory freed
by eliminated messages, you
need to take over the task of
where the messages are placed
within the ’4002.

ESSENTIAL ROUTINES

Only a small number of routines

are necessary to accomplish the man-
agement of the message memory
blocks. Each block has its associated
entry in the micro’s table. To add an
audio message to the ISD4002, the
first thing you need to find is an 0FFh
stored in the low byte of a table entry.
The low byte indicates the last mes-
sage in the table. The

Record function

uses a routine to search the table
(starting at offset 0) and locate the last
message. The

Forward_One routine

accesses the table (at a given offset

parameter) and follows that entry’s
link, returning with a pointer to and
the data of the next linked table
entry. The

Record function continues

calling

Forward_One until the last mes-

sage has been located.

After a reset, the table is initialized

with a single entry at table offset 0 of
FFFF, and the remaining table entries
are cleared. This is special data. The
address in the first seven bits of this
byte is illegal in that it is greater than
the number of legal table entries (it
indicates the last table entry).

200h to 22fh
0200h: FFFF 0000 0000 0000 0000 0000 0000 0000
0210h: 0000 0000 0000 0000 0000 0000 0000 0000
0220h: 0000 0000 0000 0000 0000 0000 0000 0000

Let’s see how recording a few messages uses the memory:

Press Record (the LED lights)
Say, “Pick up a gallon of low-fat milk and a loaf of Italian bread.”
Press Record (the LED goes off)
Press Record (the LED lights)
Say, “Get new washers to stop the kitchen sink from dripping.”
Press Record (the LED goes off)
Press Record (the LED lights)
Say, “Kris needs poster board for his school project.”
Press Record (the LED goes off)

Figure 4—

Without a recorded message, the RAM looks like

this. After recording a few messages, check out how the ROM
has changed in Figure 5.

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from the ISD4002 clocks high and low
once during the recording of each row.
The cycle is 200 ms/row. When the
ISD4002 is storing the last of the
eight rows, the

Record routine needs

to go back to the table and find the
next free block, link it into the chain,
and then send another

SETREC address

command before it finishes the row.
This provides a seamless jump to
another block of memory, and not
necessarily the next sequential one.
Figure 4 shows how the RAM looks
after initialization.

Figure 5 shows the same RAM after

a few messages have been recorded.
Now you can see that the first table
offset links to the second table offset,
and the second to the third, and so on.
The seventh table offset has bit 7 set

to indicate the end of the first mes-
sage. The second message continues
up to offset 11. Finally, the third task
is linked up through offset 17, the
final entry. Here’s where things begin
to get interesting. At this point,
you’re at the hardware store purchas-

entry is replaced with the 7-bit
address of the last message table entry
linked from (with bit 15 set).

Whew! You’ve just created a new

link in the chain. The

Record routine

can now send a

SETREC command to

the ISD4002 using the new block’s
table offset as the address. But first, it
must be rotated left three times to
multiply it by eight.

The ISD4002 will use this as the

actual row address at which it will
begin storing audio samples.
Remember, you are treating a block as
eight sequential rows of memory, so
the least significant three bits are
zeros. When the ’4002 finishes filling
a row with sampled data, it will auto-
increment the row pointer until you
tell it to do otherwise with another
command (

SETREC).

Here’s where the timing gets criti-

cal but not too tight. You want the
ISD4002 to continue auto-increment-
ing the row address until it is using
the last of the eight rows of the block.
The row address clock (RAC) output

Issue 134 September 2001

CIRCUIT CELLAR

www.circuitcellar.com

The next step is to determine if

there is any unused memory in the
device to use for the new audio mes-
sage entry. The

Record function calls

the second routine,

Find_Unused,

which does not require any entry
parameters. It always searches the
table starting at block 0 (and proceeds
sequentially, not using the links) to
find the first empty table entry. If the
MSB (15) of the table’s entry data is a
zero, then the block is free for use.

So, we know where the last record

ends and where a new record can
begin. The third routine,

Add_Link,

adds the free block to the linked
chain of used blocks. This is done by
transferring the low byte of the last
message table entry (in this case,
0FFh) into the low byte of the free
block’s table entry.

Then, the low byte of the last mes-

sage table entry is replaced with the
7-bit address of the free block’s table
offset being linked to (with bit 7
cleared). And for the last step, the
upper byte of the free block’s table

200h to 22fh
0200h: FF81 8002 8103 8204 8305 8406 8587 8608
0210h: 8709 880A 890B 8A8C 8B0D 8C0E 8D0F 8E10
0220h: 8F11 90FF 0000 0000 0000 0000 0000 0000

Press Play (the LED lights)
Hear, “Pick up a gallon of low-fat milk and a loaf of Italian bread.”
Press Play (the LED goes off)
Press Next (the LED lights briefly, skipping to the start of the next message)
Press Play (the LED lights)
Hear, “Get new washers to stop the kitchen sink from dripping.”
Press Play (the LED goes off)

next message)

Press Erase (the LED lights briefly, erasing the present message and skipping to the start of the

Figure 5—

When

three messages are
recorded, the second
message is erased,
as shown in this
RAM table.

Figure 6—

Take a look at how the RAM is freed. The

second message is erased and a new message is
recorded.

Command

Opcode and address

Operational summary

RUN

P/R

IAB

AIO

POWERUP

xxxxxxxxx

Powerup and get ready for command

SETPLAY

1 1

<A9–A0>

Set play pointer to address <A9–A0>

PLAY

xxxxxxxxx

Play from pointer to EOM or OVF

SETREC

1 0

<A9–A0>

Set record pointer to address <A9–A0>

REC

xxxxxxxxx

Record from pointer to OVF

SETMC

<A9–A0>

Set cue pointer to address <A9–A0>

xxxxxxxxx

Move from pointer to EOM or OVF

STOP

xxxxxxxxx

Stop current operation

STOPPWRDN

xxxxxxxxx

Stop current operation and enter standby

RINT

xxxxxxxxx

Read interrupt status bits OVF and EOM

IAB: 1 = Ignore, 0 = use <A9–A0>
PU: 1 = Powerup, 0 = power down
MC: 1 = Cueing, 0 = no cueing
P/R: 1 = Play, 0 = record
Run: 1 = Start, 0 = stop

Table 1—

Only commands that actually change the address pointer within the ISD4002 need a valid address.

200h to 22fh
0200h: FF81 8002 8103 820A 8305 8406 858C 0000
0210h: 0000 0000 0000 0000 850D 8C0E 8D0F 8E10
0220h: 8F11 90FF 0000 0000 0000 0000 0000 0000

Press Record (the LED lights)
Say, “Remember to pick up stamps at the grocery store.”
Press Record (the LED goes off)

Issue 134 September 2001

CIRCUIT CELLAR

www.circuitcellar.com

SOURCES

ISD4002 ChipCorder
Winbond Electronics Corp. America
(800) 677-0769
(408) 943-6666
Fax: (408) 544-1789
www.isd.com

MSP430F1121 mixed signal micro-
controller
Texas Instruments Inc.
(800) 336-5236
Fax: (972) 995-4360
www.ti.com

LM4861 amplifier
National Semiconductor Corp.
(408) 721-5000
Fax: (408) 739-9803
www.national.com

ing a few washers to fix the leaky
faucet and you want to get rid of the
appropriate message.

A look at the RAM shows the link

broken between the first and second
message at table offsets 7 and 8. In
fact, the first message now links to
the third message located at offset 12.
Message two has been eliminated
(zeroed out) as illustrated in Figure 6.
But wait, suddenly you recall that you
just finished making out the monthly
bills. If you could only remember to
get stamps when you head out to the
grocery store, you could still get the
bills out on time.

Notice that the new message gets

added at the end of any previous mes-
sages. It links from the end of the
original message (message three, now
message two) to the newest message
filling in the free space leftover from
the elimination of the original mes-
sage two. Notice that the new mes-
sage didn’t fit into the space released
by the original message two, and so it
seamlessly continues with a link from
table offset entry 11 to table offset
entry 18. Figure 7 offers a clear pic-
ture of this process.

COMMANDEERING STAND-
ALONE OPERATION

As a self-contained, stand-alone

product, ISD solid-state recorders are
easy to use. They are remarkably ver-
satile when it comes to controlling
operations through a micro. ISD
devices have many built-in functions
that allow them to handle most of the
technical issues involved with keep-

ing track of multiple sequential mes-
sages. However, an ISD device
cannnot efficiently manage memory
in an application where messages will
be continuously added and removed.

To accomplish this task, the

attached micro must serve as an
external memory manager to the ISD
solid-state recorder. Only minimal
processing is required to handle this
task. A micro like TI’s MSP430F1121
is an ideal match for controlling the
ISD4002. All components, including
an audio amplifier, run on 3 VDC.
This fact reduces power supply
requirements and allows quiescent
currents in the microamp range for
extended battery life.

Block 0

111 1111

Block x

Pointer to previous block # <A9–A3>

Pointer to next block # <A9–A3>

Block 50

Pointer to previous block # <A9–A3>

Pointer to next block # <A9–A3>

Block x

Pointer to previous block # <A9–A3>

Pointer to next block # <A9–A3>

Block 74

Pointer to previous block # <A9–A3>

Pointer to next block # <A9–A3>

Column 2: 1 = in use, 0 = free
Column 4: 1 = last, 0 = linked

Table 2—

The 75 blocks of memory each use a 16-bit table entry. Searches always begin with block zero.

Figure 7—

The new message has used not only the

space of the original message two, but also jumped
over and ends after message three.

200h to 22fh
0200h: FF81 8002 8103 8204 8305 8406 858C 9108
0210h: 8709 880A 890B 8A12 860D 8C0E 8D0F 8E10
0220h: 8F11 9087 8BFF 0000 0000 0000 0000 0000

SOFTWARE

The example code is available on
the Circuit Cellar web site.

Jeff Bachiochi (pronounced BAH-key-
AH-key) is an electrical engineer on
Circuit Cellar’s engineering staff. His
background includes product design
and manufacturing. He may be
reached at jeff.bachiochi@circuitcel-
lar.com.

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n Bluetooth:

Connect Without

Cables

, coauthors

Jennifer Bray and

Charles Sturman predict imminent
success: “Bluetooth is set to be the
fastest growing technology since the
Internet or the cell phone, with fore-
casts of 200M devices shipped in 2001
and a total component market of $1
billion in the same year.” [1]

As I write this, it’s mid 2001 and I

notice the local electronics stores’
shelves are completely devoid of
Bluetooth gear. Even if some BT stuff
hits the streets in time for the
Christmas sales, 200M units aren’t
going to happen.

Furthermore, you don’t need to

have an MBA to figure out that $1 bil-
lion of component sales across
200M units implies a $5 price tag.
Maybe if that was true, they could
move them out like hotcakes, but
it isn’t, so they won’t.

Photo 1—

Hmm, how do I add

Bluetooth to an existing product?
With no wires to bother with,
Bluetooth packaging options
abound, including clever schemes
such as hiding it in the battery.

Issue 134 September 2001

CIRCUIT CELLAR

www.circuitcellar.com

I don’t mean to be overly harsh.

Actually, Bluetooth: Connect Without
Cables

was helpful and an easier read

than the 1000-plus-page official speci-
fication. And, it’s not as if “too much,
too soon” rosy marketing forecasts
are uncommon in the high-tech biz.

I believe we are indeed headed

towards the “wirelessly-wired” future
envisioned for Bluetooth. It’s just that
it won’t happen overnight and the
path from here to there will be rocky.
There are, to put it politely, a few
concerns to deal with. The technical
effort is easy to underestimate, only
becoming apparent as you get well
into the specification and contem-
plate the full scope of the challenge.

Although you can count on the

march of silicon to deliver the tech-
nology, there are a plethora of busi-
ness-related issues as well. For
instance, the degree and timing of
support for Bluetooth by Microsoft
remains an item of discussion.

Then there’s the spectrum conges-

tion issue. Bluetooth uses the unli-
censed industrial, scientific, medicine
(ISM) band centered around 2.4 GHz,
fulfilling the promise of worldwide
compatibility. However, some coun-
tries (e.g., France, Spain, and Japan)
don’t ante up as much free spectrum
as others. It’s not as if they’ll seize
your Bluetooth gadgets at the border,
but they do require that the technolo-
gy be geographically savvy to accom-
modate the differences.

Don’t break out the microwave pop-

corn to celebrate just yet. The price
paid for ISM “unregulation” is that
the 2.4-GHz neighborhood is a tough
place to live, with noisy neighbors
like portable phones, 802.11b (wire-
less Ethernet) installations, and

SILICON
UPDATE

Tom Cantrell

Bluetruth

Despite
the bare
shelves,
Tom sees
Bluetooth

leading us toward a
“wirelessly-wired”
future. The road might
be bumpy, but defi-
nitely worth the trip.
So, it’s time to start
planning your new
clever applications.

Houston, We Have a Problem…

www.circuitcellar.com

CIRCUIT CELLAR

Issue 134 September 2001

is about as open as they
come. The deal is sim-
ple—a barter-like arrange-
ment where adopters get
and grant free access to
any relevant patents or
proprietary IP that ends
up in Bluetooth. The
other aspect of the SIG
that’s for the good of all is
that adopters are required
to complete a formal
Bluetooth qualification
program. By now, if
there’s one thing everyone
has learned, it’s that pre-
mature rollout of a bunch
of flaky and incompatible
gear would be a disaster.

RADIO ACTIVE

Every networking standard starts

with the wire (i.e., the lowest physical
layer responsible for getting a bit from
here to there). Of course, in the case
of Bluetooth, we’re talking about the
“unwire” (i.e., radio).

As I mentioned earlier, Bluetooth

uses the ISM band situated from
2.4000 to 2.4835 GHz. The primary
virtue is that the band is more or less
available and regulations are some-
what standardized on a worldwide
basis. Yes, there are caveats (e.g., ISM
band is currently restricted to 2.4465
to 2.4835 GHz in France), but the SIG
continues to push for global harmony.
Keeping in mind that it’s kind of like
the high-tech equivalent of the
United Nations, I’d say they’ve done a
good job so far. Furthermore, when
Bluetooth starts rolling, the ball will
increasingly be in the holdout’s courts
to change their regulations and other-
wise take action to get on board the
train or get left behind.

The de facto standard arrangement

(in the U.S. and most of Europe)
guard-bands the available 83.5 MHz a
bit and then divides the remainder
into 79 equally spaced 1-MHz chan-
nels (i.e., the channel frequency is
defined as 2.402 plus the channel
number in megahertz). Modulation is
simple FSK, in which positive and
negative deviations (on the order of
150 kHz) from the carrier frequency
define a one and zero, respectively.

Eliminating (literally) rough edges,

the scheme employs a Gaussian filter
(i.e., GFSK) that makes the frequency
ramp rather than jump between one
to zero and zero to one transitions.
This helps to maintain continuous
phase of the carrier frequency and
reduces spectral emissions.

With GFSK coding one bit per sym-

bol and 1-MHz channel capacity, that
makes the raw throughput available
at 1 Mbps. However, as I will explain
later in the article, protocol overhead
decreases the capacity somewhat

depending on the particular mix
and match of features.

As I said, the ISM band is

already crowded and noisy, and
the problem will only get worse
as wireless gadgets proliferate.
The solution adopted by
Bluetooth (in fact, mandated by
ISM band regulation) is frequency
hopping. As an aside, every time I
write about frequency hopping, I
like to note that it was invented

even that mainstay of modern life,
microwave ovens contributing to the
din (see Figure 1). [2]

Under the logic of litigation that

prevails these days, unless you can
prove that something is safe, it must
be unsafe. Witnessing the brouhaha
over cell phones, I have no doubt that
the lawyers will be monitoring the
situation closely as Bluetooth turns
folks into walking radio stations.

Nevertheless, the Bluetooth die has

been cast, so there’s nothing to do but
press on. But first, let me share a little
bit of background information.

THE INVISIBLE WIRE

For those of you who aren’t up on

your 10th Century European history,
Harald Blatand (aka, Bluetooth) was a
king who united Norway and
Denmark in the Viking era. Get it?
The idea behind the name is that
Bluetooth will unite the world of
PDAs, PCs, and everything else under
one wireless standard. Then we’ll all
live happily ever after. I imagine
things will turn out better than they
did for poor Harald, who ended up
taking an arrow in the back in 987.

Flash forward to 1994 when Euro-

phone giant Ericsson began studying
the wireless alternative options for
connecting mobile phones and acces-
sories. Lost in much of the hoopla is
the fact that simple point-to-point
Bluetooth wireless headsets will be
the early market driver (see Photo 1).

Subsequently, in ’98 Ericsson and

other key proponents including Intel,
IBM, Toshiba, and Nokia established
a global special interest group (SIG)
and invited other adopters to join.

In an era of dime-a-dozen, one-night

SIGs, the Bluetooth brigade has done
a remarkable job. Right there on the
Bluetooth home page, they keep a
running counter that, as I write
this article, shows a whopping
2491 adopters signed on so far.
Although Bluetooth faces a num-
ber of market and technical chal-
lenges, the brute force of the cor-
porate horsepower being brought
to bear will eventually prevail.

No doubt the main reason for

the success of the program is that,
as far as standards go, Bluetooth

Figure 1—

Actual measurements (see References) illustrate interference

generated by a microwave oven. Bluetooth and other ISM band gear
must be designed to peacefully coexist in a noisy environment.

2445 MHz

2452 MHz

2459 MHz

2466 MHz

# RES BW 10 kHz
# VBW 10 kHz
# SWP 15.0 s

Peak 10 dB/div

2.41 GHz

2.48 GHz

Frequency

f(k)

625 µs

f(k + 1)

f(k + 2)

f(k + 3)

f(k + 4)

f(k +5)

f(k)

f(k + 3)

f(k + 4)

f(k + 5)

f(k)

f(k + 5)

f(k + 6)

Figure 2—

Immunity to interference and security both are enhanced

by spread-spectrum techniques. Bluetooth changes frequencies for
each packet transferred (i.e., up to 1600 times per second).

nal is getting weaker, the receiver can
ask the transmitter to boost the
power before it fades altogether.

At initial glance, the short-range

may seem limiting. Furthermore, the
basic so-called piconet consists of a
master and only up to seven slaves
(see Figure 3). Although a slave can
have only one master, note that the
definition of whether a particular
device is a master or slave is dynamic.
This gives rise to the scatternet
option in which piconets are joined by
switch-hitting devices that are alter-
nately master of their own piconet
and slave in another.

A 10-m, eight-device setup won’t

challenge the role of traditional
LANs. It may be tempting to compare
Bluetooth to something like 802.11b
(wireless Ethernet), but philosophical-
ly and pragmatically it’s like compar-
ing the proverbial apples to oranges.

The fundamental difference is that

Bluetooth is designed to handle ad
hoc network configurations. Unlike a
LAN, where devices are installed and
all the addresses and capabilities are

known, a Bluetooth network will con-
stantly change, adding and removing
members behind the scenes without
user intervention.

Consider the prototypical future

where everyone’s carrying around
Bluetooth laptops, phones, PDAs, and
even key fobs. The scheme has to tol-
erate all manner of abuse, such as a
bunch of techno junkies crammed
into an elevator. In this case, the
short range (and taking advantage of
the RSSI) is, in fact, a feature that
helps keep the situation from devolv-
ing into an electronic shouting match.

TIMING IS EVERYTHING

With all the hopping going on, it’s

clear that timing plays a critical role,
starting with the basic clock refer-
ence, which requires 20-ppm accuracy
for the life of the product under all
environmental conditions.
Fortunately, this is well within the
capability of modern crystals and, in
fact, Bluetooth can take advantage of
timing circuits developed for widely
used GSM cell phones.

However, even accurately clocked

devices will inexorably drift apart
over time, so Bluetooth uses addition-
al clocks derived from the timebase
and slaves re-synchonize to the mas-
ter each time it sends a packet, even
if destined for another slave. An accu-
rate crystal and limited (five-slot)
packet size make clock extraction

Type

Payload header

User payload

FEC

CRC

Symmetric max Asymmetric max

(bytes)

rate (kbps)

Forward

Reverse

DM1

0–17

2/3

Yes

108.8

DH1

0–27

Yes

172.8

DM3

0–121

2/3

Yes

258.1

387.2

54.4

DH3

0–183

Yes

390.4

585.6

86.4

DM5

0–224

2/3

Yes

286.7

477.8

36.3

DH5

0–339

Yes

433.9

723.2

57.6

AUX1

0–29

185.6

N/A

NULL

N/A

POLL

N/A

FHS

N/A

2/3

yes

N/A

HV1

N/A

1/3

64.0

N/A

HV2

N/A

2/3

64.0

N/A

HV3

N/A

64.0

N/A

DV*

1 D

10 + (0–9) D

2/3 D

Yes D 64.0 + 57.6 D

N/A

* Items followed by D relate to data field only.

Issue 134 September 2001

CIRCUIT CELLAR

www.circuitcellar.com

during World War II by actress Hedy
Lamarr. Surely this is one of the more
unique bits of high-tech trivia.

Here’s how it works. Bluetooth

carves up the bandwidth into 1600
slots/s (i.e., each slot is 625-µs long).
Moving up the hierarchy, the basic
Bluetooth packet consists of one to
five slots, although certain special
operations utilize half-slot packets.
The frequency can hop each slot, but
remains fixed during multi-slot pack-
ets, catching up by skipping the
appropriate number of channels at the
next packet boundary (see Figure 2).

The obvious danger is the possibili-

ty that different pairs of communicat-
ing devices end up hopping to the
same tune (i.e., on the same channel
at the same time). To prevent such
overlap, the hop sequence is deter-
mined by various device-specific char-
acteristics, most notably the unique
48-bit ID assigned to each and every
Bluetooth device. To further enhance
robustness, numerous methods of
error checking, correction, and recov-
ery are incorporated.

SHORT WAVE

Bluetooth defines three classes of

radio power—1, 2.5, and 100 mW. The
range is roughly from 10 m (1 mW) to
100 m (100 mW), with the under-
standing that environmental factors,
orientation, and antenna effectiveness
mean your mileage may vary.

Given the infinite demand for gadg-

ets that are smaller, lighter, cheaper,
and don’t need to be recharged all the
time, well-behaved designs will take
advantage of Bluetooth’s power-reduc-
tion features. At the least, receivers
should monitor the RF section receive
signal strength indication (RSSI). If
the received signal is stronger than
necessary, the receiver can send a
message to the transmitter to reduce
transmit power. Conversely, if the sig-

Master

Slave

Figure 3—

The smallest Bluetooth

configuration is a point-to-point link
between a single master and slave,
such as a mobile phone headset. A
piconet combines one master with
up to seven slaves, and a scatternet
consists of a group of piconets.

Table 1—

The various packet types supported by Bluetooth vary in type (SCO or ACL), number of slots, and type

and degree of error detection and correction.

www.circuitcellar.com

CIRCUIT CELLAR

Issue 134 September 2001

easier and tolerant of some slop. For
example, in addition to the typical
PLL approach of continuous adjust-
ment, another possibility is to extract
the timing based on the first few bits
of the known packet preamble.

The first of the derived clocks is

known as CLKN. Each Bluetooth
device has a 28-bit counter that runs
freely, incrementing every half slot
(i.e., 312.5 µs). Slave devices synchro-
nize to the master’s timing by adding
an offset to their own CLKN, produc-
ing a second clock (CLK) that reflects
the master’s timing. Another clock,
CLKE, which is the master’s estimate
of the slave’s CLK, is needed only
before a slave synchronizes.

MISSING LINK

So far so good, but there is a “who’s

on first” kind of gotcha. Devices have
to communicate in order to get in
sync, but how do they synchronize in
order to communicate initially?

Link setup involves special inquiry

and paging packets and procedures
designed specifically for that purpose.
Inquiry is the process of discovering
what other Bluetooth devices are
around, establishing synchronization
with them and discovering what serv-
ices they have to offer. When a device
is discovered by inquiry, it can be
paged (i.e., asked to establish a link
for subsequent communication).
Meanwhile, devices that are willing
to communicate perform what is
known as inquiry and page scanning
(i.e., listening for inquiry and page
requests). The challenge is getting on
the same wavelength. If an inquiry or
page is sent on channel x, but the
inquiry or page scanner is listening on
channel y, nothing is going to happen.

To hasten the search, page and

inquiry packets use a fast-hopping
sequence that cycles through the
channels quickly (hops every half
slot). Meanwhile, page and inquiry
scanners hop slowly (about once per
second). Thus, it shouldn’t take long
for inquirers and pagers to achieve a
hit (frequency match) with all scan-
ning devices in range.

But what if two scanners get hit at

the same time and both try to
respond? To avoid this possibility,

scanners don’t respond at the first
inquiry, but rather wait for a random
back-off interval and then re-enter the
scanning state. Thus, inquiry needs to
continue for longer than the maxi-
mum back-off interval to make sure
all scanners have a chance to respond.

When basic communication is

established, Bluetooth supports two
primary types of links, asynchronous
connection-less (ACL) and synchro-
nous connection-oriented (SCO).
These naturally align with data and
voice connections.

SCO links feature scheduled trans-

fer with guaranteed bandwidth.
Because repeatable timing is more
important than accuracy, SCO pack-
ets rely on forward error correction
only and are never retransmitted.

Conversely, ACL links use

whichever bandwidth is left on an as
available basis. Because delivery is
only ASAP rather than subject to the
hard deadlines of an SCO link, error
detection (i.e., CRC) and retransmis-
sion are allowed for ACL packets.

Under the hood, it may seem com-

plicated with dozens of packet types
defined (see Tables 1 through 3). But
actually the difference simply boils
down to permutations of just three
factors—ACL versus SCO, packet
length (i.e., one, three, or five slots),
and a desired trade-off between
robustness and throughput (i.e., more
bytes for error correction versus more
bytes for payload).

When not otherwise occupied, links

can be put into various states of sus-
pension to reduce power, including
Hold, Sniff, Park, and Standby. Much
like the various power-saving Sleep
modes found on micros, these allow a
trade-off between the amount of
power required (i.e., how often the
device turns on its radio) and how fast
the device can wake up and get back
online and in sync.

RACKS OF STACKS

So far, I’ve discovered how devices

establish basic communication, but
that’s just the beginning. The base-
band and link layers are only a small
part of the story, as you can see in
Figure 4. Sitting between the radio
and an application is a veritable

alphabet soup of protocols and inter-
faces. In fact, it’s these higher-layer
protocols and such that make up the
bulk of the Bluetooth specification.

It might be tempting to just offer up

the basic radio link and let the mar-
ket have at it. But, I believe the devel-
opers were wise to go ahead and bite
the bullet up front and get it all down
on paper. It’s critical that application
developers have both a clear road map
and set of rules to follow to avoid a
chaotic mishmash of incompatible
home-brewed hacks.

I suspect the developers may have

learned from the experience with
IrDA, the ostensible infrared wireless
standard. It’s true that many gadgets
have the little LEDs, but I don’t think
the technology has lived up to its
potential. After all, within the line of
sight constraint, IrDA could, in prin-
ciple, do many of the wondrous things
anticipated of Bluetooth.

In hindsight, the IrDA experience

becomes a cautionary tale. Originally,
the specification was released in a
form that was little more than getting

Application MMI

Application layer

Host protocols layer

Baseband layer

Headset application

Access

Control

Data application

Generic

RS-232 Transport layer

UART Transport layer

Protocol interface

SDP

RFCOMM

L2CAP

Host controller interface

Link controller / link

Baseband controller

Radio

Figure 4—

The physical (radio) and link (baseband)

layers of the Bluetooth protocol stack are topped by a
variety of higher-level protocols and profiles.

a byte from here to there (i.e., the
physical layer). Unfortunately, that
left application developers hanging in
the breeze, having to face the prospect
of developing their own protocols,
which would only work with their
own applications. Subsequently, IrDA
proponents did work to retro-codify
higher-layer functions, but the delay
and confusion didn’t help acceptance.
Of course, IrDA’s loss will be
Bluetooth’s gain.

Moving up the ladder, other key

components of the Bluetooth stack
include the Host Control Interface
(HCI), which provides a uniform
mechanism for accessing Bluetooth
hardware capabilities. HCI not only
covers issuing commands and moni-
toring events, but also defines three
host interfaces (HCI transport layers)
including USB, RS-232 (serial with
error correction), and UART (serial
without error correction).

The Logical Link Control and

Adaptation protocol offers applica-
tion-friendly interface to the lower
link layers. For instance, much as
Internet Protocol (IP) allows you to
run multiple logical connections (e.g.,
e-mail, browser, FTP) over a single
modem, L2CAP allows multiplexing
multiple higher-level protocols onto a
single link. Other services offered by
L2CAP include segmentation and re-
assembly of larger packets and hooks
for quality of service (QoS).

The Service Discovery protocol, as

the title implies, provides a mecha-
nism for Bluetooth devices to
exchange information about desired
or offered services. The Bluetooth
specification defines major services

such as audio, cell phone, PDA, and
so forth. In addition, the specification
leaves room for suppliers to define
their own additional services.

The RF Communications protocol

(RFCOMM) turns a Bluetooth radio
link into a virtual (or real, if a UART
is provided) serial port. For example,
RFCOMM includes a way to set and
interrogate modem control signals
like RTS, DTR, DCD, and so forth.
The convenient thing about
RFCOMM is that it allows existing
applications that talk over serial ports
to easily go wireless.

The specification goes even further

into the clouds with higher-layer pro-
tocols including the semi-controver-
sial Wireless Application Protocol
(WAP), which is kind of like IP and
HTML, but used for devices with lim-
ited bandwidth, small screens, and
limited data entry options. Then
there is the Telephony Control
Specification protocol (TCS), which
makes a Bluetooth gadget act like a
phone, Object Exchange protocol
(OBEX), which pushes and pulls data,
ironically lifted from the IRDA spec,
a bunch of security stuff, and the list
of protocols and profiles goes on.

The point is that it’ll take far more

than hanging an antenna on a device
to qualify it as Bluetooth-capable.
However, the benefit of everyone
having access to a full stock of stan-
dard features and functions easily jus-
tifies the extra up-front effort.

SILICON ANYONE?

As you can see, there’s no easy

shortcut to wireless nirvana. The
Bluetooth folks have done an

admirable job with the specification
and setting up the SIG, but there’s
still plenty of work for you to do get-
ting Bluetooth products designed-in
and on the market.

They say the longest journey starts

with the first chip. Reviewing the
long list of suppliers on the Bluetooth
site, it seems as if most major players
(e.g., TI, Motorola, Philips, Atmel,
and Infineon) are on the bandwagon.
In addition, as is typically the case
whenever a major new standard hits
the street, there are new startups,
such as Zeevo and Transilica, step-
ping up to the plate as well.

I happen to have the specifications

in hand for one of the first chips off
the starting line, the MTC-60110
from Alcatel. This chip is a good
example of the breed, highlighting the
design strategy and features adopted
by many suppliers.

Keep in mind, the block diagram for

the MTC-60110 is a tad understated
(see Figure 5). Under the hood we’re
talking about an ARM7 core with
0.25 MB of flash memory and 48 KB
of RAM. And that’s just for starters.
Software up to the HCI level (i.e., all
the complicated baseband and link
stuff described earlier, and more) is
included, as well.

The UART can handle the link

transport connection with the host
and an SPI port allows easy, yet
speedy (up to 6.5-MHz full-duplex)
peripheral connection. Support for
boot-loading the on-chip flash memo-
ry also is provided by the UART.

For voice applications (for example,

a headset), there’s a CODEC interface
that can handle the three 64-Kbps

Issue 134 September 2001

CIRCUIT CELLAR

www.circuitcellar.com

Figure 5—

No RF know-how

required. With the radio (and even a
version with the antenna) built in,
Alcatel’s MTC-60110 is the “Bluetooth
for dummies” solution.

VSS I/O <3>

RFVSS <2>

RF1

RF2

RFTESTIN <4>

RFTESTOUT <4>

AVDD <8>

AVSS <6>

TESTEN1 TESTEN2

JTAG <5>

VDD I/O <3>

DVDD <6>

RESET

DVSS <6>

UART <4>

GPIO <6>

SPI <7>

VOICE <9>

13 MHz

32 kHz

Processor

Microprocessor

RAM

Flash

memory

XTAL

VOICE

GPIO

UART

SPI

BOOTROM

Impedance
adaptation

www.circuitcellar.com

CIRCUIT CELLAR

Issue 134 September 2001

channels of PCM audio (i.e., SCO
links) specifically stated in the
Bluetooth specification.

Lastly, and definitely best of all, the

radio (1-mW) is completely built-in,
and there’s even a version with an on-
chip antenna! You simply add a cou-
ple crystals (13 MHz, 32 kHz) and
you’re on the air.

Not so fast, though. You still need

to come up with the higher layers of
the stack (L2CAP, RFCOMM, etc.).
You might need some debug gear
(see Photo 2) along the way, too.
Fortunately, included in those

2491adopters are plenty of outfits able
and willing to sell you the bits you need.

WORLD BEYOND WIRE

No, it won’t be easy (or cheap) to

incorporate Bluetooth in your design
at first. There will be an awkward
rollout phase accompanied by more
than a bit of head scratching and
you’ll feel a little lonely if you’re the
first on your block. Nevertheless, the
wireless imperative, not to mention
the interests and resources of the
backers, is compelling.

Even if you’re not designing wire-

less phones or PDAs and such, I think
Bluetooth will affect a lot of your
applications in unanticipated ways.
Heck, who’d have thought that engi-
neers designing cars, vending
machines, and data loggers would
need to know about Internet proto-
cols? Similarly, any application with
a wire is fair game for Bluetooth.

Hundreds of millions of units sold

with a $5 price tag? I’d say we’re
looking at the year 2003. But frankly,
given the complexity of the technolo-

Tom Cantrell has been working on
chip, board, and systems design and
marketing for several years. You may
reach him by e-mail at tom.cantrell@
circuitcellar.com.

REFERENCES

[1] J. Bray, C. Sturman, Bluetooth:

Connect Without Cables

Prentice Hall, 2001.

[2] A. Kamerman, N. Erkocevic,

“Microwave Oven Interference
on Wireless LANs Operating in
the 2.4-GHz ISM Band,” Lucent
Technologies, June 2000.

SOURCE

MTC-60110
Compagnie Financière Alcatel
+33 (0) 1 40 76 10 10
Fax: +33 (0) 1 40 76 14 00
www.alcatel.com

gy and typical time-to-market lead
times, that means there’s no time to
dillydally with your design-in.

And that’s the Bluetruth.

Photo 2—

One nice thing about wires is that it’s easy

to tap in and see what’s going on. CATC provides the
equivalent of a wireless breakout box with their Merlin
Bluetooth analyzer.

CIRCUIT CELLAR

Test Y

Your E

What’s your EQ?

—The answers

and 4 additional questions and
answers are posted at
www.circuitcellar.com
You may contact the quizmasters
at eq@circuitcellar.com

more EQ

questions

each month in

Circuit Cellar Online

see pg. 4

Problem 1

—The codecs used to digitize voice sig-

nals in the telephone system use a nonlinear cod-
ing system that can basically be thought of as a
floating-point representation with a sign bit, a 4-bit
mantissa and a 3-bit exponent. Why is this used
instead of a straightforward 8-bit linear PCM code?

Contributed by Dave Tweed

Problem 2

—What will be the value of I displayed

by the following fragment of code?

int i = printf ("Hello");

printf (" i = %d\n", i);

Contributed by Naveen NP

Problem 3

—What is wrong with this C preproces-

sor macro used to find the square of a number?

#define square(a) a×a

Contributed by Naveen NP

Problem 4

—What is the current through the

resistance R in the following circuit?

Contributed by Naveen NP

12 V

Zener

3.7 V

Issue 134 September 2001

CIRCUIT CELLAR

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