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Electronic Lab Manuał
The Laboratory:
Section 1. NOT Gate Implementation
7402(NOR)
E
7486(X-OR)
(a) Connect one of the NOT gates (74LS04) as shown in Figurę below. Remember to power the Vcc and GND terminaLs of the chip. Remember also to leave tlie Digital Trainer Kit tumed off. until you are surę that your circuit Ls wired correctly.
Figurę The NOT gate
(b) Vary the input A to obtain all tlie possible combinations and complete the Truth table for the NOT gate. Check tlie output LED.
Section 2. De Morgan's Theorem
(a) Connect inputs A and B and tlieir complements ~A and ~B to AND. OR gates as shown in Figurę below. You will have to ase NOT gates to obtain these States.
Figurę. Proving De Morgan's Theorem.
(b) Vary inputs A and B and enter the output values into a truth table as show below.
|
A |
B |
F |
|
0 |
0 | |
|
0 |
l | |
|
l |
0 | |
|
l |
l |
Section 3. The implementation of tlie NAND gate.
(a) Connect one of tlie 2-input NAND gates as shown in Figurę below.
K. Adite^has 5
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